159 results on '"Monsieur, F."'
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2. 40-nm RFSOI technology exhibiting 90fs RON × COFF and fT/fMAX of 250 GHz/350 GHz targeting sub-6 GHz and mmW 5G applications
3. Simulation of the thermal stress induced by CW 1340 nm laser on 28 nm advanced technologies
4. Insight Into HCI Reliability on I/O Nitrided Devices
5. Multi-scale strategy for high-k/metal-gate UTBB-FDSOI devices modeling with emphasis on back bias impact on mobility
6. Modified space-charge limited conduction in tantalum pentoxide MIM capacitors
7. HCI degradation model based on the diffusion equation including the MVHR model
8. PD-SOI CMOS and SiGe BiCMOS Technologies for 5G and 6G communications
9. Implant heating contribution to amorphous layer formation: a KMC approach
10. Multi-vibrational hydrogen release: Physical origin of Tbd, Qbd power-law voltage dependence of oxide breakdown in ultra-thin gate oxides
11. Breakdown mechanisms in ultra-thin oxides: impact of carrier energy and current through substrate hot carrier stress study
12. New insights into the change of voltage acceleration and temperature activation of oxide breakdown
13. On the role of holes in oxide breakdown mechanism in inverted nMOSFETs
14. Series resistance and oxide thickness spread influence on Weibull breakdown distribution: New experimental correction for reliability projection improvement
15. Gate oxide Reliability assessment optimization
16. Determination of Dielectric Breakdown Weibull Distribution Parameters Confidence Bounds for Accurate Ultrathin Oxide Reliability Predictions
17. Low frequency noise and reliability properties pf 0.12 μm CMOS devices with Ta 2O 5 as gate dielectrics
18. Failures in ultrathin oxides: Stored energy or carrier energy driven?
19. Wear-out, breakdown occurrence and failure detection in 18–25 Å ultrathin oxides
20. Analysis and Modeling of the Charge Collection Mechanism in 28-nm FD-SOI
21. Experimental and theoretical investigation of the ‘apparent’ mobility degradation in Bulk and UTBB-FDSOI devices: A focus on the near-spacer-region resistance
22. Hot carrier stress: Aging modeling and analysis of defect location
23. Hot Carrier Stress modeling: From degradation kinetics to trap distribution evolution
24. TCAD modeling challenges for 14nm FullyDepleted SOI technology performance assessment
25. New compact model for performance and process variability assessment in 14nm FDSOI CMOS technology
26. Impact of Inside Spacer Process on Fully Self-Aligned 250 GHz SiGe:C HBTs Reliability Performances: a - Si vs. Nitride
27. Experimental and theoretical investigation of the ‘apparent’ mobility degradation in Bulk and UTBB-FDSOI devices: A focus on the near-spacer-region resistance
28. The importance of the spacer region to explain short channels mobility collapse in 28nm Bulk and FDSOI technologies
29. Energy-driven Hot-Carrier model in advanced nodes
30. 14nm FDSOI technology for high speed and energy efficient applications
31. A new approach for modeling drain current process variability applied to FDSOI technology
32. (Invited) Effect of SOI Substrate on CMOS Devices Reliability
33. Effective field and universal mobility in high-k metal gate UTBB-FDSOI devices
34. TCAD modeling challenges for 14nm FullyDepleted SOI technology performance assessment.
35. Erratum: Invariant Integral and the Transition to Steady States in Separable Dynamical Systems
36. ETSOI CMOS for System-on-Chip Applications Featuring 22nm Gate Length, Sub-100nm Gate Pitch, and 0.08mm2 RAM Cell
37. UTBB FDSOI transistors with dual STI for a multi-Vt strategy at 20nm node and below
38. New insights into NBTI reliability in UTBOX-FDSOI PMOS transistors
39. Characterization and Modeling of Back Bias Impacts on Remote-Coulomb-Limited Mobility in UTBB-FDSOI Devices
40. Strain engineered extremely thin SOI (ETSOI) for high-performance CMOS
41. 28nm FDSOI technology platform for high-speed low-voltage digital applications
42. Enabling the use of ion implantation for ultra-thin FDSOI n-MOSFETs
43. Fundamental aspects of HfO2-based high-k metal gate stack reliability and implications on tinv-scaling
44. Extremely Thin SOI (ETSOI) - a Planar CMOS Technology for System-on-chip Applications
45. Impact of substrate bias on GIDL for thin-BOX ETSOI devices
46. High-K gate stack breakdown statistics modeled by correlated interfacial layer and high-k breakdown path
47. High voltage devices in advanced CMOS technologies
48. High voltage devices integration into advanced CMOS technologies
49. Coupled Approach for Reliability Study of Fully Self Aligned SiGe:C 250GHz HBTs
50. Impact of Oxygen Vacancies Profile and Fringe Effect on Leakage Current Instability of Ta2O5 MIM Capacitors
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