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We report on high-quality InGaAs/GaAs multi-quantum well waveguide photodetectors, monolithically integrated through metalorganic vapor-phase selective-area epitaxial growth and contact metallization in a 300-mm CMOS pilot line. The photodetectors are implemented using the nano-ridge engineering concept, leveraging aspect-ratio trapping in combination with precise control of the nano-ridge cross section dimensions and composition. The InGaAs/GaAs p-i-n nano-ridge photodetectors are shown to achieve high internal responsivities of up to 0.65 A/W at −1 V bias and 1020 nm wavelength. A clear correlation is observed between measured responsivity and contact-plug design, correlating well with simulation models. In addition, a record-low dark current density of 1.98 × 10−8A/cm2 and low absolute dark currents of

Nano-ridge engineering (NRE) is a novel heteroepitaxial integration approach for III–V devices on Si substrates. It starts with selective area growth in narrow trenches for misfit defect trapping. ...

We introduce a new design space for optimizing III-V devices monolithically grown on Silicon substrates by extending the concept of nano-ridge engineering from binary semiconductors such as GaAs, InAs and GaSb to the ternary alloy InGaAs. This allows controlling the fundamental lattice constant of the fully relaxed ternary nano-ridge which thereby serves as a tunable base for the integration of diverse device hetero-layers. To demonstrate the flexibility of this approach, we realized an O-band nano-ridge laser containing three In0.45Ga0.55As quantum wells, which are pseudomorphically strained to an In0.25Ga0.75As nano-ridge base. The demonstration of an optically pumped nano-ridge laser operating around 1300 nm underlines the potential of this cost-efficient and highly scalable integration approach for silicon photonics.

Although the physical limits of CMOS scaling should have been reached years ago, the process is still ongoing due to continuous improvements in material quality and analytical techniques. This paper describes one such technique, electron channeling contrast imaging (ECCI), explaining how it is used to analyze nanoscale features and defects. ECCI allows for fast, nondestructive characterization and has the potential for extremely low detection limits. The detection of low-level defects requires measurements over large areas (usually with the help of automation) to obtain statistically relevant data. For example, automated ECCI mapping routines have been shown to quantify crystal defect densities as low as 1 x 105 cm-2 in epitaxially grown Si0.75Ge0.25. The paper presents various methods to reduce measurement time without compromising sensitivity. It also explains how the mapping routine can be optimized to detect extended crystalline defects in III/V layers, selectively grown on shallow trench isolation patterned Si wafers.

Nano-ridge engineering (NRE) is a novel method to monolithically integrate III–V devices on a 300 mm Si platform. In this work, NRE is applied to InGaP/GaAs heterojunction bipolar transistors (HBTs), enabling hybrid III-V/CMOS technology for RF applications. The NRE HBT stacks were grown by metal-organic vapor-phase epitaxy on 300 mm Si (001) wafers with a double trench-patterned oxide template, in an industrial deposition chamber. Aspect ratio trapping in the narrow bottom part of a trench results in a threading dislocation density below 106∙cm−2 in the device layers in the wide upper part of that trench. NRE is used to create larger area NRs with a flat (001) surface, suitable for HBT device fabrication. Transmission electron microscopy inspection of the HBT stacks revealed restricted twin formation after the InGaP emitter layer contacts the oxide sidewall. Several structures, with varying InGaP growth conditions, were made, to further study this phenomenon. HBT devices—consisting of several nano-ridges in parallel—were processed for DC and RF characterization. A maximum DC gain of 112 was obtained and a cut-off frequency ft of ~17 GHz was achieved. These results show the potential of NRE III–V devices for hybrid III–V/CMOS technology for emerging RF applications.

The integration of III-V compound materials on Silicon is of paramount importance for the implementation of a complete Silicon Photonics platform where both active components, such as III-V laser diodes and amplifiers, and passive components are present. The monolithic growth of III-V materials on Si substrates is desirable in terms of cost efficiency, mass production and scalability. However, the large lattice mismatch between Si and most III-V compound materials of interest results in poor crystal quality for the deposited III-V film.

Marina Baryshnikova - Candidate of Sciences in Pedagogy, Deputy CEO of the National Training Foun­dation. Address: Bld. 1, 7 1905 Goda Str., 123022 Moscow, Russian Federation. E-mail: baryshnikova@ntf.ruElena Vashurina - Candidate of Sciences in Economics, Leading Expert at the International Of­fice of Kazan Federal University. Address: 18 Kremlevskaya Str., 420008 Ka­zan, Russian Federation. E-mail: evashuri@mail.ruElza Sharykina - Candidate of Sciences in Economics, Deputy Director of the Center of Exper­tise and Consulting, National Training Foundation. Address: Bld. 1, 7 1905 Goda Str., 123022 Moscow, Russian Federation. E-mail: elzagrishkova@gmail.comYuri Sergeev - Candidate of Sciences in Pedagogy, Head of the Analytical Research Depart­ment, National Training Foundation. Address: Bld. 1, 7 1905 Goda Str., 123022 Moscow, Russian Federation. E-mail: sergeev@ntf.ruIrina Chinnova - Candidate of Sciences in Engineering, Associate Professor, Project Executive, Department for Vocational Education and Science Development, National Trai­ning Foundation. Address: 18 Kremlevskaya Str., 420008 Kazan, Russian Fede­ration. E-mail: chinnova@ntf.ruEfforts in providing expert and methodological support for the implementation of flagship university development programs in 2016-2017 yielded a specific-purpose flagship university model and four generic flagship university transformation models: regional technology leader (RTL), regional comprehensive university (RCU), industry sector leader (industrial university) (IL), and trans-border region university (TBRU). The article provides distinctive features of the four models, analysis of the regions where specific types of models pre­vail, and the results of model testing.As it has been found, flagship universities basically develop along two gene­ric models, RCU (classical universities, nearly half of the project participants) and RTL (engineering universities, one third of the flagship universities). For most universities, the type of transformation model pursued is strongly related to their current status and external environment characteristics. However, a number of universities fall in between and cannot be classified neatly under any particular model due to some specific external and internal factors. In this case, universities may use elements of more than one transformation model at once, yet the choice of model should first of all be based on the regional factors that determine the position and role of the flagship university in terms of the priority areas of regional development.

The integration of III-V semiconductors on Silicon is one of the key processes needed to build a versatile Silicon Photonics platform incorporating active and passive components. The direct epitaxy of III-V materials on Si can be considered the ultimate strategy to achieve this but, depending on the approach, still faces challenges in reaching sufficient crystalline quality, and/or interfacing with other silicon photonics components, and/or demonstrating electrical injection. Here, we present a loss-coupled DFB nano-ridge laser that is easier to process than our earlier demonstrated devices and opens the road towards electrical injection of these nanoscale lasers. The nano-ridges are epitaxially grown on a standard 300-mm Si wafer using the aspect ratio trapping (ART) technique to suppress defects, for details see [1, 2]. The high crystalline quality of the nano-ridges was proven before through characterization of their material gain [3] and the demonstration of optically-pumped lasing from a DFB cavity with etched gratings [4]. Electrical injection could not yet be demonstrated as depositing a continuous metal contact directly on top of the nano-ridge, only 300nm away from the active QWs, would result in a prohibitively large loss (>300dB/cm). Here, patterned metal gratings are deposited on the top of the nano-ridge instead. This allows to form a pure loss-coupled DFB cavity without the need to etch the III-V material, simplifying the processing and avoiding damaged interfaces. At the same time, this patterned metal grating in the future might serve as a pathway for electrical injection. The optical field of the low loss cavity mode concentrates in the dielectric part of the metal grating. This reduces the simulated loss of this mode to 23 dB/cm. The duty cycle of the gratings is designed to be 0.4 (0.37 as fabricated) for a good trade-off between the coupling strength provided by the periodically modulated metal layer and the cavity loss of the lasing mode. Following epitaxy of the GaAs/InGaAs nano-ridges, only a single ebeam and lift-off step is required to deposit the 5nm/40nm Ti/Au metallic grating layer with 164nm period. Fig. 1 (a) shows the cross-section of as-grown nano-ridges and (b) presents a top view of the loss-coupled DFB laser with metallic gratings on top.

We report p-i-n InGaAs/GaAs multi-quantum well nano-ridge waveguide photodetectors monolithically integrated on a 300-mm Si wafer. The devices exhibit low dark currents of 0.3 pA ( $1.36\times 10^{-7}A/cm^{2}$ ) at −1 V bias and internal responsivities of 0.65A/W at 1020nm wavelength.

We demonstrate monolithically integrated n-GaAs/p-Si depletion-type optical phase shifters fabricated on a 300 mm wafer-scale Si photonics platform. We measured the phase shifter performance using Mach–Zehnder modulators with the GaAs/Si optical phase shifters in both arms. A modulation efficiency of V π L as low as 0.3 V·cm has been achieved, which is much lower compared to a carrier-depletion type Si optical phase shifter with pn junction. While propagation loss is relatively high at ∼ 6.5 dB / mm , the modulator length can be reduced by the factor of ∼ 4.2 for the same optical modulation amplitude of a Si reference Mach–Zehnder modulator, owing to the high modulation efficiency of the shifters.

We demonstrate p-i-n InGaAs/GaAs quantum well nano-ridge waveguide photodetectors epitaxially grown and fully processed on a 300mm Si wafer. The devices exhibit low dark currents of 10pA, current density of 1. 43 × 10−5 A/cm2, at −1V bias and internal responsivities of 0.48A/W at 1020nm wavelength.

Nano-ridge engineering (NRE) is a novel heteroepitaxial approach for the monolithic integration of lattice-mismatched III-V devices on Si substrates. It has been successfully applied to GaAs for the realization of nano-ridge (NR) laser diodes and heterojunction bipolar transistors on 300 mm Si wafers. In this report we extend NRE to GaSb for the integration of narrow bandgap heterostructures on Si. GaSb is deposited by selective area growth in narrow oxide trenches fabricated on 300 mm Si substrates to reduce the defect density by aspect ratio trapping. The GaSb growth is continued and the NR shape on top of the oxide pattern is manipulated via NRE to achieve a broad (001) NR surface. The impact of different seed layers (GaAs and InAs) on the threading dislocation and planar defect densities in the GaSb NRs is investigated as a function of trench width by using transmission electron microscopy (TEM) as well as electron channeling contrast imaging (ECCI), which provides significantly better defect statistics in comparison to TEM only. An InAs/GaSb multi-layer heterostructure is added on top of an optimized NR structure. The high crystal quality and low defect density emphasize the potential of this monolithic integration approach for infrared optoelectronic devices on 300 mm Si substrates.

The silicon photonics platform is still missing a native source. Therefore, using a novel epitaxial process based on aspect ratio trapping and nano-ridge engineering we demonstrated an powerfull approach to fabricate GaAs-InGaAs lasers directly on a standard silicon substrate. In depth morphological and optical characterisation confirms the high quality of the material. We demonstrated lasing from DFB-type devices with etched gratings and with metal gratings. In the presentation we will also discuss the possibility for coupling to standard silicon waveguides and for extending the emission to longer wavelengths.

The monolithic growth of III–V materials directly on Si substrates provides a promising integration approach for passive and active silicon photonic integrated circuits but still faces great challenges in crystal quality due to misfit defect formation. Nano-ridge engineering is a new approach that enables the integration of III–V based devices on trench-patterned Si substrates with very high crystal quality. Using selective area growth, the III–V material is deposited into narrow trenches to reduce the dislocation defect density by aspect ratio trapping. The growth is continued out of the trench pattern and a box-shaped III–V nano-ridge is engineered by adjusting the growth parameters. A flat (001) GaAs nano-ridge surface enables the epitaxial integration of a common InGaAs/GaAs multi-quantum-well (MQW) structure as an optical gain medium to build a laser diode. In this study, a clear correlation is found between the photoluminescence (PL) lifetime, extracted from time-resolved photoluminescence (TRPL) measurements, with the InGaAs/GaAs nano-ridge size and defect density, which are both predefined by the nano-ridge related pattern trench width. Through the addition of an InGaP passivation layer, a MQW PL lifetime of up to 800 ps and 1000 ps is measured when pumped at 900 nm (only QWs were excited) and 800 nm (QWs + barrier excited), respectively. The addition of a bottom carrier blocking layer further increases this lifetime to ∼ 2.5 ns (pumped at 800 nm), which clearly demonstrates the high crystal quality of the nano-ridge material. These TRPL measurements not only deliver quick and valuable feedback about the III–V material quality but also provide an important understanding for the heterostructure design and carrier confinement of the nano-ridge laser diode.

In this paper, we demonstrate GaAs/InGaP HBTs grown on a 300 mm Si substrate. A DC current gain of ~112 and breakdown voltage, BV CBO , of 10 V is achieved. The emitter-base and base-collector diodes show an ideality factor of ~1.2 and ~1.4, respectively. This demonstration shows the potential for enabling a hybrid III-V CMOS/ technology for 5G and mm-wave applications, not limited to GaAs but which can also be extended to InGaAs on a 300 mm Si substrate.

Selective area growth of III–V compound materials into trenches fabricated on silicon (Si) substrates allows to combine aspect ratio trapping with nano-ridge engineering (NRE). This leads to a novel integration approach for III–V devices with Si based functionalities. GaAs is deposited by metal organic vapor phase epitaxy into narrow oxide trenches processed on a 300 mm (∅) Si wafer to profit from efficient misfit defect trapping. Via NRE, GaAs nano-ridges are formed on top of these trenches, which have a dimension to act as a waveguide. The flat (001) top nano-ridge surface is used for the integration of an InGaAs/GaAs multi-quantum-well stack as an optical gain medium to build a laser diode. A final InGaP cap is deposited around the full nano-ridge to complete the heterostructure. Optical pumped laser operation at room temperature is demonstrated emphasizing the high crystal quality of the nano-ridges.

The growing interest for 5G radios pushes technology development towards low-cost and high-performance solutions for operating at microwave and mm-wave. Downscaling CMOS technology has allowed the integration of high-speed transceivers on silicon chips, but high-power amplifiers rely on III-V technologies to deliver the power and efficiency levels required by modern radios. In this work, we motivate the interest of non-Si technologies to meet 5G requirements, and we explore two routes to enable the fabrication of compound semiconductor devices on a large-scale manufacturable Si platform [1,2]. We provide insight on the potential of these new technologies for the design of advanced front-end modules, including modelling and reliability challenges. In the first route (Figure 1(a)), we report on Al(Ga,In)N HEMTs, MISHEMTs and MOSFETs integrated on 200 mm Si wafers using Au-free processing in standard Si CMOS tools, and discuss the performance trade-offs, limitations and solutions. State-of-the-art contact resistance of 0.14 Ω.mm is demonstrated for a non-Au, low thermal budget (oC) contact scheme, as well as a high vertical breakdown voltage (VBD) of >300 V. We show that MISHEMTs, which feature the highest field effect mobility (μFE), >2000 cm2/V.s, and the best 1/f noise performance, have the potential to outperform the other device types in terms of device scalability for high frequency operation. The GaN-on-Si substrate optimization for low RF losses and nonlinear distortion is further discussed. The second route (Figure 1(b)) includes the formation of HBT on Si wafer by selective epitaxy. We demonstrate GaAs/InGaP HBTs grown on a 300 mm Si substrate. A DC current gain of ~112 and breakdown voltage, BVCBO, of 10 V is achieved. The emitter-base and base-collector diodes show an ideality factor of ~1.2 and ~1.4, respectively. This demonstration shows the potential for enabling a hybrid III-V CMOS/ technology for 5G and mm-wave applications, not limited to GaAs but which can also be extended to InGaAs on a 300 mm Si substrate. Figure 1

With this paper, the authors report optical gain characterization of InGaAs/GaAs nano-ridge amplifierss epitaxially grown on a standard 300-mnm Si wafer, by varying strip length (VSL) method. The measured material gain is similar to 4000cm(-1), which is comparable with conventional GaAs material.

This paper describes the results of experimental evaluation of titanium dioxide thin films formed by CVD as active layers in semiconductor, resistive sensors for detection of ethanol vapors. TiO2 layers with a thickness of 90 nm are formed by CVD in the TTIP-O2-O3-Ar reaction system. Sensors manufactured with titania films formed under all the deposition conditions studied exhibit good electrical response to the ethanol vapors, with quick response-recovery characteristics in the temperature range 170–300 °C. Sensor performance is determined by the relative amount of anatase phase and grain size in the films. The response value (Rair/Rethanol) of the sample with the highest degree of crystallinity reached 37 at an operating temperature of 200 °C.

The article covers the computational framework providing an insight on vapour phase coagulation of nanoparticles synthesized by atmospheric pressure PECVD in an RF capacitive discharge. The proposed model is based on the solution of motion equations for neutral and charged nanoparticles in the plasma downstream area featuring a nonuniform distribution of electric potential. Within the model particles collisions are accounted by an O'Rourke derived stochastic method, reduction of computational time is attained by division of the nanoparticle stack into parcels. We argue that nanoparticles are mainly synthesized in the plasma downstream area. Size distribution of the particles is governed by their uneven motion in the nonuniform electric field. We demonstrate that particles of tens of nanometer in diameter result from coagulation of neutral nanoparticles, whereas the larger nanoparticles result from coagulation of charged particles. The model shows that charged particles trapped in the potential well in the vicinity of the discharge electrode grow up to micron size. The proposed model is validated by the experimental results of silicon dioxide nanoparticles synthesis; it may be extended to a vast range of materials provided certain modifications of the particles motion equations are done. (© 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim)

Bioactive coatings on medical implants can be prepared from titanium dioxide due to its ability to induce the formation of hydroxylapatite (HA) from physiological solutions. In this study TiO2 layers were formed by chemical vapor deposition at different substrate temperatures in order to controllably change their structure from amorphous to consisting of preferentially oriented anatase crystallites. To evaluate the influence of phase composition and surface morphology of the deposited layers on their ability to form HA titania samples were immersed in Dulbecco's phosphate-buffered saline (DPBS). The obtained results showed that structure of TiO2 layers determines the structure of HA formed on their surface. Polycrystalline titania layers with random orientation of anatase crystallites are the most favorable for intensive nucleation and formation of continuous HA coatings in DPBS solution. The textured TiO2 layers with smooth surface enhanced formation of HA deposits which consisted of sparsely distributed large separate grains. On the basis of the experimental results it was proposed that formation of hydroxylapatite nuclei on the surface of titania layers occurs by a mechanism of epitaxial growth. (© 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim)

Chemical vapor deposition (CVD) provides fabrication of high purity conformal layers of titanium dioxide with different structure for various applications. In this work CVD of titania layers from titanium tetraisopropoxide (TTIP) and oxygen at 1 kPa and in the substrate temperature range Ts = 300–500 °C was studied. It was found that growth of TiO2 is a non-stationary process. Two periods of time characterized by different deposition rates were observed. Formation of amorphous TiO2 occurs at the initial period of the deposition process whereas polycrystalline titania with anatase crystal structure is deposited at the second period. Substrate temperature determines degree of crystallinity, texture, and microstructure of the deposited titania layers.

NiO films were grown by metal-organic chemical vapor deposition (MOCVD) using bis-(ethylcyclopentadienyl) nickel [(EtCp)2Ni] and oxygen or ozone as precursors. The kinetic regularities of MOCVD processes were experimentally studied in the deposition temperature range 600-820 K for the reaction systems: (EtCp)2Ni–O2–Ar and (EtCp)2Ni–O3–O2–Ar. The results obtained show that the deposition processes in the temperature range 600-700 K are controlled by kinetics and the value of activation energy of the processes is 80±5 kJ·mol−1 in both cases. The growth process in the temperature region 700–840 K is controlled by mass transport. An introduction of ozone in the reaction gas phase led to nearly twofold decrease of deposition rate probably because of homogeneous reactions with (EtCp)2Ni. (© 2015 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim)

Professional development of and methodological support for working educators are considered as one of the key tasks in the computerization of schools. Hundreds of thousands of teachers have learned about the possibilities offered by computers and the Internet. However, there have been no considerable changes in the use of ICT in teaching. The article discusses the reasons for this. It suggests an approach to solving the problems of professional development and methodological support for educators, which might be helpful in overcoming existing obstacles.

The effect of ozone on chemical vapor deposition of titanium dioxide films from titanium tetraisopropoxide (TTIP) has been experimentally studied. The influence of process parameters on the growth rate, structural and optical properties of TiO2 films deposited in the TTIP-Ar, TTIP-O2-Ar and TTIP-O2-O3-Ar reaction systems have been compared taking into account the results of FTIR measurements of the reaction gas phase. Ozone allows to decrease minimal deposition temperature providing formation of high quality titanium dioxide films to 240 {degree sign}C.