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The mechanisms of ohmic contact formation and carrier transport of low temperature (600◦C) annealed Hf/Al/Ta on In0.18Al0.82N/GaN heterostructure grown on Si substrate have been investigated. The Hf/Al/Ta ohmic contacts have a smooth interface with In0.18Al0.82N/GaN, and the formations of HfN and Hf-Al alloy near the metal-semiconductor interface are critical to achieving good ohmic contact. Thermionic field emission (TFE) is found to be the dominant carrier transport mechanism in the Hf/Al/Ta ohmic contacts on In0.18Al0.82N/GaN and analysis of the TFE model has revealed a high carrier density of 1.72 × 1019 cm−3 and an effective barrier height of 0.48 eV. The sheet resistance of the In0.18Al0.82N/GaN substrate is shown to increase with temperature by the power-law (∝ T1.55). A series two-barrier model has been used to explain the carrier transport through the Hf/Al/Ta ohmic contacts on In0.18Al0.82N/GaN with a smooth metal-semiconductor interface. It has also been shown that the Hf/Al/Ta contacts on In0.18Al0.82N/GaN are stable at 350◦C in air for more than 200 hours. © The Author(s) 2014. Published by ECS. This is an open access article distributed under the terms of the Creative Commons Attribution Non-Commercial No Derivatives 4.0 License (CC BY-NC-ND, http://creativecommons.org/licenses/by-nc-nd/4.0/), which permits non-commercial reuse, distribution, and reproduction in any medium, provided the original work is not changed in any way and is properly cited. For permission for commercial reuse, please email: oa@electrochem.org. [DOI: 10.1149/2.0111502jss] All rights reserved.

Introduction Recently, lattice matched InAlN/AlN/GaN-on-silicon integration approach has attracted increasing attention due to the availability of high-quality GaN epiwafers with high throughput epitaxial growth on large area Si substrates for applications in power and RF devices with low power consumption [1-2]. Meanwhile, the development of gate-first process is useful to realize future self-aligned transistor structures. Conventional fabrication of InAlN/GaN high electron mobility transistors (HEMTs) or metal-oxide-semiconductor high electron mobility transistors (MOSHEMTs) involves gate-last process where high temperature (>800 oC) annealing is required to form Ti/Al/Ni/Au source and drain ohmic contacts [3]. This is a consequence of traditional gate metallization (e.g., Ni/Au) and gate dielectric not being able to survive such a high ohmic annealing temperature. Therefore, the development of good ohmic contacts with a low thermal annealing budget and thermally stable gate dielectric is required to realize the gate-first process integration for InAlN/GaN HEMTs/MOSHEMTs. In the present work, we report the fabrication and characterization of InAlN/GaN MOSHEMTs using a lift-off free, gate-first CMOS compatible process developed at low thermal budget. Experiment The lattice-matched In0.18Al0.82N/AlN/GaN-on-Si (111) HEMT structure used in this experiment is shown schematically in Fig. 1. The MOSHEMT fabrication using a gate-first process started from mesa isolation followed by 20 nm thick LaAlO3 (LAO) deposition using pulsed laser deposition (PLD) with a substrate temperature of 300 oC. Then, W was sputter deposited followed by gate definition using photolithography and dry etching method. Thereafter, Hf/Al/Ta layer was sputter deposited followed by rapid thermal annealing at 600 oC for 60 s in vacuum to form source and drain ohmic contacts. Results and Discussion The contact resistance and contact resistivity of Hf/Al/Ta ohmic contacts, as analyzed from linear transmission line method (LTLM), are found to ~0.60 Ω·mm and 6.7x10-6 Ω·cm2, respectively. At first, the thermal stability and reliability of the LAO gate dielectric upon 600 oC ohmic anneal in vacuum was optimized under several oxygen partial pressures during PLD. Comparison of capacitance-voltage and reverse gate leakage current characteristics of fabricated devices subject to different oxygen partial pressures in the range from 3.1×10-5 Torr to 5×10-3 Torr are shown in Figs. 2(a) and 2(b), respectively. It is found that LAO deposited under an oxygen partial pressure of 2.7×10-4 Torr exhibits the lowest gate leakage and highest accumulation capacitance, predominantly arisen by an increased dielectric permittivity (k~23.2). Finally, the gate-first CMOS compatible MOSHEMTs were fabricated by choosing the above optimized deposition condition for PLD (2.7×10-4 Torr @ 300 oC) of LAO. Devices having gate dimensions of W/L = 2×50/1 μm, gate-to-source distance of Lgs ~ 2 μm, gate-to-drain distance of Lgd ~ 6 μm, were used for DC output and transfer characterizations. The DC output and transfer characteristics are shown in Figs. 3 (a) and (b), respectively. The MOSHEMTs achieve a saturation drain current (Idsat) of 500 mA/mm at zero gate voltage, threshold voltage (Vth) of -12.6 V, maximum extrinsic transconductance (Gmax) of 44 mS/mm and on-resistance (Ron) of ~ 14 Ω/mm. Conclusion In conclusion, a gate-first CMOS compatible process for InAlN/AlN/GaN-on-Si MOSHEMTs fabrication has been developed. A low thermal budget (600 oC) for ohmic annealing is achieved through the use of Hf/Al/Ta source-drain contacts, thus allowing the fabrication of gate-first CMOS compatible MOSHEMTs using LaAlO3 as the gate dielectric as well as for device passivation purpose. The reasonable DC performance demonstrated (Idsat = 500 mA/mm, Gmax = 44 mS/mm, etc.) for a 1 μm gate length shows promising possibility for gate-first process integration of InAlN/GaN-on-Si MOSHEMTs. References [1] J. Kuzmik, 2001 IEEE Trans. Electron Dev. 22 510. [2] F. Medjdoub, J. Carlin and M. Gonschorek, 2006 IEEE Trans. Electron Dev.42 779. [3] H. Sun, A. R. Alt, H. Benedickter, E. Feltin, J-F Carlin, M. Gonschorek, N. Grandjean and C. R. Bolognesi, 2010, IEEE Electron Device Lett., 31, 293. Figure captions Fig. 1: Schematic illustration of fabricated InAlN/GaN-on-Si MOSHEMT with LaAlO3as gate dielectric and passivation using a gate-first CMOS compatible process developed at low thermal budget. Fig. 2: Comparison of (a) capacitance-voltage and (b) reverse gate leakage characteristics of MOS capacitors for 20 nm thick LaAlO3 deposited under different oxygen partial pressures and at substrate temperature of 300 oC. Fig. 3: Measured (a) Ids-Vds and (b) Ids-Vgs characteristics of fabricated InAlN/GaN-on-Si MOSHEMTs with LaAlO3 as gate dielectric and passivation using a low thermal budget, gate-first CMOS compatible process.

Introduction Lattice-matched InAlN/GaN/Si based high electron mobility transistors (HEMTs) have recently attracted much attention as a candidate for next generation high-power, high-temperature and high-frequency devices, due to their higher charge density than the conventional AlGaN/GaN heterostructure [1]. However, HEMT performance, reliability, integrity and robustness are determined by the contact materials employed and passivation. Various dielectrics, such as SiO2, Si3N4, AlN, MgO, Al2O3, HfO2, Sc2O3, etc have been investigated for passivation. Among them, Si3N4 is the most widely used. Extensive improvement in electrical properties of the AlGaN/GaN/Si heterostructure achieved by the SiN x passivation process has been reported [2]. Such improvements by SiN x passivation were believed to be due to the reduction of the surface states, change in the AlGaN potential barrier height or increase of the 2DEG density at the channel due to tensile stress [3-5]. In spite of various reports on SiN x pasivation of InAlN/GaN heterostructures, SiN x thickness dependent studies have not been extensively explored to date. In the present study, we report SiN x thickness dependent electrical properties and its effect on the device performance of InAlN/GaN heterostructures. Experiment Nearly lattice-matched InAlN/GaN/Si epi-wafer, with a sheet resistance of 348.9 Ω/sq, was used in the present study. Prior to ohmic contact formation, InAlN/GaN/Si substrate surface was ultrasonically cleaned with acetone, IPA and DI water. Hf (15)/Al (200)/Ta (20) nm ohmic contacts were deposited by sputtering followed by rapid thermal annealing in vacuum at 600 oC for 1 min. No surface treatment was performed prior to passivation. Passivation SiN x layer of varying thickness ranging from 25 to 200 nm was deposited at 300°C by PECVD using silane and ammonia as precursor gases. SiN x layer on the ohmic electrodes was removed by etching in buffered hydrofluoric acid. To characterize our samples, room-temperature Hall measurements using van der Pauw geometry and ultraviolet (UV) Photoluminescence (PL) spectra excited using 266 nm laser source were performed. Results and Discussion Figure 1 shows the room-temperature Hall measurements of InAlN/GaN/Si as a function of the passivation SiN x layer thickness. Increase in sheet carrier concentration (ns), whereas decrease in mobility (μ) is observed with increasing SiN x passivation layer thickness. A thickness of ~100 nm can be viewed as optimum as it yields a minimum sheet resistance (Rs), as shown in Fig. 1. The corresponding increase in ns is substantial of almost ~30%, with respect to sample without SiN x passivation. Although the reason for the significant increase in ns is not apparent, yet our preliminary studies by means of UV PL reveal a shift in the PL peak position of the GaN channel layer (Fig. 2), which is most likely due to band bending under stress. However, possibility of reduction of surface states of the passivated InAlN and/or an increase in positive charge at the SiN x /InAlN interface cannot be ruled out. Additionally, the decrease in μ is possibly due to increased electron-electron scattering and/or interface roughness scattering with such a high carrier concentration in 2DEG channel. Interestingly, the trend of increase in 2DEG density is similar to that observed for AlGaN/GaN heterostructure under different SiN x passivation layer thickness [6]. This observation indicates that the intrinsic property of SiN x film may be playing a critical role in the enhancement of 2DEG density rather than the interface property. Further studies to establish the mechanisms responsible for the enhancement in 2DEG density as well as to evaluate the influence of passivation layer thickness on the device performance are in progress. Conclusion In conclusion, surface passivation of InAlN/GaN heterostructures with PECVD SiN x of varying thickness has been investigated. A thickness of ~ 100 nm is found to be optimum and has yielded a minimum sheet resistance. The corresponding 2DEG density change is substantially higher (by ~30 %) than sample without SiN x passivation, and this enhancement is attributed possibly to band bending under stress. References [1] A. Dadgar, F. Schulze, J. Bläsing, A. Diez, A. Krost, M. Neuburger, E. Kohn, I. Daumiller and M. Kunze, Appl. Phys. Lett. 85, 5400 (2004). [2] J. Bernát, P. Javorka, A. Fox, M. Marso, H. Lüth and P.Kordoš, Solid-State Electronics 47, 2097 (2003). [3] A. V. Vertiachikh, L. F. Eastman, W. J. Schaff and T. Prunty, Electron. Lett. 38, 388 (2002). [4] C. M. Jeon and J. Lee, Appl. Phys. Lett. 86, 172101 (2005). [5] N. Onojima, M. Higashiwaki, J. Suda, T. Kimoto, T. Mimura and T. Matsui, J. Appl. Phys. 101, 043703 (2007). [6] I. R. Gatabi, D. W. Johnson, J. H. Woo, J. W. Anderson, M. R. Coan, E. L. Piner and H. R. Harris, IEEE Transactions on Electron Devices, 60, 3, (2013).

Introduction The InAlN/GaN heterostructures are attractive to researchers for high-power and high-speed applications owing to their unique properties such as high breakdown voltage, large bandgap, and strong polarization effects (thus leading to high 2DEG carrier density). Traditionally, InAlN/GaN high electron mobility transistors (HEMTs) are commonly fabricated with Ti/Al/Ni/Au ohmic contacts. However, Au is not compatible with Si process owing to its high diffusivity in Si. With the commercial availability of large GaN-on-Si wafers, Si CMOS compatible ohmic contacts for InAlN/GaN HEMTs are desirable, as this will allow their fabrication in incumbent Si foundaries, thus containing production costs. Furthermore, Ti/Al/Ni/Au contacts need a high annealing temperature (>800 oC) to achieve good ohimc properties on InAlN/GaN substrates [1-3], thus making it difficult to implement gate-first process, which is useful for the self-aligned process development. In this study, we report Au-free Hf/Al/Ta ohmic contacts on InAlN/GaN-on-Si with low contact resistance (Rc) and contact resistivity (ρc) achieved using a low annealing temperature (600 oC). The contact carrier transportation mechanism and preliminary thermal stability study are also investigated. Experiment The InAlN/GaN-on-Si wafer used in the experiment has a 9 nm Al0.82In0.18N barrier layer and 1 nm AlN spacer layer, grown on GaN buffer layer. Transfer Line Method (TLM) was used to evaluate the contact electrical properties. After mesa isolation formation by BCl3/Cl2 ICP etch, contact window patterning was carried out, followed by Hf/Al/Ta (15/200/20 nm) deposition by sputtering and metal lift-off to form contacts. Annealing of contacts was carried out in vacuum for 1 min at various temperatures (from 550 to 700 oC). SIMS and STEM were used to examine the interaction between Hf/Al/Ta and InAlN/GaN, and interface morphology, respectively. Rc, ρc and substrate sheet resistance (Rsh) were also measured as a function of temperature to analyze the contact carrier transportation mechanism. In addition, thermal aging test was conducted at 350 oC in air for more than 200 hours to assess the Hf/Al/Ta contact thermal stability. Results and Discussion Figure 1 shows the variation of Rc and ρc of Hf/Al/Ta (15/200/20 nm) contacts on InAlN/GaN-on-Si with annealing temperature. The lowest Rc ~ 0.59 Ω.mm and ρc ~ 6.7×10-6 Ω.cm2 are attained after 600 oC annealing. SIMS results before and after 600 oC annealing indicate that nitrogen out diffusion from substrate could be critical to achieving good ohmic properties for Hf/Al/Ta on InAlN/GaN-on-Si. Fig. 2 shows the Rc, ρc and Rsh of Hf/Al/Ta (15/200/20 nm) contacts on InAlN/GaN-on-Si annealed at 600 oC as a function of measurement temperature. As shown, Rc has a marginal temperature dependence, as a result of ρc decreases, while Rsh increases with increasing temperature. The latter increase is due to optical phonon scattering. The temperature dependence of ρc indicates that electron thermionic field emission (TFE) may take place across Hf/Al/Ta contact on InAlN/GaN-on-Si. On the other hand, the high 2DEG carrier density of our InAlN/GaN-on-Si substrate (1.2×1013 cm-2) suggests that field emission (FE) may also happen. However, as FE is temperature independent, this transport component is unlikely to be dominant. The STEM image shown in Fig. 3 depicts the absence of spikes or contact inclusions in the thin InAlN barrier layer and its smooth interface with Hf/Al/Ta contact (likely as a result of the low annealing temperature at 600 oC). This reduces the tunneling mechanism. Hence, it is reasonable to conclude that electron TFE is the dominant transport mechanism between Hf/Al/Ta and InAlN/GaN. Finally, in the thermal aging test, no obvious change in Rc was observed after 200 hours at 350 oC in air ambient, indicating a thermal stable property for Hf/Al/Ta contacts. Conclusion In summary, Hf/Al/Ta ohmic contacts on AlInN/GaN-on-Si have been realized with Rc ~ 0.59 Ω.mm and ρc ~ 6.7×10-6 Ω.cm2 after 600 oC annealing. SIMS results indicate that the ohmic contact formation could be due to nitrogen out diffusion from InAlN/GaN. Decrease of ρc with increasing temperature, coupled with the absence of spike formation or contact inclusions in the thin InAlN barrier layer and its smooth interface with Hf/Al/Ta contact, indicates that electron TFE could be the dominant transport mechanism for the Hf/Al/Ta ohmic contacts on InAlN/GaN. Finally, preliminary study has shown that Hf/Al/Ta contacts are stable at 350 oC in air. References [1] D. S. Lee, X. Gao, S. P. Guo and T. Palacios, 2011 IEEE Electron Device Lett.,32, 617. [2] F. Medjdoub, M. Alomari, J.-F. Carlin, M. Gonschorek, E. Feltin, M. A. Py, N. Grandjean, and E. Kohn, 2008 IEEE Electron Device Lett., 29, 422. [3] O. Katz, D. Mistele, B. Meyler, G. Bahir, J. Salzman 2005 IEEE Electron Device Lett., 52, 146. Figure Captions: Fig. 1: Variation of Rc and ρc of Hf/Al/Ta contacts on InAlN/GaN-on-Si with annealing (in vacuum for 1 min) temperature. Fig. 2: Rsh, Rc and ρc of Hf/Al/Ta (15/200/20 nm) on InAlN/GaN-on-Si annealed at 600 oC as a function of measurement temperature. Fig. 3: STEM image of Hf/Al/Ta (15/200/20 nm) on InAlN/GaN-on-Si after 600 oC annealing in vacuum for 1 min.

The potential usage of thermally robust RuOx Schottky contacts in III-nitride-based Schottky diodes and high electron mobility transistors (HEMTs) has been investigated. RuOx is deposited on nitride surface by sputtering Ru in Ar/O2 ambient. The influence of post sputtering annealing ambient and temperature on the characteristics of RuOx Schottky diodes on n-type GaN on Si(111) substrate is addressed. We also report the comparative study of thermal stability between RuOx and Ni/Au Schottky diodes on InxAl1-xN/GaN on Si(111) substrate in terms of the reverse bias leakage current and Schottky barrier height (SBH). RuOx contact shows a higher SBH of 1.24 eV and a lower leakage current of ∼10-5 Acm-2 (∼four orders of magnitude lower than that of Ni/Au) on InxAl1-xN/GaN at –40 V after annealing at 800 oC in N2. In addition, RuOx Schottky gate HEMT on InxAl1-xN/GaN on Si(111) substrate has shown a low gate leakage current of ∼6×10-8 A/mm at -8 V after annealing at 700 oC in N2 for 1 minute. The lower gate leakage current has resulted in a transistor ON/OFF current ratio of ∼105. The maximum transconductance and ON-resistance achieved by such HEMTs are about 0.18 S/mm and 8.33 Ωmm, respectively, for a gate length of 1.5 µm. (© 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim)

InxAl1-xN/AlN/GaN-based high electron mobility transistor (HEMT) structures are epitaxially grown on 200 mm diameter Si(111) substrates by a metal organic chemical vapor deposition technique. The structural and electrical properties of the nitride layers are addressed by high-resolution X-ray diffraction and Hall effect measurements. The fabricated HEMTs with Au-free contact metallization schemes have resulted in an ON-OFF current ratio ∼10 5 . Ti/Al/Ni/W-based Ohmic source/drain contacts, with 1.5 μm RuOx Schottky gate on In0.15Al0.85N/AlN/GaN HEMTs at VDS = 10 V, show a maximum transconductance (gm) and saturation drain current (IDSAT )o f 0.19± 0.01 S/mm and 0.82 ± 0.02 A/mm, respectively, with a reasonable uniformity from the center to

Thickness dependent electrical properties of Y2O3 gate dielectric based metal-oxide-semiconductor high electron mobility transistors (MOSHEMTs) on In0.18Al0.82N/GaN-on-Si are reported. A Au-free Ti/Al/Ni/W (25/200/40/50 nm) ohmic contact compatible for Si fab industry has been developed, which demonstrates a contact resistance of 0.56 Ω.mm and a specific contact resistivity of 1.45×10-6 Ω.cm2, obtained after annealing at 900 oC in vacuum for 60 sec. A positive shift in threshold voltage with decreasing Y2O3 film thickness is demonstrated while an improved MOSHEMTs transconductance and maximum saturation drain current have been obtained for thicker one. Besides, Y2O3 film thickness and annealing dependent interfacial properties have been investigated.

The electrical properties of Ti/Al/Ni/W (25/200/50/100 nm) ohmic contact and Ni/W (350/50 nm) Schottky contact to InAlN/GaN HEMT grown on high resistive Si (111) substrate are reported in this study. The specific contact resistivity of Ti/Al/Ni/W contacts has been investigated as a function of annealing temperature and Ti/Al thickness ratio, and has achieved the lowest value of 1.06×10-6 Ω∙cm2 after annealing at 900 oC in vacuum. The maximum Schottky barrier height of the Ni/W (350/50 nm) contact achieved is 0.72 eV at room temperature. With ZrO2 passviation, the InAlN/GaN-on-Si HEMT exhibits a higher extrinsic transconductance of 160 mS/mm (by ~33.3%) and a lower on-resistance of 10 Ω/mm (by ~16.7%) than that without passivation.

The temperature profiles of InxAl1−xN/GaN high electron mobility transistors (HEMTs) were investigated using nondestructive optical spectroscopic techniques. In this study, HEMT structures were epitaxially grown on a Si(111) substrate with a diameter of 200 mm. In particular, the channel temperature underneath the gate was able to be accurately probed by using a RuOx-based semitransparent Schottky contact in the ultraviolet photoluminescence (PL) and visible Raman excitation modes. A maximum channel temperature as high as ∼475 K was probed near the gate edge using the PL technique at a power dissipation of ∼11.6 W/mm, thus leading to a minimum thermal conductance of about 64.7 Wm−1K−1 in such a HEMT structure. Furthermore, the temperature profiles at the GaN buffer and AlN/Si(111) interface were determined using micro-Raman measurements.

The influence of plasma enhanced chemical vapour deposited (PECVD) silicon nitride (SiN x ) passivation film thickness on In0.18Al0.82N/GaN/Si heterostructures and HEMTs has been investigated. The formation of Si3N4 was confirmed by x-ray photoelectron spectroscopy (XPS) measurements. X-ray reflectivity (XRR) measurements reveal that both the density and roughness of the SiN x film increase with increasing film thickness. With an increase in SiN x film thickness, a significant increase in two-dimensional electron gas (2DEG) density, drain current, extrinsic transconductance and negative threshold voltage shift of the In0.18Al0.82/GaN/Si HEMTs are observed. An optimal thickness of SiN x is ~100 nm and it yields a substantial increase in 2DEG density (~30%) with a minimum sheet resistance for In0.18Al0.82N/GaN/Si heterostructures. Furthermore, we correlate the observed SiN x film thickness-dependent electrical characteristics of In0.18Al0.82/GaN/Si HEMTs with the density of the SiN x film.

We have shown that RuOx based Schottky contacts have good potential as the anode and gate electrode in III-nitrides high power diodes and high electron mobility transistors, respectively, owing to their low leakage current1. We have also found that the electrical characteristics of RuOx Schottky contacts depend on the annealing ambient and/or pressure, namely RuOx Schottky diodes annealed in N2 exhibit better thermal stability and lower leakage current compared to those annealed in vacuum. This is believed to be related to the oxidation of RuOx to RuO2 in N2 annealing and the reduction of RuOx to Ru in vacuum annealing. Between N2 and vacuum annealing, there are differences of pressure and ambient. Hence, it is not clear if the formation of RuO2 or the reduction to Ru from RuOx is related to the annealing pressure or ambient, or both. This motivates us to investigate the effects of annealing pressure and ambient on the electrical and material characteristics of RuOx Schottky diodes by conducting annealing in vacuum, N2 and Ar, with annealing in N2 and Ar performed at the same pressure. RuOx Schottky diodes fabrication process began with Ohmic contact patterning on InAlN/AlN/GaN-on-Si(111) substrates with a sheet resistance of 490Ω/□. The Ohmic contacts (Hf/Al/Ta) were then deposited and formed by the lift-off process, followed by annealing at 600oC in vacuum for 1 minute. After Schottky contact patterning (RuOx) was sputter-deposited in Ar and O2 plasma with 2:1 flow-rate ratio. During RuOx deposition, the substrates were not heated. The Schottky contacts were also formed by means of the lift-off process, and were annealed at 800oC under different pressures and ambients (in vacuum at a pressure of 6.67 × 10-3Pa, in N2 and Ar at the same pressure of 101.3kPa) for 1 minute to study their effects on the electrical and material characteristics of RuOx Schottky contacts. RuOx Schottky diodes without annealing have a reverse leakage current of ~18.0±2.1mAcm-2 at the bias voltage of -20V (see Figure 1(a)) and Schottky barrier height (SBH) of ~0.754±0.072eV. With vacuum annealing at the pressure of 6.67×10-3Pa, the reverse leakage current increases by one order of magnitude and SBH drops to 0.546±0.050eV. In contrast, the reverse leakage currents of both RuOx Schottky diodes annealed in N2 and Ar at the same pressure (~101.3kPa) decrease by 2 orders of magnitude and SBH increases by ~0.177eV compared to those of RuOx Schottky diodes without annealing. Since the electrical characteristics of RuOx Schottky diodes with either N2 or Ar annealing are similar, and different from those with vacuum annealing, it may be deduced that the annealing pressure, and not the ambient, is the reason for the differences observed. To substantiate this, we conduct X-ray Diffraction (XRD) characterisations of our samples, as shown in Figure 1(b), where RuOx Schottky contact without annealing is observed to be amorphous. With vacuum annealing at pressure of 6.67×10-3Pa and temperature of 800oC, only Ru phases are formed and no RuOx phase is observed, owing possibly to the dissociation of Ru and O bond in RuOx. This agrees well with the relationship between the dissociation pressure and temperature of RuO2 bond proposed by Brunetti et al. 2. Since the dissociation pressure of RuO2 bond at 800oC is ~0.255Pa, which is much higher (~40 times) than the pressure of our vacuum annealing, RuOx reduces to Ru. On the other hand, with Ar annealing at the pressure of 101.3kPa, which is more than 5 orders of magnitude higher than the dissociation pressure of RuO2 bond, only RuO2 phases are formed and no Ru phase is observed. Since Ar is a noble gas, the oxidation of RuOx to RuO2 with Ar annealing and the reduction of RuOx to Ru with vacuum annealing (at the temperature of 800oC) are most likely due to the difference in the annealing pressure. In addition, with N2 annealing at the same pressure and temperature as Ar annealing, the I-V characteristic and XRD spectrum are similar to those of Ar annealed sample (see Figure 1). Hence, N2 does not seem to react with RuOx and only pressure plays a critical role in the formation of RuO2 in RuOx annealed at 800oC. In conclusion, based on our studies, the electrical and material characteristic differences observed in RuOx RuOx Schottky diodes annealed in N2, Ar and vacuum are most likely due to the annealing pressure and not the annealing ambient. References 1. L. M. Kyaw et al., Phys. Status Solidi C 11, 883(2014). 2. B. Brunetti, et al., Matls. Chem. Phys. 83, 145(2004). Figure 1

Using micro-Raman and photoluminescence (PL) techniques, the channel temperature profile is probed in AlxGa1-xN/GaN high electron mobility transistors (HEMTs) fabricated on a 200 mm diameter Si(111) substrate. In particular, RuOx-based gate is used due to the semitransparent nature to the optical excitation wavelengths, thus allowing much accurate thermal investigations underneath the gate. To determine the channel temperature profile in devices subjected to different electrical bias voltages, the GaN band-edge PL peak shift calibration with respect to temperature is used. PL analyses show a maximum channel temperature up to 435 K underneath the gate edge between gate and drain, where the estimated thermal resistance in such a HEMT structure is about 13.7 KmmW−1 at a power dissipation of ∼10 W/mm. The temperature profiles from micro-Raman measurements are also addressed from the E2-high optical phonon peak shift of GaN, and this method also probes the temperature-induced peak shifts of optical phonon from...

The authors have studied the electrical characteristics of Hf/Al/Ta ohmic contacts on In0.18Al0.82N/GaN heterostructure grown on Si (111) substrate. With annealing at 600 °C in vacuum (which is ∼200 °C lower than that for traditional Ti/Al/Ni/Au contacts), a minimum ohmic contact resistance of ∼0.58 Ω·mm and specific contact resistivity of ∼6.75 × 10−6 Ω·cm2 are obtained. The minimum contact resistance of Hf/Al/Ta contacts is comparable to that of Ti/Al/Ni/Au contacts. Owing to the lower annealing temperature, Hf/Al/Ta contacts exhibit better surface morphology and edge acuity. More importantly, Hf/Al/Ta contacts show a smooth interface with In0.18Al0.82N/GaN, whereas spike structures that penetrate the In0.18Al0.82N layer are observed for Ti/Al/Ni/Au contacts. As a result, the source–carrier-injection induced breakdown mechanism is reduced in the In0.18Al0.82N/GaN-on-Si high electron mobility transistors (HEMTs) with Hf/Al/Ta ohmic contacts, thereby leading to an improved three-terminal off-state breakdo...