Search

Successful application of finite control set model predictive control (FCS-MPC) strategies with long prediction horizon depends on the careful design of the optimization algorithm. The conventional method involves transforming the problem to an equivalent box-constrained integer least-squares (BILS) formulation that can be solved with branch-and-bound techniques such as the sphere decoding algorithm (SDA). In this work, it is proposed to define an artificial neural network (ANN) to replace the SDA, avoiding its inherent computational variability. Similarly to practical applications of the SDA, the ANN finds an approximate solution of the underlying optimization problem. In contrast, the main benefit of the proposed approach is that it can be implemented in a low-cost microprocessing platform, greatly improving the performance in terms of resources in comparison with other advanced techniques roposed in the literature.

This paper investigates the influence of a constant carrier phase shift on the DC-link capacitor harmonic current of cascaded converters used in fuel-cell and mild-hybrid electric vehicles. In these applications, a DC-DC converter can be adopted between the battery and the motor drive inverter in a cascaded structure, where the two converters share the same DC-link. Since the DC-link capacitor of such a system represents a critical component, the optimization of the converter operation to limit the current stress and extend the lifetime of the capacitor is an primary objective. This paper proposes the use of a carrier phase shift between the modulations of the two converters in order to minimize the harmonic current of the DC-link capacitor. By harmonic analysis, an optimal carrier phase shift can be derived depending on the converter configuration. Analytical results are presented and validated by hardware-in-the-loop experiments. The findings show that the pulse width modulation carrier phase shift between the interleaved boost converter and the voltage source motor drive inverter has a significant influence on the DC-link capacitor current and thus on its lifetime. A case study with two-cell and three-cell interleaved boost converters shows a possible DC-link capacitor lifetime extension of up to 390%.

Research interest in finite control set model predictive control (FCS-MPC) for power conversion devices is growing in recent years. Particularly, long prediction horizon FCS-MPC provides promising results in recent research works. However, its practical implementation is not generally straightforward due to its inherently large computational burden. To overcome this obstacle, the problem can be formulated as a least-squares integer program. Sphere decoding algorithm (SDA) is a branch and bound algorithm proposed in previous works as an efficient approach to solve this problem. In these works, SDA is formulated as an iterative process where simultaneous search is not possible. A parallel and fully scalable SDA design is proposed in this paper. The design is implemented in the FPGA of a modern Field Programmable System on Chip (FPSoC) platform. Thanks to the proposed parallelization, the required execution time is greatly reduced. Experimental results prove the feasibility and performance improvements of the proposed implementation.

Modular multilevel converters have become the prominent topology for medium- and high-voltage applications. The performance of these converters highly depends on the accuracy of the used modulation approach, for which the capacitor voltage of submodules (SM) are usually assumed to be equal. This article exhibits that ignoring the capacitor voltage differences among SMs adversely affects the system performance. This becomes more obvious the larger the capacitor voltage differences are. Hence, this article proposes a more accurate feedforward modulation approach that takes into account either the instantaneous capacitor voltage value and the real output voltage in the modulation stage. As a result, in applications where larger SM voltage differences are expected, the current distortion and control performance are improved. Particularly, switching–saving approaches benefit from this method as it enables their operation with reduced switching losses without the downsides of increased distortion due to capacitor voltage differences. The proposed approach is analyzed and compared with the nearest-level modulation and with the level-shift PWM. Simulations and experimental validation are presented to confirm the effectiveness of the proposed technique.

PV systems efficiency highly depends on the MPPT strategy to be implemented in the PV converter. Many MPPT methods on the literature are focused on improving the steady state and transient system performance extracting the maximum energy from the sun. In this paper, the impact of the MPPT methods in the PV converter is analyzed focusing the study on the capacitor across the PV array lifespan. The obtained results demonstrate that the low frequency PV voltage oscillations that are present in many MPPT methods have a large negative impact on this capacitor lifespan. Experimental and simulation results are presented in order to show that advanced MPPT methods, which avoid these low frequency oscillations, achieve higher capacitor lifespan values compared with the values obtained by applying well-known MPPT methods such as the perturb and observe or incremental conductance strategies

Este documento tiene como fin sentar las bases para el análisis de varias topologías de convertidores de potencia dc/dc. Este trabajo tiene un objetivo académico para servir como apoyo para el estudio de este tipo de convertidores de potencia a futuros alumnos de la materia. Además de los análisis teóricos de las topologías de convertidores dc/dc más convencionales, se incluyen en el documento una serie de problemas de exámenes oficiales de años anteriores de la asignatura de Electrónica de Potencia, resueltos con la metodología indicada en los análisis teóricos de los convertidores. Se pretende con ello dar a conocer al alumno cómo abordar la resolución de problemas de una manera sencilla y comprensible una vez entendidos todos los conceptos incluidos en los análisis teóricos. Además, como material de apoyo software, se incluyen una serie de archivos correspondientes a cada uno de los convertidores dc/dc incluidos en el documento. Estos archivos se pueden incluir como librerías en el software de simulación PLECS. De este modo, el alumno podrá comprobar mediante modelos de simulación cómo operan los convertidores dc/dc tras modificar los parámetros físicos de las topologías, y verificar que lo explicado en los análisis se cumple. Como futura expansión a este documento, se incluirán más topologías de convertidores dc/dc más complejas, así como más problemas correspondientes a estas topologías.

Electric variable speed drives (VSD) have been replacing mechanic and hydraulic systems in many sectors of industry and transportation because of their better performance and reduced cost. However, the electric systems still face the issue of being considered less reliable than the mechanical ones. For this reason, researchers have been actively investigating effective ways to increase the reliability of such systems. This paper is focused on the analysis of the common-mode voltage (CMV) generated by the operation of the VSDs which directly affects to the lifetime and reliability of the complete system. The method is based on the mathematical description of the harmonic spectrum of the CMV depending on the PWM method implementation. A generalized PWM method where the carriers present a variable phase-displacement is developed. As a result of the presented analysis, the CMV reduction is achieved by applying the PWM method with optimal carrier phase-displacement angles without any external component and/or passive filtering technique. The optimal values of the carrier phase-displacement angles are obtained considering the minimization of the CMV total harmonic distortion. The resulting method is easily implementable on mostly off-the-shelf mid-range micro-controller control platforms. The strategy has been evaluated in a scaled-down experimental setup proving its good performance.

Modular converters based on the connection of multiple power cells have become a competitive solution for many applications achieving high performance with reduced production and maintenance cost. However, their performance is degraded if the power modules present an unbalanced operation which is a common case in some applications and/or when they implement active thermal control methods. Variable-angle carrier-based PWM strategies face this challenge minimizing the negative impact of unequal power sharing among the cells by improving the output waveforms harmonic quality what has a direct impact on the output filters and/or components’ lifetime.

Common-mode voltage (CMV) in electric drives causes leakage current causing consequently EMI problems, loss and reduction of their components' lifetime. Several solutions have been proposed which usually lead to higher cost because additional components are used. This paper is focused on the mitigation of the resulting CMV produced by the operation of the VSD by means of a specifically designed PWM method. The proposal is based on the analysis of the CMV harmonic spectrum using the Fourier analysis. The CMV mitigation is achieved by modifying the time-shift displacement of the carriers each sampling time considering a multi-carrier PWM technique. The resulting method has been evaluated in a down scaled experimental setup and it is easily implementable on mostly off-the-shelf mid-range micro-controller control platforms. © 2013 IEEE.

Electric variable speed drives (VSDs) based on two VSDs connected to a multiphase machine are an attractive solution to replace high-power mechanic and hydraulic systems in many sectors of industry and transportation because they present high performance with reduced cost, volume and weight. Among the causes which affect the reliability of dual VSDs, the common-mode current flowing through the machine bearing is an important issue. This paper faces the mitigation of the common-mode current by reducing the common-mode voltage (CMV) generated by the operation of a dual VSD. The CMV reduction is carried out without introducing any extra device and/or passive filtering method. This CMV reduction is performed by applying a specific phase-displacement between the modulation strategies of each single inverter drive. The proposed technique has been evaluated in a down scaled experimental setup in order to test its effectiveness.

In this thesis, model predictive control (MPC) techniques are investigated with their applications to modular multilevel converters (MMCs). Since normally a large number of submodule (SM) capacitor voltages and gate signals need to be handled in an MMC, the MPC schemes studied in this thesis are employed for determining only the voltage levels of converter arms, while gate signals are subsequently generated by the conventional sorting method. Emphasis is given to inner-loop current control in terms of phase current and circulating current, aiming at performance enhancement and computation reduction. A variable rounding level control (VRLC) approach is developed in this thesis, which is based on a modification of the conventional nearest level control (NLC) scheme: instead of the conventional nearest integer function, a proper rounding function is selected for each arm of the MMC employing the MPC method. As a result, the simplicity of the NLC is maintained while the current regulating ability is improved. The VRLC technique can also be generalized from an MPC perspective. Different current controllers can be considered to generate the arm voltage references as input of the VRLC block, thus refining the control sets of the MPC. Based on the decoupled current models, the accumulated effect of SM capacitor voltage ripples is investigated, revealing that the VRLC strategy may not achieve a proper performance if the accumulated ripple is nontrivial compared to the voltage per level. Two indexes are also proposed for quantifying the current controllability of the VRLC. Benefiting from this analysis, A SM-grouping solution is put forward to apply such MPC techniques to an MMC with a large number of SMs, leading to an equivalent operation of an MMC with much reduced number of SMs, which significantly increases the current regulating capability with reduced complexity. As an example, the SM-grouping VRLC proposal is analyzed and its system design principles are described. Th

Hand-in-hand with the smart-grid paradigm development, power converters used in high-power applications are facing important challenges related to efficiency and power quality. To overcome these issues, the pre-programmed Pulse-Width Modulation (PWM) methods have been extensively applied to reduce the harmonic distortion with very low power switching losses for high-power converters. Among the pre-programmed PWM techniques, Selective Harmonic Elimination (SHE) has been the prevailing solution, but recently, Selective Harmonic Mitigation (SHM) stands as a superior alternative to provide further control of the harmonic spectrum with similar losses. However, the large computational burden required by the SHM method to find a solution confines it as an off-line application, where the switching set valid solutions are pre-computed and stored in a memory. In this paper, for the first time, a real-time implementation of SHM using an off-the-shelf mid-range microcontroller is presented and tested. The Exchange Market Algorithm (EMA), initially focused on optimizing financial transactions, is considered and executed to achieve the SHM targets. The performance of the EMA-based SHM is presented showing experimental results considering a reduced number of switching angles applied to a specific three-level converter, but the method can be extrapolated to any other three-level converter topology.

Three-level neutral-point-clamped (NPC) converter is widely used in energy conversion systems due to its good properties for high-power systems presenting output waveforms with reduced harmonic distortion. To obtain better system performance, an integral sliding-mode control (ISMC)-based direct power control (DPC) strategy is proposed for NPC converters. The controller achieves three objectives. First, an extended state observer (ESO)-based ISMC strategy, to enforce the active and reactive power to their reference values, is applied in the power tracking loop. ESO is used to reduce the influence of parameter uncertainties. Next, in the voltage regulation loop, a radial basis function neural network (RBFNN)-based adaptive ISMC strategy is applied to regulate the DC-link voltage. RBFNN is used to estimate the load variation, which is considered as a disturbance, to improve the system disturbance rejection ability. An adaptive law is used in the controller to reduce the chattering of reference active power which can reduce the current harmonic distortion. Finally, a proportional-integral (PI) control strategy is applied in the voltage balancing loop to achieve voltage balance between two DC-link capacitors. Experimental results show the effectiveness and superiority of the proposed control strategy for the NPC power converter compared with PI-based DPC strategy.

Acting as an interface between the grid and many energy systems, the active front-end (AFE) has been widely used in a large variety of industrial applications. In this paper, in order to ensure the fast dynamic performance and good disturbance rejection ability of the AFE, a high-gain observer (HGO) plus adaptive super-twisting algorithm (STA) for the three-level neutral-point-clamped (NPC) converter is proposed. Comparing with the conventional PI control strategy, the proposed controller implements the adaptive STA in the voltage regulator to provide a faster transient response. The gains of the adaptive STA keep varying according to the rules being reduced in steady state but increasing in transient conditions. Therefore, the chattering phenomenon is mitigated and the dynamic response is guaranteed. Additionally, to undermine the impact of external disturbances on the dc-link voltage, a high-efficiency HGO is designed in the voltage regulation loop to reject it. Experimental results based on a three-level NPC prototype are given and compared with the conventional PI method to validate the fast dynamic performance and high disturbance rejection ability of the proposed approach.

This work describes an efficient implementation in terms of computation time and resource usage in a Field-Programmable System-On-Chip (FPSoC) of a Finite Control Set Model Predictive Control (FCS-MPC) algorithm. As an example, the FCS-MPC implementation is used for the current reference tracking of a two-level three-phase power converter. The proposed solution is an enabler for using both complex control algorithms and digital controllers for high switching frequency semiconductor technologies. An original HW/SW (hardware and software) system architecture for an FPSoC is designed to take advantage of a modern operating system, while removing time uncertainty in real-time software tasks, and exploiting dedicated FPGA fabric for the most complex computations. In addition, two different architectures for the FPGA-implemented functionality are proposed and compared in order to study the area-speed trade-off. Experimental results show the feasibility of the proposed implementation, which achieves a speed hundreds of times faster than the conventional Digital Signal Processor (DSP)-based control platform.

The finite control set-model predictive control (FCS MPC) has been adopted as an excellent choice for the applications of multilevel converters during the last two decades for its salient performance. However, in the case of modular multilevel converters (MMCs), a high amount of calculation is always involved in the implementation, making the FCS-MPC less suitable especially for an MMC with a high number of submodules. To cope with the issue, this article proposes an MPC technique for the MMC with a very low calculation cost. In each sampling period, the arm voltage references of each phase are determined analytically by solving a constrained quadratic programming problem formulated from the cost function. Both a rigorous and simplified procedure is provided to solve the optimization problem. Then, the four nearest candi dates around the arm voltage references are evaluated, leading to a proper selection of arm voltage levels. Several experimental tests on an MMC prototype are carried out to validate the effectiveness of the proposed method. Results show that compared with the con ventional FCS-MPC method which evaluates all voltage-level com binations, the proposed scheme presents an apparent advantage in terms of calculation cost while achieving similar performance.

En los últimos años, la calidad de vida de las personas está mejorando y esto supone un aumento de la demanda eléctrica, por lo que el número de dispositivos y sistemas accionados, al menos en una de sus etapas, por energía eléctrica, está aumentando también. Estos dispositivos, denominados Sistemas de Potencia, tienen como componente base, al menos, un convertidor. En la industria, surge la necesidad de obtener mayor potencia y tensión en los convertidores, lo que dio lugar a repartir la potencia y tensión entre dispositivos, ya que, el límite de operación de estos limita la aplicación en la que se utilizarán. Aparecen lo que se denominan convertidores multinivel, que tienen una tensión a su salida, de valor elevado, fruto de sumar varios niveles de tensión de la entrada de valor más pequeño. Todo ello, gracias a la aplicación de una secuencia concreta que hace conmutar los transistores de forma adecuada, llamada modulación. Hay multitud de topologías de convertidores multinivel, la más conocida es la NPC (Figura 2), aunque tiene la desventaja de que los transistores no envejecen todos a la misma vez. Además, la tensión de los condensadores se desbalancea por el neutro del convertidor. Así, para prolongar la vida de los transistores, se sustituyen los diodos clamping por transistores, naciendo el convertidor ANPC (Figura 4). Con ellos se consigue repartir de manera eficiente el trabajo entre los demás transistores y que tengan un envejecimiento lo más similar posible. En este trabajo se pretende hacer un estudio del estado del arte del convertidor ANPC, analizar el comportamiento de los dispositivos que lo constituyen y las pérdidas que se producen al aplicar diferentes algoritmos de modulación., In the last few years, people's quality of life has improved producing an increase of the electric demand, so the number of devices and systems that are powered by electricity, in at least one of his phases, is increasing too. These devices, called Power Systems, have a converter as a basis component. In the industry, there is a need to obtain more power and voltage at the converters, resulting in a distribution of voltage and power among other devices because their operation limit will restrict the aplication in which they will be used. That is how the multilevel converters appeared. Those have a high value voltage on their out, which is the result of the different levels of low value voltage of their input. All of this is due to the application of a specific sequency called modulation which makes transistors switch properly. There are many multilevel converters topologies. The most popular is NPC (Figure 2), even though it has some disadvantages: the transistors do not get older at the same time and the capacitors are unbalanced by converter neutral. In consequence, clamping diodes are replaced by other transistors to extend the life of those transistors, resulting in the ANPC converter (Figure 4). With them it is possible to distribute the work efficiently among the rest of transistors and make them age almost at the same time. This paper seeks to do a research about the state of art of ANPC converters, to analyze the behaviour of the devices which are part of them and their power losses when they are applied diferent modulation algorithms.

El trabajo desarrollado y que se presenta en este documento es el resultado de la investigación desarrollada como parte del grupo de electrónica de potencia en la Universidad de Sevilla durante los últimos tres años. Dicha investigación se enmarca en el campo de los convertidores de potencia basados de tipo modular. Durante las últimas décadas, esta técnica se ha vuelto muy popular ya que ha dado solución a los problemas que la sociedad y la industria necesitaba permitiendo construir una nueva generación de convertidores de potencia. Sin embargo, esta técnica presenta algunos problemas cuando los convertidores son operados bajo unas condiciones desbalanceadas o asimétricas. Como consecuencia, el rendimiento y las buenas propiedades que estos convertidores presentan se ven deterioradas. Por lo tanto, el principal objetivo de este documento es dar solución a estos problemas para esta familia de convertidores de potencia. Como ocurren en la mayoría de los circuitos electrónicos, existe una analogía entre tensiones y corrientes. Esto está presente desde las leyes de Kirchoff (leyes de tensiones y corrientes) a las propiedades de los elementos electrónicos como pueden ser condensadores y bobinas, los cuales presentan una, más que clara, simetría. Así pues, problemas similares pueden ser encontrados cuando se construye un convertidor de potencia modular, ya sea en serie o en paralelo. Los convertidores serie presentan dicho problema en su tensión de salida mientras que los convertidores conectados en paralelo sufren el problema en su corriente de salida. Así que este documento puede ser dividido en dos partes bien diferenciadas. El capítulo 1 introduce al lector en el actual escenario energético. Además, este trata de explicar la razón de introducir los convertidores modulares en el escenario actual ilustrándolo con algunos ejemplos de aplicación real. Desde el capítulo 2 hasta el capítulo 9 el trabajo se centra en los problemas encontrados en los convertidores modulares

El trabajo desarrollado y que se presenta en este documento es el resultado de la investigación desarrollada como parte del grupo de electrónica de potencia en la Universidad de Sevilla durante los últimos tres años. Dicha investigación se enmarca en el campo de los convertidores de potencia basados de tipo modular. Durante las últimas décadas, esta técnica se ha vuelto muy popular ya que ha dado solución a los problemas que la sociedad y la industria necesitaba permitiendo construir una nueva generación de convertidores de potencia. Sin embargo, esta técnica presenta algunos problemas cuando los convertidores son operados bajo unas condiciones desbalanceadas o asimétricas. Como consecuencia, el rendimiento y las buenas propiedades que estos convertidores presentan se ven deterioradas. Por lo tanto, el principal objetivo de este documento es dar solución a estos problemas para esta familia de convertidores de potencia. Como ocurren en la mayoría de los circuitos electrónicos, existe una analogía entre tensiones y corrientes. Esto está presente desde las leyes de Kirchoff (leyes de tensiones y corrientes) a las propiedades de los elementos electrónicos como pueden ser condensadores y bobinas, los cuales presentan una, más que clara, simetría. Así pues, problemas similares pueden ser encontrados cuando se construye un convertidor de potencia modular, ya sea en serie o en paralelo. Los convertidores serie presentan dicho problema en su tensión de salida mientras que los convertidores conectados en paralelo sufren el problema en su corriente de salida. Así que este documento puede ser dividido en dos partes bien diferenciadas. El capítulo 1 introduce al lector en el actual escenario energético. Además, este trata de explicar la razón de introducir los convertidores modulares en el escenario actual ilustrándolo con algunos ejemplos de aplicación real. Desde el capítulo 2 hasta el capítulo 9 el trabajo se centra en los problemas encontrados en los convertidores modulares

Este tarbajo fin de grado tiene como objetivo principal presentar y analizar el inversor T-Type de 3 niveles. Para ello se utilizan 2 procedimientos. El primero consiste en un análisis teórico de la tenocológia. Además, se realiza una comparación con otras tecnologías similares que se encuentran actualmente en el mercado y se analiza las ventajas y desventajas de este modelo. El segundo consiste en un modelado en Matlab de un inversor T-Type de 500 KW. Para finalizar se presenta un Maximum Power Point Tracker (MPPT) basado en un modelo dicotómico. Se realiza una presentación teórica del modelo presentado y se presenta la implementación de este modelo en el inversor T-Type.

The rapid increase in energy demand positioned power electronics as a mean to ensure efficient, controlled and reliable power delivery. Increasing power ratings lead to larger voltages and currents to be managed by the converter. In order to deal with that circunstance, three paths have been followed: new power converter topologies, as for example multilevel topologies; new semiconductor devices, which promise lower losses with faster converter switching frequencies, and new modulation techniques. Newer modulation techniques allowed to achieve reduced losses, regulated semiconductor temperature and voltage balancing, all of these with no need to modify the converter hardware. This is desireable, as it allows to cut on design, manufacturing and set-up costs. Among these techniques, one of the proposals is to synthetize, with a reduced number of semiconductor switchings, a converter output voltage waveform, as it is demostrated in Fig. 2. In thisway, switching losses are significatively reduced, due to reduced number of conmutations in comparison with modulation techniques based in PWM. Choosing properly the switching instants, it is possible to additionaly control harmonic spectrum on voltage waveform. Therefore, the resulting waveform is optimally computed for a desired target. One of the first techniques to exploit this concept is the well-known selective harmonic elimination (SHE), which completely cancels harmonics up to a fixed harmonic order. However, new techniques allow to limit the harmonic content of a larger number of harmonics. This technique is called selective harmonic mitigation (SHM)., El incesante incremento en la demanda de energía actual ha forzado al uso de la electrónica de potencia como medio para asegurar una distribución de la misma de forma eficiente, controlada y fiable. Mayores niveles de potencia dan lugar a convertidores que deberán manejar mayores tensiones y corrientes, lo cual se ha solventado de tres formas: nuevas topologías de convertidores, como por ejemplo el desarrollo de las topologías multinivel; nuevos dispositivos semiconductores, los cuales reducen las pérdidas y permiten aumentar la frecuencia de conmutación de los equipos; y nuevas técnicas de modulación. Los nuevos avances en modulación han permitido que, manteniendo invariante el hardware, un mismo convertidor pueda operar con unas pérdidas inferiores, a temperatura regulada, con tensiones balanceadas, etc. Esto es, en general, muy deseable, ya que evita los costes de diseño, fabricación y puesta en marcha de un nuevo equipo. Dentro de estas técnicas, una de las propuestas que aparece es la de sintetizar, con un número limitado de conmutaciones, la forma de onda de salida del convertidor, como se demuestra en la Fig. 1. De esta forma, estas técnicas reducen significativamente las pérdidas, al conmutar un menor número de veces que otras técnicas de modulación como puede ser las basadas en PWM. Eligiendo de forma minuciosa los instantes en los que conmutan dichos semiconductores, se puede conseguir de forma adicional un control en el contenido espectral de la forma de onda. Así, la forma de onda se obtiene de forma óptima para un objetivo dado. Una de las primeras técnicas que explotaron esta idea es la conocida como eliminación selectiva de armónicos (selective harmonic elimination, SHE), la cual cancela por completo los armónicos hasta una frecuencia dada. Sin embargo, nuevas técnicas permiten limitar el contenido espectral hasta un número mayor de armónicos. Esta técnica se denomina mitigación selectiva de armónicos, SHM.

Multilevel cascaded H-bridge converters have become a mature technology for applications where high-power medium ac voltages are required. Normal operation of multilevel cascaded H-bridge converters assumes that all power cells have the same dc voltage, and each power cell generates the same voltage averaged over a sampling period using a conventional phase-shifted pulse width modulation (PWM) technique. However, this modulation method does not achieve good results under unbalanced operation per H-bridge in the power converter, which may happen in grid-connected applications such as photovoltaic or battery energy storage systems. In the paper, a simplified mathematical analysis of the phase-shifted PWM technique is presented. In addition, a modification of this conventional modulation method using variable shift angles between the power cells is introduced. This modification leads to the elimination of harmonic distortion of low-order harmonics due to the switching (triangular carrier frequency and its multiples) even under unbalanced operational conditions. The analysis is particularized for a three-cell cascaded H-bridge converter, and experimental results are presented to demonstrate the good performance of the proposed modulation method.

Solar systems have become very competitive solutions for residential, commercial, and industrial applications for both standalone and grid connected operations. This paper presents an overview of the current status and future perspectives of solar energy (mainly photovoltaic) technology and the required conversion systems. The focus in the paper is put on the current technology, installations challenges, and future expectations. Various aspects related to the global solar market, the photovoltaic (PV) modules cost and technology, and the power electronics converter systems are addressed. Research trends and recommendations for each of the PV system sectors are also discussed.

Cascaded H-bridge multilevel converters are usually applied for high-power systems with independent dc sources. It can be used as PV inverter or to operate independent battery stacks. In these cases, as each dc source can be working at different operational points, conventional modulators lead to high distorted output waveforms degrading the converter performance. In this paper, a modulation method as a modified version of conventional phase-shifted PWM is presented when the CHB converter has a large number of power cells. This method is an extension of a previous technique only suitable for CHB converters with three power cells per phase. Simulation results show the good performance of the proposal with higher number of cells.

The cost reduction of power-electronic devices, the increase in their reliability, efficiency, and power capability, and lower development times, together with more demanding application requirements, has driven the development of several new inverter topologies recently introduced in the industry, particularly medium-voltage converters. New more complex inverter topologies and new application fields come along with additional control challenges, such as voltage imbalances, power-quality issues, higher efficiency needs, and fault-tolerant operation, which necessarily requires the parallel development of modulation schemes. Therefore, recently, there have been significant advances in the field of modulation of dc/ac converters, which conceptually has been dominated during the last several decades almost exclusively by classic pulse-width modulation (PWM) methods. This paper aims to concentrate and discuss the latest developments on this exciting technology, to provide insight on where the state-of-the-art stands today, and analyze the trends and challenges driving its future.

For cascaded multilevel inverter topologies with a single dc supply, closed-loop capacitor voltage control is necessary for proper operation. This paper presents zero and reduced common-mode voltage (CMV) operation of a hybrid cascaded multilevel inverter with predictive capacitor voltage control. Each phase of the inverter is realized by cascading two- three-level flying capacitor inverters with a half-bridge module in between. For the presented inverter topology, there are redundant switching states for each inverter voltage levels. By using these switching state redundancies, for every sampling instant, a cost function is evaluated based on the predicted capacitor voltages for each phase. The switching state that minimizes cost function is treated as the best and is switched for that sampling instant. The inverter operates with zero CMV for a modulation index upto 86%. For modulation indices from 86% to 96%, the inverter can operate with reduced CMV magnitude (V dc /18) and reduced CMV switching frequency using the new space-vector pulsewidth modulation (SVPWM) presented herein. As a result, the linear modulation range is increased to 96% as compared to 86% for zero CMV operation. Simulation and experimental results are presented for the inverter topology for various steady state and transient operating conditions by running an induction motor drive with open loop V/f control scheme.

In this paper, a model predictive control (MPC) based on optimal switching sequences (OSSs) for a singlephase grid-connected full-bridge neutral-point-clampled (NPC) power converter is presented. The predictive control algorithm is formulated in terms of OSSs, which was originally proposed to govern three-phase power converters. In this work, the OSS concept is extended to control singlephase power converters. The proposed MPC algorithm belongs to the continuous control set MPC (CCS-MPC) and is able to provide fixed switching frequency while handling system constraints. The proposed algorithm has been experimentally tested in an NPC power converter prototype. Experimental results show the desired fixed switching behavior in the steady state condition and the intrinsic fast dynamic provided by MPC during transients. Furthermore, the test outcomes demonstrate the robustness of the proposed controller under large system parameter deviations.

Grid connected power converters play a key role in several applications such as integration of renewable energy sources and motor drives. For this reason, the development of high performance control strategies for this particular class of power converters has increasingly attracted the interest of both academic and industry researchers. This paper presents the predictive Optimal Switching Sequence Direct Power Control (OSS-DPC) algorithm for grid connected converters. The OSSDPC method belongs to the predictive direct power control (P-DPC) family and provides the desired power references by calculating globally optimal switching sequences. To address computational and implementation issues, an efficient control algorithm, named reduced OSS-DPC (ROSS-DPC) is introduced. The implementation of the proposed control strategy in a standard DSP is evaluated on a two-level power converter prototype working as a STATCOM. Experimental results show algorithm’s potential to provide high performance during both transient and steady states.