8 results on '"Klepner, S.P."'
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2. A 2-ns cycle, 3.8-ns access 512-kb CMOS ECL SRAM with a fully pipelined architecture
3. A Josephson technology system level experiment.
4. Source—Drain contact resistance in CMOS with self-aligned TiSi2.
5. Submicrometer-channel CMOS for low-temperature operation.
6. High-reliability Pb-alloy Josephson junctions for integrated circuits.
7. A 3.5 ns/77 K and 6.2 ns/300 K 64 K CMOS RAM with ECL interfaces.
8. A 15-ns CMOS 64K RAM.
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