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Post-metallization annealing (PMA) is used in device fabrication to improve MOSFET performance and reliability and is typically carried out at 400 °C or higher. However, high-temperature PMA can result in unexpected junction modifications and dopant deactivation. As an alternative, low-temperature deuterium annealing (LTDA), which is performed at an annealing temperature 100 °C lower than the conventional PMA, is introduced. The LTDA effectively reduces the traps in the silicon channel and SiO2 dielectric [e.g., gate dielectric and buried oxide (BOX)] with a low-thermal budget. Poly-Si channel thin-film transistors (TFTs) are fabricated as test vehicles (TVs) to verify the impact of LTDA. The electrical characterization of subthreshold swing (SS), threshold voltage ( ${V}_{\text {TH}}$ ), ON-state current ( ${I}_{ \mathrm{\scriptscriptstyle ON}}$ ), OFF-state current ( ${I}_{ \mathrm{\scriptscriptstyle OFF}}$ ), and gate leakage ( ${I}_{\text {G}}$ ) is comparatively studied with and without LTDA. The long-term reliability of the device following LTDA under hot-carrier injection (HCI) stress condition is confirmed. Finally, further investigation was carried out on the reduced sheet resistance ( $R_{\text {sheet}}$ ) and surface roughness of the poly-Si gate. The improvement of poly-Si roughness under diluted deuterium ambient is investigated for the first time.

To achieve a physical unclonable function (PUF) in a MOSFET, variations in the threshold voltage ( ${V}_{\text {T}}$ ) were intentionally induced by engineering surface roughness in a silicon channel through wet etching. The roughened surface produces fluctuations in gate oxide thickness and variability in crystal orientation, deviating from the (100) surface with a large number of interface traps. This results in a variation in ${V}_{\text {T}}$ . A binary bit state was encoded by using a high or low ${V}_{\text {T}}$ in each MOSFET, representing a “0” or “1” state. Three representative PUF metrics, namely uniformity, interchip Hamming distance (HDinter), and intrachip Hamming distance (HDintra), were evaluated. PUF keys with intentionally produced random surface roughness exhibited nearly ideal PUF metric values, even after a lapse of 300 days without any passivation for device protection.

Low-temperature deuterium annealing (LTDA) was applied to a silicon-on-insulator (SOI) n-channel FinFET to improve device performance and reliability. LTDA at 300 °C, which is roughly 100 °C lower than a conventional forming gas annealing (FGA) process with hydrogen, is attractive to reduce the thermal budget. To confirm improved performance, the ON-state current ( ${I}_{\text {on}}{)}$ , OFF-state current ( ${I}_{\text {off}}{)}$ , subthreshold swing (SS), trans-conductance ( ${g}_{m}{)}$ , and gate leakage current ( ${I}_{\text {G}}{)}$ were evaluated. Thereafter, the parasitic sheet resistance ( ${R}_{\text {poly,sheet}}$ ) of gate was characterized and compared between before and after LTDA. The decreased ${R}_{\text {poly,sheet}}$ induced by LTDA is attractive for reducing RC delay. In a reliability point of view, damaged device characteristics by intentional hot-carrier injection (HCI) were recovered by LTDA. In addition to electrical analyses of LTDA effects, deuterium to form the Si–D bonds at the Si channel interface was physically mapped along the perpendicular direction to a FinFET by using time-of-flight secondary-ion mass spectrometry (ToF-SIMS).

Forming gas annealing (FGA) in a deuterium (D2) ambient is crucial importance to MOSFET fabrication technologies related to alleviation of trap state at Si/SiO2 interface as well as oxide bulk by $D_{2}$ passivation. In this study, post-metal annealing (PMA) process with $D_{2}$ and $N_{2}$ gases under a high-pressure condition was conducted to verify performance enhancement in gate-enclosed FETs. We explored the trap behaviors inside the bandgap of Si and $SiO_{2}$ by quantitatively using capacitance-voltage ( ${C}$ – ${V}$ ) characteristics. Furthermore, the change of deuterium and nitrogen ions in Si/SiO2 gate stack before and after the PMA process was directly investigated by time-of-flight secondary ion mass spectroscopy (ToF-SIMS) depthprofiling technique.