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A deterministic, directed, parallel electrostatic assembly and transfer process is being developed to arrange chips for electronics applications. Singulated chips 10 um - 200 um in size and initially in solution, are sorted, transported and oriented to form programmed patterns. The arrangements are then transferred to a final substrate with contact stamping or an electrostatic roller belt. Demonstrations achieved include automated parallel assembly, micrometer scale registration, heterogeneous integration, inch scale outputs, and basic functional circuits. The eventual goal is the ability to integrate millions of chiplets into systems with fine control over large areas to enable next generation electronic systems.

Neural probes for intracortical neuromodulation in the brain have advanced with the developments in micro- and nanofabrication technologies. Most of these technologies for the intracortical stimulation have relied on the direct electrical stimulation via electrodes or arrays of electrodes. Generating electric fields using time-varying magnetic fields is a more recent neuromodulation technique that has proven to be more specifically effective for the intracortical stimulation. Additionally, current-actuated coils require no conductive contact with tissues and enable precise tailoring of magnetic fields, which are unaffected by the non-magnetic nature of the biological tissue and encapsulation layers. The material and design parameter space for such micro-coil fabrication can be optimized and tailored to deliver the ideal performance depending on the parameters needed for operation. In this work, we review the key requirements for implantable microcoils including the probe structure and material properties and discuss their characteristics and related challenges for the applications in intracortical neuromodulation.

Printing as a manufacturing technique is a promising approach to fabricate low-cost, flexible, and large area electronics. Over the last two decades, a wide range of applications has been explored, among them displays, sensors, and printed radio-frequency identification devices. Some of these turned out to be challenging to commercialize due to the required infrastructure investment, accuracy or performance expectations compared to incumbent technologies. However, the progress in terms of material science, device, and process technology now makes it possible to target some realistic applications such as printed sensor labels. The journey leading to this exciting opportunity has been complex. This review describes the experience and current efforts in developing the technology at PARC, a Xerox Company. Printed smart labels open up low-cost solutions for tracking and sensing applications that require high volumes and/or would benefit from disposability. Examples include radiation tags, one-time use medical sensors, tracking the temperature of pharmaceuticals at the item level, and monitoring food sources for spoilage and contamination. Higher performance can be achieved with printed hybrid electronics, integrating microchip-based signal processing, wireless communication, sensing, multiplexing, as well as ancillary passive elements for low-profile microelectronic devices, opening up further applications. This technology offers custom circuitry for demanding applications and is complementary to mass printed transistor circuits. As an example, we describe a prototype sense-and-transmit system, focusing particularly on issues of integration, such as impedance matching between the sensor and circuits, robust printed interconnection of the chips, and compatible interface electronics between printed and discrete parts. Next-generation technologies will enable printing of entire smart systems using microchip inks. A new printing concept for the directed assembly of silicon microchips into functional circuits is described. The process is scalable and has the potential to enable additive, digital manufacturing of high-performance electronic systems.

The micro-CPV concept being developed under the ARPA-E MOSAIC (Micro-scale Optimized Solar-cell Arrays with Integrated Concentration) program uses arrays of micro unit cells (or elements) such that the material usage, weight, and the required structural strength can all be scaled down favorably. Unfortunately, one of the essential unfavorable scaling factors is the assembly cost due to the many micro scale components that must be deposited, positioned, oriented, and connected over large areas. PARC and Sandia are developing a prototype platform that uses dynamic electric field micro-assembly to demonstrate micro chiplet printing - assembling a desired solar cell chip at a designated location with well controlled orientation. Xerographic printing systems utilizing this method can be extended to provide high-throughput, on-demand heterogeneous assembly of micro-CPV systems.

Additive manufacturing and 3D printing are poised to reshape entire manufacturing value chains. To be truly disruptive, additive manufacturing has to move beyond shapes and colors. Novel printing technologies are beginning to emerge that enable conformal electronics and even printing with inks containing microchips. This in turn also creates new openings for the progress of electronics itself. Over the last 50 years silicon microelectronics advanced through shrinking device dimensions and packing more and more functionality into tiny spaces. Printing technologies open up exciting new ways of scaling electronics “Beyond Moore”, through the integration of micro and macro, creating new form factors, complex shapes, conformal devices and distributed systems. Printed, hybrid electronics systems will enable new classes of sensor systems, structural electronics and wearable devices, where the “system is the package”.

The effects of the physical channel length on the current-voltage characteristics of thin film transistors (TFTs) made with poly[5,5′-bis(3-dodecyl-2-thienyl)-2,2′-bithiophene] were examined. Coplanar transistors with fully patterned electrodes on insulating substrates and with a common gate structure on thermal oxide were fabricated. The output characteristics of TFTs with channel lengths shorter than 10μm showed the presence of a parasitic contact resistance and the lack of current saturation. The origin of these nonidealities was examined by the application of models that included self-heating effects and breakdown of the channel region at high applied biases. The analysis suggests that carriers can break away from the channel at high bias voltages and flow through a bulk region of the semiconducting film leading to higher currents than otherwise expected.

Pulsed excimer-laser processing of amorphous silicon on glass substrates enables the fabrication of high-quality polycrystalline silicon (poly-Si) thin-film transistors. Here we describe the fabrication and testing of prototype imagers fabricated in CMOS poly-Si using a low-temperature, laser-crystallization process on glass substrates. Integrated shift registers and buffers for driving the gate lines of the array and integrated multiplexers on the data lines have been produced and are shown to run the imagers successfully without using external gate-line electronics. In addition, a three-transistor poly-Si circuit has been fabricated at each pixel, providing a charge gain of 11 for the small photo signal and a low noise level of 1200 electrons RMS.

Phase-change wax-based printed masks, in place of conventional photoresist masks, were used to fabricate a-Si:H thin-film transistors (TFTs). Printed wax-mask features with a minimum feature size of ∼20 μm were achieved using an acoustic-ink-printing process. Both discrete and matrix addressing structured bottom-gate TFTs with source-drain contacts overlapping the channel were created using a four-mask process. The TFTs had I–V characteristics comparable to photolithographically patterned devices, with mobility of 0.6–1 cm2/V s, threshold voltage of 2–3 V, and on/off ratios exceeding 107 for devices with channel lengths below 50 μm . The wax-mask process was also used to fabricate self-aligned TFT devices, eliminating the source-drain contact overlap constraint.

A large-area two-color image sensor array made with amorphous silicon (a-Si:H) technology is described. Mesa-isolated double-junction p-i-n-i-p a-Si:H sensors discriminate the two spectral bands—blue/green and red—according to the polarity of the applied voltage bias. The 512×512 element active-matrix array with 75 μm pixel pitch is addressed using a-Si:H thin-film switching transistors. Under steady state illumination, the array exhibits a linear response, good color separation, and good spatial response as measured by the line-spread function, so that images obtained with the array are clear and sharp. The response to transient illumination exhibits image lag and a strong dependence of the signal on integration time, both of which depend on the bias polarity. Switching the bias voltage also induces strong transient properties. These effects are attributed to the back-to-back diodes, which act as capacitative dividers in the generation and readout of the signal. The transient effects compromise the pract...

Studies are reported of the image-blur effects caused by lateral crosstalk between neighboring pixels of large-area amorphous silicon (a-Si:H) image sensors. Data are obtained from high fill factor sensor arrays using 512×512 pixels of 75 μm size and a pixel gap of 10 μm. Measurements of the line-spread function determine the charge transfer from the illuminated pixel to neighboring ones along both array orientations, and for different samples and operating conditions. The lateral conduction is attributed to three effects: conduction along the interface between the a-Si:H film and the underlying passivation; field-dependent electron injection at the edge of the sensor; and field enhancement of the interface conduction due to the bias applied to the address lines. We show that the crosstalk can be controlled by the choice of operating conditions and optimization of the materials.

Pulsed excimer-laser processing of amorphous silicon on non-crystalline substrates allows for the fabrication of high-quality polysilicon materials and thin-film transistors (TFTs). Under optimized processing conditions, these polysilicon TFTs have high mobilities, sharp turn-on, low off-state leakage currents and good spatial uniformity. These improved parameters, particularly the low off-state leakage currents and good uniformity, enable, not only displays, but also the more demanding flat-panel imaging arrays to be fabricated in polysilicon, and results on an imager are presented.

Calculations and measurements of parasitic capacitance in active matrix sensor arrays used for light and x-ray imaging are presented. We focus on arrays with continuous sensor layers and base the calculations on actual structures used for x-ray and light imaging. Different cross sections of the pixel allow the various components of the capacitance from the thin film transistor, the sensor, and metal crossovers to be determined by numerical two-dimensional solution of Poisson’s equation. The calculations give the total and the individual components of the parasitic capacitance in the data line, and allow us to evaluate their effect on electronic noise and imager sensitivity. The theoretical values are compared to measurements performed on arrays with 75 μm pixel pitch, showing agreement within 10%–20%. The numerical simulations are used to determine the optimized array configuration that can reduce the parasitic capacitance to ∼6 fF/pixel, which is only 15% of the present values. The capacitance is compare...

Laser processing allows the fabrication of self-aligned amorphous Si thin film transistors (a-Si:H TFTs). These devices have much smaller parasitic capacitance between gates and source/drain contacts and can have much shorter channel lengths compared to the conventional a-Si:H TFTs. We have fabricated matrix-addressed, optical imager arrays using these new a-Si:H TFTs as pixel switches. We also have demonstrated that four-phase dynamic shift registers using short channel a-Si:H TFTs can be operated at a clock speed of 400 kHz (less than 0.625 μs for each clock phase), indicating the possibility of integrating some of the peripheral circuits based on a-Si:H TFT technology. The advantages of using self-aligned a-Si TFTs as pixel switches in large-area, flat-panel imagers are discussed. Improved noise performance is expected for large area imager arrays.

Pulsed excimer-laser processing of amorphous silicon on non-crystalline substrates allows the creation of new materials and devices. In this paper, we review (1) fabrication of polysilicon thin film transistors (TFTs) on glass substrates, (2) integration of polysilicon and amorphous silicon devices on the same glass substrate and (3) formation of self-aligned contacts for amorphous silicon thin-film transistors via laser doping.

A jet-printed digital-lithographic method, in place of conventional photolithography, was used to fabricate 64 /spl times/ 64 pixel (300 /spl mu/m pitch) matrix addressing thin-film transistor (TFT) arrays. The average hydrogenated amorphous silicon TFT device within an array had a threshold voltage of /spl sim/3.5 V, carrier mobility of 0.7 cm/sup 2//V/spl middot/s, subthreshold slope of 0.76 V/decade, and an on/off ratio of 10/sup 8/.

We report here the realization of a large-area compatible, flat panel imager with pixel level amplifiers. The imager is based on excimer-laser crystallized, polycrystalline silicon (poly-Si) thin-film transistors. By incorporating pixel level amplification, flat panel imagers are expected to be able to achieve unprecedented noise performance, with the hope of achieving single photon detection. We have demonstrated good noise performance of 1300 erms, exceeding the commonly accepted industry standard of 2000 erms. We also briefly discuss the source of the extra noise, as well as the possibility of further reducing the noise level.

An integrated color image sensor, made entirely with amorphous silicon (a-Si:H) large-area technology, is presented. The a-Si:H based sensor is a double-junction p-i-n-i-p photodiode that discriminates two spectral bands according to the bias voltage. The active-matrix addressed array has 512×512 pixels with 75 μm pixel pitch and uses thin-film transistors as pixel switches. The array structure and the spectral response are discussed, and color images taken by the system using two bias voltages demonstrate the compatibility of color sensors with large-area active-matrix addressing techniques.

Large area color sensor arrays based on vertically integrated thin-film sensors were realized. The complete color information of each color pixel is detected at the same position of the sensor array without using optical filters. The sensor arrays consist of amorphous silicon thin film color sensors integrated on top of amorphous silicon readout transistors. The spectral sensitivity of the sensors is controlled by the applied bias voltage. The operating principle of the color sensor arrays is described. Furthermore, the image quality and the pixel cross talk of the sensor arrays is analyzed by measurements of the line spread function and the modulation transfer function. (c) 2006 Optical Society of America.

Large-area color sensor arrays based on vertically integrated thin-film sensors were realized. The complete color information of each color pixel is detected at the same position of the sensor array without using optical filters. Sensor arrays consist of amorphous silicon thin-film color sensors integrated on top of amorphous silicon readout transistors. The spectral sensitivity of the sensors is controlled by the applied bias voltage. The operating principle of the color sensor arrays and the influence of device design on spectral sensitivity are described. Furthermore, the image quality of the sensor arrays is analyzed by measurements of the line spread function and the modulation transfer function

This paper describes a hybrid bio-agent concentrator device based on the combined performance of a modified field flow fractionation system for particulate deposition and a traveling wave transport mechanism to deliver and concentrate particulates into a sample well. The device has been successfully tested on B. thurengiensis and polystyrene beads in the threat range of 1-10 /spl mu/m. This MEMS device may increase the concentration of post-ultrafiltration retentates or post-aerosol collected hydrosols by another 100X. As a front-end to detection, it will enhance the effective sensitivity of the detector. The device may also have bio medical implications in bio separation and cell enrichment.

We report recent advances in the development of low power consumption, emissive, flexible active matrix displays through integration of top emitting phosphorescent OLED (T-PHOLED) and poly-Si TFT backplane technologies. The displays are fabricated on flexible stainless steel foil. The T-PHOLEDs are based on UDC phosphorescent OLED technology, and the backplane is based on PARC's Excimer Laser Annealed (ELA) poly-Si TFT process. We also present progress in operational lifetime of encapsulated T-PHOLED pixels on planarized metal foil and discuss PHOLED encapsulation strategy.

OLEDs are an ideal technology for electronic display applications. They are fabricated by depositing very thin films of organic materials at low temperatures (

Color information is commonly captured by silicon sensor arrays covered by a mosaic of color filters. However, the detection of the colors red, green and blue at different spatial positions of the sensor arrays leads to color aliasing or color moiré effects. This effect inherently limits conventional sensor arrays. In order to overcome this limitation we have realized color sensors based on vertically integrated thin-film structures. The complete color information can be detected at the same position of a sensor array without using optical filters. The sensors consist of a multilayer thin-film system based on amorphous silicon and its alloys. The spectral sensitivity of the sensors can be controlled by the optical and optoelectronic properties of the employed materials and the applied bias voltages. The working principle of the thin-film sensors and the sensor arrays will be presented. For the first time a large area three color sensor array was realized without using optical filters.

Pulsed Excimer-Laser Annealed (ELA) poly-Si Thin Film Transistor (TFT) technology has become an important technology for large area electronic applications. In this talk, we will report the progress and current status of our effort in building advanced flat panel imagers based on poly-Si TFT technology.

The technology of large area electronics has made significant progress in recent years because of the fast maturing excimer laser annealing process. The new thin film transistors based on laser processed poly silicon provide unprecedented performance over the traditional thin film transistors using amorphous silicon. They open up the possibility of building flat panel displays and imagers with higher integration and performance. In this paper, we will review the progress of poly-Si thin film transistor technology with emphasis on imager applications. We also discuss the challenges of future improvement of flat panel imagers based on this technology.

We demonstrate the ability to orient, position, and transport microchips (“chiplets”) with electric fields. In an open-loop approach, modified four phase traveling wave potential patterns manipulate chiplets in a dielectric solution using dynamic template agitation techniques. Repeatable parallel assembly of chiplets is demonstrated to a positional accuracy of 6.5 μm using electrodes of 200 μm pitch. Chiplets with dipole surface charge patterns are used to show that orientation can be controlled by adding unique charge patterns on the chiplets. Chip path routing is also demonstrated. With a closed-loop control system approach using video feedback, dielectric, and electrophoretic forces are used to achieve positioning accuracy of better than 1 μm with 1 mm pitch driving electrodes. These chip assembly techniques have the potential to enable future printer systems where inputs are electronic chiplets and the output is a functional electronic system.

Pulsed Excimer-Laser Annealing (ELA) has become an important technology to produce high performance, poly-Si Thin Film Transistors (TFTs) for large area electronics. The much-improved performance of these poly-Si TFTs over the conventional hydrogenated amorphous Si TFTs enables the possibility of building next generation flat panel imagers with higher-level integration and better noise performance. Both the on-glass integration of peripheral driver electronics to reduce the cost of interconnection and the integration of a pixel level amplifier to improve the noise performance of large area imagers have been demonstrated and are discussed in this paper.

We report studies of the image-blur effects caused by lateral cross-talk between neighboring pixels of large-area amorphous silicon (a-Si:H) image sensors. The lateral conduction is attributed to three effects: conduction along the interface between the a-Si:H film and the underlying passivation; field-dependent electron injection at the edge of the sensor; and a field enhancement of the interface conduction due to the bias applied to the address lines. We show that the cross-talk can be controlled by choice of the operating conditions and optimization of the materials.

Phase-change wax-based printed masks were used to fabricate a-Si:H thin-film transistors (TFTs) in place of conventional lithography. Wax-mask features with a minimum feature size of ∼20 [.proportional]m was achieved using an acoustic-ink-printing process. Bottom-gate TFTs with source-drain contacts overlapping the channel were created using a four-mask process. The TFTs have I-V characteristics comparable to photolithographically patterned devices, with mobility of 0.6-1 cm2/V·s, threshold voltage of 2-3 V, and on/off ratios exceeding 107, for devices with channel lengths below 50[.proportional]m.

A very large enhancement of the photoconductivity in pentacene transistors at negative gate voltages is observed. The enhancement is attributed to the separation of electron-hole pairs by the gate field and the consequent slow recombination. The ratio of photoconductivity to dark conductivity is approximately independent of mobility, for samples with a wide range of microstructure. The pentacene films were thermally deposited at different deposition rates and temperatures on silicon thermal oxide. The structure and the morphology of the films were studied by x-ray diffraction measurements and atomic force microscopy, and the influence of the deposition temperature on the morphology and structural properties is discussed. The size of the crystals is correlated with the crystalline bulk phase of the material, which increases with the deposition temperature and the film thickness. The mobility of the transistors increases with the size of the crystallites.

This paper reports on the first full realization and characterization of a two-dimensional array of amorphous silicon (a-Si:H) color sensors, addressed by integrated amorphous silicon-based thin-film transistors (TFTs). The array includes 512 × 512 pixels with 75-µm pitch, or about 340 dpi. Each pixel features a color sensor realized by a p-i-n-i-p stack of doped and undoped a-Si:H layers, and the TFT. The color sensors are made of two back-to-back p-i-n diodes, which selectively sense the illumination according to the polarity of the applied bias voltage. The sensor layers are grown on top of the TFTs to improve the array fill factor. The p-in-i-p sensor stack is mesa-isolated into single sensors to reduce cross-talk.Images are acquired using two bias voltages and yield the red and blue/green components of the original with a good color separation. A color image is reconstructed using the information from the two images acquired. Aside from a color bias, which is expected for a two-color reconstruction, the imaging system works well. In particular, the array shows very low leakage currents, which enable a very large dynamic range and sensitivity. In the response of the array to a light pulse, the bottom thick diode ensures a fast drop in the signal after the flash, while the top thin diode exhibits some residual image lag.

The pixel cross-talk is investigated in two-dimensional amorphous silicon (a-Si:H) imager arrays based on the new high fill factor design. In this configuration a continuous a-Si:H sensor extends over the whole surface of the imager, and a buried insulator material with low dielectric constant is used to separate the sensor from the underlying active matrix readout circuit. We find that the lateral conduction between neighboring pixels is mainly determined by the quality of the buried insulator-sensor interface, rather than the specific buried material itself. Minimum cross-talk values below 1% are obtained for different insulator materials including silicon oxynitride and thicker polymer based resins. The quality of this interface also affects trapping and recombination of the photogenerated carriers, influencing important imager properties such as sensitivity and image lag.

Pulsed excimer-laser processing of amorphous silicon on non-crystalline substrates allows for the fabrication of high-quality polysilicon thin-film transistors (TFTs). It also provides procedures for doping self-aligned amorphous silicon TFTs. In addition, laser-crystallized polysilicon exhibits some interesting materials properties, such as, large lateral grain growth with a corresponding enhancement in the electron mobility. Under optimized processing conditions, excellent polysilicon TFTs with high mobilities, sharp turn on, low off-state leakage currents and good spatial uniformity have been achieved. These improved parameters, particularly the low off-state leakage currents and good uniformity, enable not only displays but also the moredemanding flat-panel imaging arrays to be fabricated in polysilicon. Results on both polysilicon CMOS circuits and a polysilicon flat-panel imager are presented.

Micromachining has potential applications for large area image sensors and displays, but conventional MEMS technology, based on crystalline silicon wafers cannot be used. Instead, large area devices use deposited films on glass substrates. This presents many challenges for MEMS, both as regards materials for micro-machined structures and the integration with large area electronic devices. We are exploring the novel thick photoresist SU-8, as well as plating techniques for the fabrication of large area MEMS. As an example of its application, we have applied this MEMS technology to improve the performance of an amorphous silicon based image sensor array. SU-8 is explored as the structural material for the X-ray conversion screen and as a thick interlayer dielectric for the thin film readout electronics of the imager.

We have successfully used self-aligned Amorphous Si Thin-Film Transistors, fabricated by a laser doping/annealing process, to construct dynamic shift register circuits, which can be used as gate-line drivers or in other peripheral circuits for flat-panel displays and imagers. Taking advantage of easily scaling down the TFT channel length in a self-aligned process, much higher circuit speeds can be achieved compared to that of circuits using conventional TFTs. We have successfully demonstrated a four-phase dynamic shift register, operating at a clock speed higher that 250 kHz (1 μs for each clock phase) built on 3 μm channel length TFTs. This new technology opens up possibilities for integrating peripheral circuits in flat-panel displays and imagers based on a-Si TFTs.

Amorphous silicon large area sensor arrays are in production for x-ray medical imaging. The most common pixel design works very well for many applications but is limited in spatial resolution because the available sensor area (the fill factor) vanishes in small pixels. One solution is a 3-dimensional structure in which the sensor is placed above the active matrix addressing. However, such high fill factor designs have previously introduce cross talk between pixels.We present data for a design in which the a-Si:H p-i-n photodiode sensor layer has a continuous i-layer and top p+-layer, and a patterned n+-layer contact to the pixel. Arrays of 64 μm and 75μm pitch have been fabricated and are the highest resolution a-Si:H arrays reported to date. The resolution matches the pixel size, and sensitivity has been improved by the high fill factor. Comparison is made between arrays with standard TFTs and TFTs with self-aligned source and drain contacts. Data line capacitance is improved by use of the self-aligned contacts.Measurements are included on the contact to bias capacitance. The high fill factor design greatly suppresses lateral leakage currents, while retaining ease of processing. Provided illumination levels remain below saturation, the resolution matches expectation for the pixel size.

Self-aligned structures for bottom-gate amorphous Si TFTs provide a number of advantages, including reduced parasitic capacitance, smaller device dimensions, and improved uniformity in device performance for large-area electronics. A difficult challenge in making self-aligned TFT structures is the necessity of making source/drain contacts that exhibit low contact resistances and that are precisely aligned relative to the gate electrode. In this article, we describe a novel process for fabricating self-aligned amorphous Si TFTs. This process utilizes a pulsed excimer laser (308 nm) to dope or to activate dopants in a-Si to form the source/drain contacts. An important feature of the device design is an optical filter to protect the a-Si channel region from radiation damage during the 308 nm laser process. However, the optical filter allows the transmission of the uv light for lithography exposure from the backside of the substrate to align the channel region with the gate electrode. This new process enables the fabrication of high performance self-aligned a-Si TFTs with poly-Si source and drain contacts.

Distinct features of amorphous and polycrystalline silicon are attractive for large-area electronics. These features can be utilized in a hybrid structure which consists of both amorphous and polycrystalline silicon materials. For example, an extension of active matrix technology is the integration of peripheral drivers for the improvement of reliability, cost reduction and compactness of the packaging for large-area electronics. This goal can be approached by a combination of amorphous silicon pixel switches and polysilicon drivers. A monolithic fabrication process has been developed based on a simple modification of the amorphous silicon transistor process which uses selective area laser crystallization. This approach allows us to share many of the process steps involved in making both the amorphous and polysilicon devices. Another example of the hybrid device structure is a self-aligned amorphous silicon thin film transistor with polysilicon source and drain contacts. The advantages of the self-aligned transistor are reduction of the parasitic capacitance and scaling down of the device dimension. With a selective laser doping technique, self-aligned and shortchannel amorphous silicon thin film transistors have been demonstrated.

Flat panel X-ray imagers using amorphous silicon active matrix addressing have been introduced to the medical imaging market at sizes up to 40×40 cm and with up to 10 million pixels. Some new technology developments, which can further increase the performance of these devices, are described. High atomic number polycrystalline X-ray photoconductors can operate near the theoretical sensitivity and at reasonably low bias voltages. The higher sensitivity obtained in HgI2 allows single-photon detection, which opens up new imaging opportunities. Another approach to improve sensitivity is to integrate an amplifier at the pixel level, which requires laser-recrystallised polysilicon transistors. A pixel-level source follower amplifier is shown to have enough gain to overcome other noise sources. A three-dimensional device structure is needed to accommodate the pixel electronics, and so the sensor is deposited on top of the electronics, separated by a thick passivation layer. Future possible detector technologies based on printing and organic semiconductors are discussed.