101 results on '"Integrated circuits -- Intellectual property -- Methods -- Reports"'
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2. Patent Issued for Display driver integrated circuit and display driving method for generating clock pattern (USPTO 12183251)
3. Patent Issued for Monitoring circuit, integrated circuit including the same, and operating method of monitoring circuit (USPTO 12158501)
4. Patent Issued for Methods for producing a 3D semiconductor memory device and structure (USPTO 12154817)
5. Patent Issued for Method of detecting a possible thinning of a substrate of an integrated circuit via the rear face thereof, and associated device (USPTO 12142536)
6. Patent Issued for Method of managing data in storage device based on variable size mapping, method of operating storage device using the same and storage device performing the same (USPTO 12141074)
7. Patent Issued for Quantum gate optimization method and apparatus, device, and storage medium (USPTO 12124923)
8. Patent Issued for Method for protecting data stored in a memory, and corresponding integrated circuit (USPTO 12125808)
9. Patent Issued for Method and apparatus for batch testing device, related computer device and medium (USPTO 12112815)
10. Patent Issued for Computer memory arrays employing memory banks and integrated serializer/de-serializer circuits for supporting serialization/de-serialization of read/write data in burst read/write modes, and related methods (USPTO 12100473)
11. Patent Issued for On-chip debugging device and method (USPTO 12085612)
12. Patent Issued for Processing system, related integrated circuit, device and method (USPTO 12061530)
13. Researchers Submit Patent Application, 'Method To Produce A 3d Multilayer Semiconductor Device And Structure', for Approval (USPTO 20240274534)
14. Patent Issued for Interface circuit and thermal history control method (USPTO 12030323)
15. Patent Issued for Integrated circuit packages having electrical and optical connectivity and methods of making the same (USPTO 12032216)
16. Patent Issued for Domain clock and power activation control circuit to reduce voltage droop and related methods (USPTO 12019494)
17. Researchers Submit Patent Application, 'Semiconductor Chip, Debug System, And Synchronization Method', for Approval (USPTO 20240168861)
18. Patent Issued for Interface circuit, and method and apparatus for interface communication thereof (USPTO 11989150)
19. Patent Issued for Method and system for data tracking and exchange (USPTO 11989791)
20. Patent Issued for Method and device for constructing quantum circuit of QRAM architecture, and method and device for parsing quantum address data (USPTO 11983606)
21. Patent Issued for Check tool and check method for design rule check rule deck of integrated circuit layout (USPTO 11983480)
22. Patent Issued for Method for calibrating a scanning charged particle microscope (USPTO 11972922)
23. Patent Issued for Method and device for reading data in a nonvolatile memory device based on cell counts of two states (USPTO 11972791)
24. Patent Issued for Activity smoothener circuit controlling rates of change of localized processing activity in an integrated circuit (IC), and related methods (USPTO 11960338)
25. Patent Issued for Interface circuit, memory device, storage device, and method of operating the memory device (USPTO 11960728)
26. Patent Issued for Structure and method for process control monitoring for group III-V devices integrated with group IV substrate (USPTO 11929442)
27. Patent Issued for Method for packaging an integrated circuit (IC) package with embedded heat spreader in a redistribution layer (RDL) (USPTO 11929300)
28. Patent Issued for Method and arrangement for protecting a digital circuit against time errors (USPTO 11929746)
29. Patent Issued for Method and circuit for calibration of high-speed data interface (USPTO 11921537)
30. Patent Issued for Method of reducing reliability degradation of nonvolatile memory device, nonvolatile memory device using the same and method of testing nonvolatile memory device using the same (USPTO 11915770)
31. Patent Issued for Systems and methods for virtually partitioning a machine perception and dense algorithm integrated circuit (USPTO 11907726)
32. Patent Issued for Semiconductor structure and method for forming the same (USPTO 11903181)
33. Patent Issued for System and method for bypass memory read request detection (USPTO 11892955)
34. Patent Issued for Packaging method for fan-out wafer-level packaging structure (USPTO 11862595)
35. Patent Issued for Method for performing memory calibration, associated system on chip integrated circuit and non-transitory computer-readable medium (USPTO 11862224)
36. Patent Issued for Systems and methods for packaging an acoustic device in an integrated circuit (IC) (USPTO 11855608)
37. Patent Issued for Method of resetting storage device, storage device performing the same and data center including the same (USPTO 11854648)
38. Patent Issued for Terminal apparatus, method, and integrated circuit (USPTO 11849363)
39. Patent Issued for Integrated circuit, method and computer program (USPTO 11842969)
40. Patent Issued for TSV testing method and apparatus (USPTO 11835573)
41. Patent Issued for Input supply circuit and method for operating an input supply circuit (USPTO 11791817)
42. Patent Issued for Processing system, related integrated circuit, device and method (USPTO 11762794)
43. Patent Issued for Fan-out packaging structure and method (USPTO 11756871)
44. Patent Issued for Systems and methods for executing a programmable finite state machine that accelerates fetchless computations and operations of an array of processing cores of an integrated circuit (USPTO 11755806)
45. Patent Issued for Method of operating storage device, storage device performing the same and storage system including the same (USPTO 11748223)
46. Patent Issued for Method for obfuscation of hardware (USPTO 11741389)
47. Patent Issued for Three-dimensional chip packaging structure and method thereof (USPTO 11735564)
48. Patent Issued for Scan circuit and method (USPTO 11726140)
49. Patent Issued for Capacitor structure including bonding pads as electrodes and methods of forming the same (USPTO 11728305)
50. Patent Issued for Semiconductor structure and method of forming same (USPTO 11688764)
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