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The Resistive Random Access Memory (RRAM) is a new type of non-volatile memory based on the resistive memory device. Researchers are currently moving from resistive device development to memory circuit design and implementation, hoping to fabricate memory chips that can be deployed in the market in the near future. However, so far the low manufacturing yield is still a major issue. In this paper, we propose defect and fault models specific to RRAM, i.e., the Over-Forming (OF) defect and the Read-One-Disturb (R1D) fault. We then propose a March algorithm to cover these defects and faults in addition to the conventional RAM faults, which is called March C*. We also develop a novel squeeze-search scheme to identify the OF defect, which leads to the Stuck-At Fault (SAF). The proposed test algorithm is applied to a first-cut 4-Mb HfO 2 -based RRAM test chip. Results show that OF defects and R1D faults do exist in the RRAM chip. We also identify specific failure patterns from the test results, which are shown to be induced by multiple short defects between bit-lines. By identifying the defects and faults, designers and process engineers can improve the RRAM yield in a more cost-effective way.

DRAM renovation calls for a holistic architecture exploration to cope with bandwidth growth and latency reduction need. In this paper, we present DRAM area power timing (DArT), a DRAM area, power, and timing modeling tool, for array assembly and interface customization. Through proper design abstraction, our component-based modeling approach provides increased flexibility and higher accuracy, making DArT suitable for DRAM architecture exploration and performance estimation. We validate the accuracy of DArT with respect to the physical layout and circuit simulation of an industrial 68 nm commodity DRAM device as a reference. The experiment results show that the maximum deviations from the reference design, in terms of area, timing, and power, are 3.2%, 4.92%, and 1.73%, respectively. For an architectural projection by porting it to a 45 nm process, the maximum deviations are 3.4%, 3.42%, and 8.57%, respectively. The combination of modeling performance, flexibility, and accuracy of DArT allows us to easily explore new DRAM architectures in the future, including 3-D stacked DRAM.

The aim of this study was to isolate and cultivate protoplasts of the green alga Ulva fasciata Delile and subsequently induce them to form a microthallus suspension for algal seed stock. The protoplasts were covered with secreted mucilage following 6 h of culture when viewed with SEM. The mucilage fused to form thick layers during day 1 of culture. Microfibrillar cell walls were deposited into the thick layers of mucilage on the 5th day of culture. An average of about 10% of the freshly isolated protoplasts began to divide at 6-14 days. These protoplasts subsequently developed varied morphologies, depending on the time of collection during the year. Protoplasts isolated from U. fasciata collected in March to June developed frond thalli or microthalli when they were cultured in low or high densities (cells/area), respectively. The microthallus suspension was cultured for more than two years at 10-40 μmol·m-2 ·s-1 . Frond thalli formed when the suspension was cultivated at 100-160 μmol·m-2 ·s-1 . Therefore, microthallus suspension can serve as a seed stock of U. fasciata.