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In order to obtain low-k dielectric films, a subtractive technique, which removes sacrificial porogens from a hydrogenated silicon oxycarbide (SiOC:H) film, has been used successfully by different groups in the past. In this paper, we report on the porogen removal from porogenated SiOC:H films, using a hot wire chemical vapor deposition (HWCVD) equipment. Molecular hydrogen is dissociated into atomic hydrogen by the hot wires and these atoms may successfully remove the hydrocarbon groups from the porogenated SiOC:H films. The temperature of the HWCVD filaments proved to be a determining factor. By Fourier transform infrared spectroscopy, X-ray reflectivity (XRR), secondary ion mass spectrometry (SIMS), ellipsometric porosimetry and capacitance-voltage analyses, it was possible to determine that for temperatures higher than 1700 °C, efficient porogen removal occurred. For temperatures higher than 1800 °C, the presence of OH groups was detected. The dielectric constant was the lowest, 2.28, for the samples processed at a filament temperature of 1800 °C, although porosity measurements showed higher porosity for the films deposited at the higher temperatures. XRR and SIMS analyses indicated densification and Tungsten (W) incorporation at the top few nanometers of the films.

Medium energy ion scattering (MEIS) using, typically, 100–200 keV H+ or He+ ions derives it ability to characterise nanolayers from the fact that the energy after backscattering depends (i) on the elastic energy loss suffered in a single collision with a target atom and (ii) on the inelastic energy losses on its incoming and outgoing trajectories. From the former the mass of the atom can be determined and from the latter its depth. Thus MEIS yields depth dependent compositional and structural information, with high depth resolution (sub-nm near the surface) and good sensitivity for all but the lighter masses. It is particularly well suited for the depth analysis of high-k multilayers of nanometer thickness. Accurate quantification of the depth distributions of atomic species can be obtained using suitable spectrum simulation.\ud \ud In the present paper, important aspects of MEIS including quantification, depth resolution and spectrum simulation are briefly discussed. The capabilities of the technique in terms of the high depth resolution layer compositional and structural information it yields, is illustrated with reference to the detailed characterisation of a range of high-k nanolayer and multilayer structures for current microelectronic devices or those still under development: (i) HfO2 and HfSiOx for gate dielectric applications, including a TiN/Al2O3/HfO2/SiO2/Si structure, (ii) TiN/SrTiO3/TiN and (iii) TiO2/Ru/TiN multilayer structures for metal–insulator–metal capacitors (MIMcaps) in DRAM applications.\ud \ud The unique information provided by the technique is highlighted by its clear capability to accurately quantify the composition profiles and thickness of nanolayers and complex multilayers as grown, and to identify the nature and extent of atom redistribution (e.g. intermixing, segregation) during layer deposition, annealing and plasma processing. The ability makes it a valuable tool in the development of the nanostructures that will become increasingly important as device dimensions continue to be scaled down.

Atomic layer deposition is a promising technique to deposit conformal, nm-thin metal barriers in high-aspect-ratio trenches. However, exactly because of its excellent conformality, the deposition can also occur inside the nanopores of the most advanced low-k materials. In this work, the mechanisms of atomic layer deposition on and in low-k, porous dielectric films were studied, using HfO"2 as a test material. Exhaustive analyses showed firstly that the HfCl"4 precursor penetrated uniformly in the pores throughout a 44nm thick low-k film. Secondly, it was shown that the pores were sealed as function of precursor size, i.e. there are conditions where the pores became inaccessible for HfCl"4, while the - smaller - H"2O molecules could still penetrate the pores. From these analyses, a deposition model was proposed.

The atomic layer deposition of titanium oxide TiO2 on ruthenium and oxidized ruthenium with titanium methoxide as metal precursor and H2O and O3 as oxidant was investigated by Rutherford backscattering (RBS) and time of flight secondary ion mass spectrometry (TOFSIMS). An ultra-thin layer of TiO2 deposited a priori with H2O plays the role of protection of Ru(Ox) substrates against etching by O3. Information about thin films (~3 nm) interfacial reactions, thickness and structure was brought by Medium Energy Ion Scattering Spectroscopy (MEIS) and X-ray absorption spectroscopy (XAS) measurements. The growth enhancements observed in the first stages of the deposition depends on the pre-treatment (pre-oxidation, H2O based interlayer thickness) of the Ru substrate. Thick films (~14 nm) were analyzed by transmission electron microscopy (TEM) and X-ray diffraction (XRD). The as deposited TiO2 films are crystalline with rutile structure, as resulted from structural analyzes. However, the presence of small amounts of anatase was detected by soft X-ray absorption spectroscopy (XAS) and is strongly influenced by the surface pre-treatment of the Ru substrate. The electrical properties (equivalent oxide thickness and leakage current density) correlate with a different rutile/anatase ratio present in the films.

High-k dielectrics as SrxTi1-xOy (STO) are of great interest for the development of dynamic random access memory devices. The characterization of these nanolayers is important. Secondary ion mass spectrometry (SIMS) depth profiling through TiN and STO films is affected by strong artifacts in different ways. The erosion process causes surface topography modifications both in the TiN/STO/TiN layer system and in the silicon substrate. Atomic force microscopy analyses have been carried out on pristine TiN and STO film surfaces and at various crater depths. Very different roughness evolutions are identified for TiN or STO films, within the SIMS craters sputtered with 500 eV Cs+ while using eucentric stage rotation. Copyright © 2012 John Wiley & Sons, Ltd.

NiO thin films are deposited by atomic layer deposition (ALD) from the Ni(dmamb)2 (dmamb = 1-dimethylamino-2-methyl-2-butanolate) precursor using O3 as the oxidizer. The films are analyzed for wafer uniformity, structure, composition, morphology, microstructure, and homogeneity. The Ni(dmamb)2 half-cycle shows an initial rapid partial saturation followed by slower further adsorption. By contrast, the O3 half-cycle shows good saturation behavior. In the studied deposition temperature range for ALD, the films are polycrystalline with negligible amounts of carbon in the films. Furthermore, the films are homogeneous in thickness and composition, demonstrating that high-quality NiO films can be deposited by ALD from Ni(dmamb)2.

To achieve very low permittivity values, advanced generations of low-k dielectrics for interconnects have a porous structure. Precursor penetration during metal barrier deposition by atomic layer deposition needs to be avoided not to degrade the low-k material properties. In this paper, we compare various options to seal a highly porous low-k material with a k-value of 2.0 against penetration during TaN ALD. This includes the exploration of a higher deposition temperature, the use of additional sealing layers, and the introduction of a short PVD Ta flash exposure prior to ALD. Depending on the technique used, pore penetration can be quasi completely avoided.

Downscaling of the metal-insulator-metal capacitor (MIMCAP) for Dynamic Random Access Memory (DRAM) requires the introduction of high permittivity dielectrics. MIMCAP structures formed with RuO"2/Ru as bottom electrode, rutile TiO"2 as dielectric and TiN as top electrode are described. Ozone (O"3) is needed as oxidant in the TiO"2 atomic layer deposition (ALD) process in order to obtain the rutile phase (permittivity>80), while anatase TiO"2 (permittivity ~40) is obtained with H"2O. As O"3 etches the ruthenium substrate, an ultra-thin interlayer of TiO"2 was first grown with H"2O, followed by the thick TiO"2 layer deposited with O"3. In order to minimize the content of anatase in the TiO"2 layer, responsible for a reduced dielectric constant, we investigate the effect of scaling down the thickness of the protective H"2O based inter-layer on the equivalent oxide thickness (EOT) and leakage current density (J"g). The four times reduction in thickness without affecting the integrity of the ruthenium substrate resulted in a significant decrease of both EOT and J"g.

The lanthanide aluminates GdAlO 3 and LuAlO 3 have been examined for integration into advanced non-volatile memory devices. From a materials point of view, a number of physical properties of the material need to be understood prior to successful device integration, such as e.g. band gap, dielectric permittivity, or crystallization behavior. In addition to these material properties, the layers may have to withstand high thermal budgets during device processing such that thermal stability and interdiffusion in contact with surrounding materials become important.

In the framework of Resistive RAM we are investigating if the metal to insulator transition in vanadium dioxide can be used for memory applications. We investigate vanadium dioxide production by low pressure oxidation of metallic vanadium and demonstrate samples with 4 orders of magnitude transition in resistivity. We show that the relaxation times to the coexistence state are compatible with non-volatile memory requirements being longer than 10 years. We also investigate how metal doping influences the transition temperature.

SrTiO3 (STO) films were grown by atomic layer deposition (ALD) on TiN using Sr(t-Bu3Cp)2, Ti(OCH3)4 and H2O. After crystallization anneal, large single crystals grains were obtained and nanocracks were present. The microstructure can be changed using a thin STO crystalline seed spike annealed at 700 °C, which induces formation of much smaller grains in the top layer after post-deposition anneal. The seed approach was also applied for a layer that was directly deposited in crystalline state at 370 °C, with a Ti(Me5Cp)(OMe)3 precursor thermally stable at this temperature of deposition. The nanocracks were reduced or totally eliminated when using the seed layer template approach. Nevertheless, the leakage current is only reduced for the case when the Ti(OCH3)4 precursor was used.

Thin LuxAl2−xO3 films were deposited by atomic-layer deposition using Lu(thd)3, and TMA in combination with O3 as oxidizer. High-quality dielectric films were obtained with good process con-trol. The full range of the Lu/(Lu+Al) composition was found to be accessible. The films showed bulk density and low roughness. As a result, this process enables the study of LuxAl2−xO3 as dielectric in advanced non-volatile memory devices.

Multi-element and multilayer high-k dielectric stacks are being explored for future generation logic and memory devices. The increased material complexity can have a significant impact on the thermal stability and crystallization behavior of the stacks directly or indirectly affecting their material and electrical properties. We have studied the effect of composition and layer thickness for hafnium and rare earth based (lanthanum and dysprosium) systems on crystallization and intermixing (silicate formation). Our results show that for multilayer dielectric stacks, the thermal stability and intermixing is function of the composition and thickness of the individual layers.

A 300mm ALD HfZrOx process using TDEAH, TDEAZ, and H2O is developed. This process applies a nano-laminate approach to grow a HfZrOx film by intermixing ALD HfO2 and ZrO2 around 250{degree sign}C. It is found that the corresponding Zr content of the film, measured by RBS, increases linearly with the cycle ratio of Zr/(Zr+Hf). In addition, the initial growth behavior of the HfZrOx film of this unique process is insensitive to the starting surface condition and eliminates the long incubation as observed for the halide-based ALD processes. The as-deposited HfZrOx films are amorphous, which can be crystallized with a 950{degree sign}C postdeposition anneal. Depending on the film composition, a different crystalline phase is formed ranging from monoclinic to tetragonal with increasing Zr content. CMOS transistors, using HfZrOx as gate dielectric, are fabricated for the evaluation of the corresponding device performance. Device results show that all splits with HfZrOx as gate dielectric yield not only a similar EOTJg performance but also very low leakage, which demonstrate that ALD HfZrOx is a promising candidate for sub-1nm EOT scaling.

The lanthanide aluminates GdAlO3 and LuAlO3 have been examined for integration into advanced non-volatile memory devices. From a materials point of view, a number of physical properties of the material need to be understood prior to successful device integration, such as e.g. bandgap and band offsets, dielectric permittivity, or crystallization behavior. In addition to these material properties, the layers may have to withstand high thermal budgets during device processing such that thermal stability and interdiffusion in contact with surrounding materials become important.

For future generations of non-volatile memory applications, the replacement of the interpoly dielectric by a suitable high-k material is required. Rare-earth aluminates are potential candidates because they are predicted to combine a high dielectric permittivity with a large band gap. We demonstrate the atomic layer deposition (ALD) of GdxAl2-xO3 layers using Gd( i PrCp)3, trimethyl-aluminum (TMA), and H2 Oo r O3. Process windows for both H2O and O3 as oxidants are explored. H2O is shown to lead to better GdxAl2-xO3 film properties than O3, although the accessible composition range is limited because of the hygroscopic nature of Gd2O3.

Rare earth based oxides are researched for logic and memory semiconductor applications. Their hygroscopic nature and tendency to form silicates make them a challenging class of materials in respect of processing and stability. Using LaAlO3, LuAlO3, and GdAlO3 we have explored the impact of the oxidant, H2O or O3, during deposition, their stability when exposed to air, and their stability towards silicate formation. We show that the rare earth content of the material has a significant impact on the uniformity of the process using water-based atomic layer deposition as well as on the material stability during air exposure. We also describe silicate formation for these materials and demonstrate that an oxidation process can be used to make silicate layers with well-controlled composition.

GdHfOx thin films were deposited by atomic-layer deposition (ALD) using Tris(isopropyl-cyclopentadienyl)Gadolinium [Gd(i-PrCp)3] and HfCl4 in combination with H2O as oxidizer. Growth curves show nearly ideal ALD behavior. The growth per cycle is found to be 0.55 Aå, independent of Gd/(Gd+Hf) composition in the studied range. This indicates that the amount of HfO2 deposited during an HfCl4/H2O cycle is identical to the amount of Gd2O3 deposited during a Gd(i-PrCp)3/H2O cycle. The film composition can therefore be deduced from the HfCl4/Gd(i-PrCp)3 cycle ratio. The crystallization of GdHfOx with Gd/(Gd+Hf) contents between 9% and 30% was studied. All films crystallize into a cubic/tetragonal HfO2-like phase during spike annealing at 1050{degree sign}C. Cu-bic/tetragonal phases are also observed after laser annealing for 1.5 ms up to 1300{degree sign}C, demonstrating that the cubic/tetragonal phase is thermally stable in this temperature range.

Stoichiometric and Sr-rich strontium-titanate (STO) nanofilms grown on thin TiN layers over SiO"2/Si were studied by X-ray photoelectron spectroscopy (XPS) at two analyzer exit angles, both as-deposited and after rapid thermal annealing (RTA) at 650^oC in N"2. Individual layer thickness and composition, mutually dependent via the electron transport properties of the film matrix, were iteratively obtained using a set of empirical relative sensitivity factors (RSF), as well as inelastic mean free paths with their elastic corrections, as per ISO18118:2004(E). Successive layer thicknesses and average Sr/Ti atomic ratios were consistent with the nominal description of the samples, provided a superficial SrCO"3 phase inadvertently formed over STO during growth is taken into account. This phase was strongly reduced upon RTA, with considerable compacting of the STO layers.

Scaling of the Cu interconnect structures requires Cu capping layers with an increasingly lower dielectric constant (K) that still have adequate Cu and moisture barrier properties. In this work, we study the plasma enhanced chemical vapour (PE-CVD) deposition of amorphous silicon carbide films using dimethyl silacyclopentane (DMSCP) as a precursor, resulting in the incorporation of Si-(CH2)n-Si bridges. The effect of process parameters on film characteristics like K, mass density (p), and leakage behaviour is investigated, as well as their relation with the chemical bonding structure. Finally, Cu barrier properties and hermeticity are evaluated.

We report on aggressively scaled RMG-HKL devices, with tight low-V T distributions [σ(V Tsat ) ∼ 29mV (PMOS), ∼ 49mV (NMOS) at L gate ∼35nm] achieved through controlled EWF-metal alloying for NMOS, and providing an in-depth overview of its enabling features: 1) physical mechanisms, model supported by TCAD simulations and analysis techniques such as TEM, EDS; 2) process optimizations implementation: oxygen sources reduction, control of RF-PVD TiAl/TiN ratio and reduced H gate , also impacting stress induced in the channel. Additional key features: 1) Al vs. W as fill-metal, with careful liner/barrier materials selection and tuning yielding well-behaved devices with tight R gate distributions down to L gate ∼20nm, and enabling both PMOS and NMOS low-VT values for high aspect-ratio gates (H gate ∼60nm, L gate ≥30nm); 2) wet-etch vs. siconi clean for dummy-dielectric removal, with HfO 2 post-deposition N 2 -anneal resulting in substantial BTI improvement without EOT or low-field/peak mobility penalty, and good noise response.

Here for the first time we discuss RRAM cell performance and reliability through process improvement. Excellent post-cycling (106) retention and post-bake retention and endurance have been achieved for the optimized process conditions. The optimized RRAM cells show potential for manufacturability and scalability for high density memory application.

This paper presents for the first time a low-complexity high performance CMOS HK/MG process on planar bulk Si using a single dielectric / single metal gate stack and making use of dual-channel integration. Through the optimization of the Si 45 Ge 55 /Si cap deposition and the workfunction metal, high performance devices with balanced V t,sat (+0.12V, −0.16V) at scaled T inv ∼1nm and gate length L g ∼30nm are reported, leading to 17ps ring oscillators at 1µW/stage at Vdd=0.7V. Compatibility with gate last processing is also demonstrated.

Electrical data of advanced capacitor dielectrics such as Sr-rich (Sr/(Sr + Ti) ~ 62%) strontium titanate (STO), rutile TiO 2 , which have dielectric constants higher than 60 even with physical thicknesses in the 7-10 nm range are presented. A practical capacitor model is proposed based on planar metal insulator-metal (MIM) system fabricated using 300 mm toolsets to access required capacitor dielectrics and to predict technical challenges of each technology node. Based on this practical model, mass production friendly path for the introduction of advanced capacitor dielectrics and its choice of electrode to extend life time of Dynamic Random Access Memory (DRAM) is proposed.

Atomic layer deposition is a promising technique to deposit conformal, nm-thin metal barriers in high aspect ratio trenches. However, exactly because of its excellent conformality, the deposition can also occur inside the nanopores of the most advanced low-k materials. In this work, the mechanisms of atomic layer deposition on and in low-k, porous dielectric films were studied, using HfO 2 as a test material. Exhaustive analyses showed firstly that the HfCl 4 precursor penetrated uniformly in the pores throughout a 44 nm low-k film. Secondly it is shown that the pores were sealed as function of precursor size, i.e. there are conditions where the pores became inaccessible for HfCl 4 , while the - smaller - H 2 O molecules could still penetrate the pores. From these analyses a deposition model was proposed.

This work reports on aggressively scaled replacement metal gate, high-k last devices (RMG-HKL), exploring several options for effective work function (EWF) engineering, and targeting logic high-performance and low-power applications. Tight low-threshold voltage (V T) distributions for scaled NMOS devices are obtained by controlled TiN/TiAl-alloying, either by using RF-physical vapor deposition (RF-PVD) or atomic layer deposition (ALD) for TiN growth. The first technique allows optimization of the TiAl/TiN thicknesses at the bottom of gate trenches while maximizing the space to be filled with a low-resistance metal; using ALD minimizes the occurrence of preferential paths, at gate sidewalls, for Al diffusion into the high-k dielectric, reducing gate leakage (J G). For multi-gate fin field-effect transistors (FinFETs) which require smaller EWF shifts from mid-gap for low-V T: 1) conformal, lower-J G ALD-TiN/TaSiAl; and 2) Al-rich ALD-TiN by controlled Al diffusion from the fill-metal are demonstrated to be promising candidates. Comparable bias temperature instability (BTI), improved noise behavior, and slightly reduced equivalent oxide thickness (EOT) are measured on Al-rich EWF-metal stacks.

The growth of gadolinium aluminate films by atomic layer deposition from gadolinium tris-di-isopropylacetamidinate and trimethylaluminium was studied. The consequences of using water versus ozone as the oxidant were studied. The effects of pulse lengths, metal source ratios, and temperature were noted. Depositing two cycles of gadolinium oxide per cycle of aluminum oxide was found to yield films with a stiochiometry of Gd1.04AlO3 and a growth rate of 2.2 A in aggregate for each set of gadolinium and aluminum cycles. The deposition rate was found to be stable between 210 and 325 °C. The use of ozone instead of water as the oxygen source was found to reduce the film uniformity. The densities ranged from 3 to 6 g/cm3 depending on the Gd content of the films. The impurity contamination of the films was measured by secondary ion mass spectrometry and infrared absorption and found consistent with carboxylated species. Theextracted bandgap for the Gd1.04AlO3 films was 5.8 eV. The films were amorphous as deposited.

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Strontium titanate (STO) is a dielectric with a cubic perovskite type structure and of increasing interest for microelectronics, especially in the metal-insulator-metal (MIM) capacitors due to its high dielectric constant. The dielectric constant of the STO films and consequently the performance of the MIM capacitors appear to be strongly influenced by the process conditions. In this work the authors report on the influence of various thermal treatments upon the crystallinity and morphology of strontium titanate crystals. The influence of spike, laser, or rapid thermal anneals on the morphology with respect to grain size and topography of the crystalline stoichiometric STO films is studied. Also, the use of a stack containing a Sr-rich STO (62% Sr) bottom seed layer and a stoichiometric STO top layer in combination with a thermal treatment was found to affect the microstructure of the STO film. A comparison of the electrical properties for various thermal treatments has been made.

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Gd x Hf 1-x O y thin films were deposited by atomic layer deposition (ALD) using tris(isopropyl-cyclopentadienyl) gadolinium [Gd( i PrCp) 3 ] and HfCl 4 in combination with H 2 0 as an oxidizer. Growth curves showed a nearly ideal ALD behavior. The growth per individual Gd( i PrCp) 3 /H 2 O or HfCl 4 /H 2 O cycle was 0.55 A, independent of the Gd/(Gd + Hf) composition x in the studied range. This indicates that the amount of HfO 2 deposited during a HfCl 4 /H 2 O cycle was essentially identical to the amount of Gd 2 O 3 deposited during a Gd( i PrCp) 3 /H 2 O cycle, assuming identical atomic densities of the films independent of composition. The crystallization of Gd x Hf 1-x O y , with Gd/(Gd + Hf) contents x between 7 and 30% was studied. Films with x ≳ 10% crystallized into a cubic/tetragonal HfO 2 -like phase during spike or laser annealing up to 1300°C, demonstrating that the cubic/tetragonal phase is thermally stable in this temperature range. A maximum dielectric constant of K ~ 36 was found for a Gd/(Gd + Hf) concentration of x ~ 11%.

The 0 2 /N 2 flow ratio during O 3 generation by dielectric barrier discharge has a large impact on the atomic layer deposition (ALD) of metal oxides in a hot wall ALD reactor. For HfO 2 ALD using HfCl 4 as a metal precursor, a higher growth per cycle and a broader ALD temperature window are obtained when N 2 is added to the O 2 supply of the O 3 generation. A positive impact of N 2 in the 0 3 generation is also observed for ZrO 2 and La 2 O 3 ALD. A negative impact is observed for Al 2 O 3 ALD: The Al 2 O 3 thickness is reduced for those conditions for O 3 where Hf0 2 ALD is enhanced.

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