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In this open-label, single-arm, phase I/II clinical trial, we evaluated the efficacy of anti-B cell maturation antigen (BCMA) chimeric antigen receptor (CAR)-T cell (HDS269B) therapy in 49 relapsed/refractory multiple myeloma (RRMM) patients, including 20 with Eastern Cooperative Oncology Group (ECOG) grade 3-4. After HDS269B infusion (9 × 10

CD38 is a transmembrane glycoprotein that is relatively highly expressed on multiple myeloma (MM) cells, and CD38-targeting antibodies use pleiotropic mechanisms to kill MM cells. Immunotherapy, with an increased quality of response and acceptable toxicity, shows tremendous potential for treating MM. This research field study aimed to analyze all the relevant literature via bibliometrics to identify its course of development and structural relationships.A total of 1,030 relevant articles were retrieved from the Web of Science Core Collection (WoSCC) from 1985 to June 21, 2021. CiteSpace was employed to map authors/references/countries with nodes and links, extract highly cited keywords, analyze the time trends of keywords, recognize cocited authors/references, set timezone or timeline views, analyze burstness and generate a dual map. VOSviewer was used to recognize connections among journals and construct collaboration networks. bibliometric.com was utilized to trace advanced countries/regions in the research field.All of the articles were cited 24,332 times in total, with an average of 23.62 times. Most articles were published in the United States of America (USA), far outweighing other countries/regions. The current hotspots in this field are related to the following keywords: "monoclonal antibody", "refractory MM", "idecabtagene vicleucel", and "B cell maturation antigen (BCMA)". Ten significant clusters, namely, "flow cytometry", "daratumumab", "BCMA", "cell line", "antitumor activity", "gene", "non-Hodgkin's lymphoma", "peripheral blood", "survival" and "anti-CD38", were extracted. The mechanism and effectiveness of CD38-targeting antibodies in treating MM have been studied. Future research hotspots will focus on new therapies for relapsed and refractory multiple myeloma (RRMM) patients.In the past, efforts were applied to elucidate the mechanism and effectiveness of CD38-targeting antibodies in treating MM. Future research hotspots will focus on anti-BCMA chimeric antigen receptor T cell (CAR-T) immunotherapy for patients with RRMM. According to this article, new researchers can discover its course of development and structural relationships in this field.

Background. Limited and controversial evidence is available on the efficacy of surgery for patients with stage I primary parotid gland lymphoma. Thus, we aimed to investigate whether surgery can enhance the prognosis of patients with stage I primary parotid gland lymphoma using large sample data. Methods. From 1998 to 2015, we searched the Surveillance, Epidemiology, and End Results (SEER) program database and extracted information regarding patients with stage I primary parotid gland lymphoma; we classified these patients into surgery and nonsurgery groups. We calculated overall survival (OS) and cancer-specific survival (CSS) using Kaplan–Meier curves and log-rank testing. Propensity score matching (PSM) analysis was also used to further account for confounding variables before comparing the OS and CSS again. We used the COX proportional hazard regression model in both multivariate and univariate analyses. Results. We enrolled 918 patients with stage I primary parotid gland lymphoma, among which 656 (71.5%) patients underwent surgery. Before PSM, the surgery group had better OS (hazard ratio (HR) = 0.673, 95% confidence interval (CI): 0.519–0.873, and p = 0.003 ) and CSS (HR = 0.595, 95% CI: 0.403–0.879, and p = 0.008 ) than the nonsurgery group. After PSM, surgery was still a beneficial factor for OS (HR = 0.569, 95% CI: 0.399–0.810, and p = 0.002 ) and CSS (HR = 0.384, 95% CI: 0.220–0.669, and p = 0.001 ). Furthermore, in univariate and multivariate analyses, total parotidectomy significantly increased OS ( p = 0.001 and p = 0.021 , respectively) and CSS ( p = 0.001 and p = 0.037 , respectively). Conclusions. In summary, the prognosis of patients with stage I primary parotid gland lymphoma can be significantly improved by surgery. Moreover, total parotidectomy was a protective factor for OS and CSS before and after PSM analysis, suggesting that surgery acts as a significant component in multimodal therapy for early primary parotid gland lymphoma.

We report the hybrid flip-chip integration of III-V laser on a monolithic silicon photonics (SiPh) platform. Wafer-scale laser attach was demonstrated with the assistance of a laser cavity on a Si substrate. The attach process was accomplished through precise optical and mechanical alignment features on the laser and SiPh wafer. Efficient laser-to-photonic integrated circuit (PIC) butt-coupling with optical power up to 11 dBm was achieved through a combination of precise mechanical stops and optical alignment features. Key laser performance metrics such as mode hopping and relative intensity noise (RIN) vs. reflectivity were also studied. The impact of laser-PIC alignment on the coupling efficiency was studied through comprehensive two-dimensional (2D) and three-dimensional (3D) numerical modeling. Simulations were also performed to explore different coupler designs for optimized laser coupling performance.

We report a hybrid flip-chip-integrated laser attach technology on a monolithic SiPh platform. Efficient laser-to-PIC butt-coupling with optical power up to 11dBm was demonstrated through a combination of precise mechanical stops and optical alignment features.

Optical communication has recently seen a resurgence driven by the demand for high-speed networking. Silicon Photonics (SiPh) has gained recent interest as a low cost and high volume method for creating photonic integrated circuits (PIC). PICs create new challenges for manufacturability since the devices require optical probing in addition to RF probing. This paper discusses a low cost method for aligning an optical fiber to a vertical grating coupler for wafer optical probing using a pre-defined device layout. This method is suitable for high volume wafer manufacturing. The alignment takes 0.5-1.5s and is reliable across multiple products and designs.

In this paper, we demonstrate a wafer-level sorting test solution developed for quad-channel linear driver to be used in a 400G silicon photonics transceiver module. In-house built tester-on-a-board (TOB) system was used to provide power and control signals to the device-under-test (DUT), as well as conduct parametric tests. RF switch matrix was implemented to support multi-channel RF tests up to 50GHz. This wafer sorting test solution covers contact tests, power consumption tests, single-ended and true-mode differential full S-parameter tests, output signal swing and total harmonic tests. This work enables wafer-level driver die sorting capability for next-generation 400G silicon photonics coherent transceiver module.

Breakdown voltage and RF characteristics relevant for RF power amplifiers (PA) are presented in this paper. Typically, DC collector-to-emitter breakdown voltage with base open (BV CEO ) or DC collector-to-base breakdown with emitter open (BV CBO ) has been presented as the metric for voltage limit of PA devices. In practical PA circuits, the RF envelope voltage can swing well beyond BV CEO without causing a failure. An analysis of output power swing limitations and DC breakdown is presented with attention to biasing and temperature.

In this paper, we present 2.4/5.5 GHz LNAs with SPDT Switch for WiFi Front-End Modulate Integrated Circuit (FEM IC) based on high resistivity substrate 0.35um SiGe BiCMOS process. For the 2.4GHz LNA, the bias circuit's effect on the nonlinearity is analyzed and measured, and then a new bias circuit is proposed. With 2.7V supply, it consumes 4.2mA current. The measured Gain is about 14.6dB with input and output return loss better than −10dB. The Noise Figure (NF) is 1.16dB, output 1dB compression point is ∼8dBm, and OIP3 is about 20dBm. For the 5.5GHz LNA with proposed new bias circuit and SPDT switch operating at 7.3mA current with 2.7V power supply, 2.1dB NF and 19dBm OIP3 are achieved in the post layout simulation.

A two-state single turn spiral inductor design is simulated in a 130 nm technology and another design is simulated and measured in a 45 nm technology. Measurements show an 80% inductance increase at 20 GHz in the 45 nm technology and a simulated 76% increase at 24 GHz in the 130 nm technology. © 2010 Wiley Periodicals, Inc. Microwave Opt Technol Lett 52: 673–677, 2010; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.24985

Although the discontinuity structures in the microstrip transmission lines such as a gap and bend have been largely studied, the three-dimensional edge efiects, skin efiects and metal losses have hardly been analyzed. In this paper, modeling of transmission line with bend and gap discontinuity with equation based process technology independent method are developed. The efiect of the signal layer thickness is fully included in the model. Gap model is verifled with EM simulation and implemented in BiCMOS technology on Silicon substrate. The bend is modeled with transmission line with efiective length for the discontinuity area, and the equations have been generated. The bend model is compared with EM simulations, existing bend model generated with curve-fltted method and measured results. Gap and bend are enabled as library device in a 0.13"m SiGe BiCMOS process design kit. Both bend and gap device have a scalable layout pattern and a schematic symbol, which allows users to choose them with difierent dimensions and metal stacks. In addition, the models can be migrated into other process technologies with difierent metal options. Very good match have been achieved among model, EM simulation and measurements for difierent process technologies and metal stacks.

We feature a 0.35-µm SiGe BiCMOS technology (SiGe 5PAe) that is optimized for power amplifier (PA) applications. The key feature of this technology is a novel low-inductance ground to the package using through-silicon vias (TSVs) that results in a competitive solution for future multiband and multimode PA integration. The tungsten-filled, multifinger, bar-shaped TSV delivers more than a 75% reduction in inductance compared to a traditional wirebond. This enables higher frequency applications with a roughly 20% reduction in die area without compromising the technology reliability for use conditions in a low-cost plastic QFN (quad flat no leads) package. In this paper we demonstrate the commercial feasibility of the TSV, its RF performance, its reliability, and its usefulness in a demanding WiMAX® (Worldwide Interoperability for Microwave Access) PA application.

We describe a 0.35 micron SiGe BiCMOS technology that is optimized for power amplifier (PA) applications. The key feature of this technology is a novel low inductance ground to the package by method of through-silicon-via (TSV), offering a competitive solution for future multi-band / multi-mode PA integration. The tungsten filled, multi-finger, bar shaped TSV delivers over 75% reduction in inductance compared to a traditional wire bond, enabling higher frequency applications with roughly 20% die area reduction, and without compromising the technology reliability for use conditions in a low-cost plastic QFN package. In this paper we demonstrate the commercial feasibility of the TSV, its RF performance, and its usefulness in a demanding WiMAX PA application.

This paper establishes the viability and suitability of silicon germanium (SiGe8HP) technology, enablement tools and circuits to millimetre-wave applications today and a roadmap to the future. Key elements discussed include SiGe technology and design enablement advancements leading to the world's most highly integrated, lowest power 60 GHz transmitter/receiver ICs.

In this article, the design and measurement of a 77-GHz Marchand balun matched to 50 Ω single-ended and 100 Ω differential-ends using multiple metal layers in silicon technology is discussed. The balun is measured with an insertion loss of 1.8 dB at 77 GHz, an amplitude imbalance of ±1.8 dB, and phase imbalance of ±1.5°. Also, this article presents the effect of parasitic reactance in the load terminations and dummy metal fills on balun's performance. It was found that the interlevel dummy metal fills and increase the insertion and also cause significant amplitude imbalance in the balun especially at frequencies above 50 GHz. © 2011 Wiley Periodicals, Inc. Microwave Opt Technol Lett 53:664–666, 2011; View this article online at wileyonlinelibrary.com. DOI 10.1002/mop.25756

In this paper, we introduce an isolated RF LDMOS NFET is for RF Power Amplifier (PA) and power management applications. The RF LDMOS NFET has demonstrated a drain-source turn-on resistance (R ds,on ) of 1.45ohm-mm, a cutoff frequency (Ft) greater than 40GHz and a drain-source breakdown down voltage (BV) in excess of 9V. For PA designs, the isolation layer is floating to reduce the parasitic and achieve high PAE/nonlinearity performance. RF power amplifier cores were fabricated and measured at 2.4GHz and 5.8GHz to demonstrate the RF LDMOS performance in PAs. Under CW loadpull and 3.3V supply, 18dB and 12dB gains (Gt) are achieved at 2.4GHz and 5.8GHz respectively, with 1dB compression point power density at 22dBm/mm gate width, and PAE > 63%, maximum PAE > 70%. Due to good model to hardware Pout correlation in a 5.8GHz PA cell, a fully matched PA last stage with the load-pull fundamental and harmonic impedances showed a less than 4° AM-PM phase distortion, meeting the 802.11n spectral mask requirement with 20MHz 64QAM modulated signal at 19dBm Pout.

A new open-resonator technique is described for the determination of loss tangent and dielectric permittivity of low-absorbing materials at 60 GHz. Micrometer and the stepping-motor-driven flat mirror in the Fabry-Perot cavity call be scanned at a very small step (to change the cavity length or mirror spacing) to provide a complete interferogram over the entire resonance peak profile. This method is termed here as a new, full cavity-length variation technique. The minimum step size is 20 nm and the variation range of the cavity length is about 25 mm, which can cover eight fundamental resonance modes. With this technique, all resonance curves in the variation range of the cavity can be studied more completely than with any other previous technique. The technique requires only fixed frequency sources, and eliminates the need for a broader band, stable, continually tunable frequency source.

We present for the first time a novel high resistivity bulk SiGe BiCMOS technology that has been optimized for a WiFi RF front-end-IC (FEIC) integration. A nominally 1000 Ohm-cm p-type silicon substrate is utilized to integrate several SiGe HBTs for power amplifiers (PAs), a SiGe HBT low-noise amplifier (LNA), and isolated nFET RF switch device. Process elements include trench isolation for low-loss passives and reduced parasitic coupling, and a lower-resistivity region for the FETs to minimize changes to the circuit library.

A millimeter wave (MMW) on-chip passive frequency-dependent inductor is described with different designed inductance values targeted at different frequency ranges using one device. The proposed frequency-dependent inductor design allows the optimization of multi-band impedance matching for MMW analog circuit designs with a single all-passive on-chip device. This device uses low-loss natural capacitors and multiple capacitively loaded ground return lines to provide MMW frequency-dependent effective device inductance. No on-chip switches are required in the proposed inductor design and it can allow circuit size reduction by allowing a single inductor to target different frequency ranges. Simulated inductance values in a 130 nm BiCMOS technology show a 61% change in inductance is possible between two frequency ranges: f 48 GHz. The proposed frequency-dependent inductor design has also been designed and measured in a 45 nm CMOS process. Measured results show that the use of multiple capacitively loaded ground return lines is effective in creating an on-chip MMW frequency-dependent inductor.

RF designs such as phased array antenna systems make use of on-chip electronically controllable delay elements. This paper presents simulations and measurements of on-chip variable delay transmission lines with fixed characteristic impedance in two different technologies. EM simulations in a 130 nm BiCMOS technology show a delay change of 15.6 % is possible while the characteristic impedance of the novel transmission line varies a maximum of 3.7% from the 50 Ω target between two possible delay states. Measurement results from a 45 nm SOI digital technology reveal a maximum delay change of 16.0 % and a maximum characteristic impedance deviation between delay states of 7.4% in a 10 GHz region of the Ka-band between 25 GHz and 35 GHz.

On-chip Wilkinson power dividers are used in MMW circuit designs such as phased array antenna systems. This paper presents a novel on-chip MMW Through-Silicon-Via (TSV) Wilkinson power divider. HFSS simulations of the TSV Wilkinson power divider in a 130 nm BiCMOS technology revealed insertion loss per λ/4 “arm” of 0.9 dB at 60 GHz with both return loss and isolation better than 18 dB at 60 GHz and good matching in both signal phase and amplitude at the two outputs.

The lack of access points to internal circuits can prevent full debug and characterization of highly integrated circuits, such as a receiver or transmitter on a chip. To maximize coverage, prevent costly re-spin and improve time to market, innovative characterization and test solutions need to be developed. In this paper loop antennae have been designed and utilized as a non-contact probe in characterizations of on-chip millimeter wave systems. This non-invasive solution is capable to capture (parasitic) signals radiated from the internal stages of a device under characterization otherwise not measurable. In a case study for a super-heterodyne 60GHz transmitter, the data extracted through this inexpensive approach allows for a thorough investigation of how individual functional blocks within the transmitter chip contribute to the overall system performance.

On-chip electronically controllable delay elements are often used in RF designs such as phased array antenna systems. This paper presents a novel on-chip variable delay transmission line structure with fixed characteristic impedance. EM simulations show a delay change of 15.6 % is possible while the characteristic impedance of the novel transmission line varies a maximum of 3.7% from the 50 Ω target between two possible delay states.

In this paper, a novel on chip slow wave structure is developed. It is built with discontinuous microstrip steps, the discontinuous line is made by placing a wide and short line and a narrow and short line in turn and the step discontinuity provides with additional inductance and capacitance. The slow wave transmission line structures were achieved through IBM 45 nm technology with multi-layer metals. Simulated and measured results for slow wave transmission line are provided in the paper for design with different characteristics impedances. Results have shown that the inductance per unit length and capacitance per unit length of the line increased about 50% compared with the conventional transmission line structure. In addition, the length effect of the wide and narrow signal sections is thoroughly studied and results have shown that the smaller the pitch, the better the slow wave effect which agrees with [7] very well. A 75 GHz Branchline coupler built with the slow wave transmission lines has also been designed, and the coupler is 70% smaller than the conventional design.

A novel on-chip slow wave CPW structure is provided in this paper. Results show that the structure has better slow wave effect than that of the conventional slow wave structure. Detail results are shown in the paper, the proposed slow wave structure can be used for compact mmwave passive components design.

This paper presents a novel compact on-chip voltage-controlled two-state inductor design for use in high-frequency RF circuits. This inductor design can be used in multiple-band passive matching networks, VCO LC tank circuits, or as controllable phase delay units. Simulations of a single-turn spiral inductor design show a controllable 76% increase is possible between the "low" and "high" inductor states within a 10 GHz frequency range where the usable frequency ranges of the "low" and "high" states intersect. The presented two-state inductor design uses a single MOSFET switch to selectively enable a current return path parallel to the inductor signal line. The inductor design presented here can be used as a straight-line inductor or a single-turn spiral inductor and can be fabricated using standard CMOS/BiCMOS semiconductor processes.

On-chip millimeter wave circuit designs at 60GHz and 77GHz offer huge potentials for various wireless communication and radar applications. This paper investigates the implementation of on-chip balun, which is one of the important components in millimeter wave design. Particularly, we are interested in two types of passive structure: rat-race hybrid and Marchand balun. In the following sections, we are going to present an on-chip Rat-race Hybrid design and a Marchand Balun design in 0.13um BiCMOS technologies. Simulation results using 3D electromagnetic simulator will be shown and verified with hardware measurements.

As operating frequencies increase in state-of-the-art wireless designs, highly accurate modelling of critical interconnect paths routed over silicon is crucial for first-pass design success [1]. With this in mind, the interconnect stack of an IBM silicon germanium (SiGe) process incorporating a TSV ground supply network was modelled with model accuracy and efficiency as the goals. A unique modelling methodology for assigning the values of silicon skin-effect circuit model elements is discussed. The final model is verified with hardware measurements and found to accurately estimate the frequency-dependent resistance, capacitance, and inductance of a single line over silicon at microwave frequencies in a compact, efficient, pre-layout circuit model that includes the effects of process variation.

In this paper, an ideal slow wave coplanar waveguide (CPW) structures with low losses, moderate impedance and CMOS fabrication technology have been developed. The slow wave CPW transmission line structures were achieved through IBM 0.13 mum technology with multi-layer metals. The CPW were implemented with narrower signal line or wider separation between signal and ground plane to increase the inductance per unit length, while metal strips on another metal layers cross under/above the CPW lines, which are orthogonal to signal propagation direction. Losses reduction using via bars to increase the thickness of the signal metal layer, structures with metal strip options (above, under and both CPW) to increase the capacitance per unit length of the CPW and provide more flexibility for the proposed structure, effect of the metal strips pitch are also discussed. The slow wave structure discussed in this paper can shrink the side dimension of the mm-wave passive components by up to 35%.

In this paper, an equation based process technology independent model of transmission line with bend is discussed. The model is generated based on existed single transmission line model using equations calculating the effective length of the bend discontinuity area. The model is compared with EM simulation; existing bend model generated with curve-fitted method and measured results of fabricated meander line. The meander line is realized with the Back End of Line (BEOL) wiring and the bend is enabled as a library device of a 0.13 mum SiGe BiCMOS process design kit. This bend device has a scalable layout pattern and a schematic symbol, which allows users to choose bend with different dimensions and metal stacks. In addition, the model can be migrated with other process technologies with different metal options. Very good match have been achieved among model, EM simulation and measurements for different process technologies and metal stacks.

In this paper, an on-chip RF MEMS capacitive switch is designed and simulated with a 0.13 mum IBM SiGe BiCMOS technology for the first time. Mechanical and electrical design of the high frequency switch are discussed in this paper. Special consideration to improve Con/Coff ratio of the switch is used with multi metal layers configuration. The switch is designed for 60 GHz wireless applications, the results show that the switch has the insertion loss is less than 0.2 dB when the switch is off, while the isolation loss is larger than 15 dB when the switch is on over the frequency from 40 to 70 GHz. The calculated pull-in voltage of the switch is only about 10 volts, the switch is compact comparing with the reported PIN diode RF switch and has the membrane dimension of 10 mum x 240 mum.