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Wafer-Level Test Solution Development for a Quad-Channel Linear Driver Die in a 400G Silicon Photonics Transceiver Module

Authors :
Aidong Yan
Hanyi Ding
Ye Wang
Barry Blakely
Source :
2019 IEEE 32nd International Conference on Microelectronic Test Structures (ICMTS).
Publication Year :
2019
Publisher :
IEEE, 2019.

Abstract

In this paper, we demonstrate a wafer-level sorting test solution developed for quad-channel linear driver to be used in a 400G silicon photonics transceiver module. In-house built tester-on-a-board (TOB) system was used to provide power and control signals to the device-under-test (DUT), as well as conduct parametric tests. RF switch matrix was implemented to support multi-channel RF tests up to 50GHz. This wafer sorting test solution covers contact tests, power consumption tests, single-ended and true-mode differential full S-parameter tests, output signal swing and total harmonic tests. This work enables wafer-level driver die sorting capability for next-generation 400G silicon photonics coherent transceiver module.

Details

Database :
OpenAIRE
Journal :
2019 IEEE 32nd International Conference on Microelectronic Test Structures (ICMTS)
Accession number :
edsair.doi...........1ea572dfdb6b829dc4bec6ed89f2db33