1. Implementation of Universal Digital Architecture using 3D-NoC for Mobile Terminal
- Author
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El-Bay Bourennane, Camel Tanougast, Hichem Mayache, Salah Toumi, Kamel Messaoudi, Atef Benhaoues, UL, LCOMS, Kacem, I., Laroche, P., Roka, Z., Université Badji Mokhtar - Annaba [Annaba] ( UBMA ), Laboratoire Electronique, Informatique et Image ( Le2i ), Université de Bourgogne ( UB ) -AgroSup Dijon - Institut National Supérieur des Sciences Agronomiques, de l'Alimentation et de l'Environnement-Centre National de la Recherche Scientifique ( CNRS ), Laboratoire de Conception, Optimisation et Modélisation des Systèmes ( LCOMS ), Université de Lorraine ( UL ), Université de Lorraine, METZ, Kacem, I and Laroche, P and Roka, Z, Université Badji Mokhtar - Annaba [Annaba] (UBMA), Laboratoire Electronique, Informatique et Image [UMR6306] (Le2i), Université de Bourgogne (UB)-École Nationale Supérieure d'Arts et Métiers (ENSAM), Arts et Métiers Sciences et Technologies, HESAM Université (HESAM)-HESAM Université (HESAM)-Arts et Métiers Sciences et Technologies, HESAM Université (HESAM)-HESAM Université (HESAM)-AgroSup Dijon - Institut National Supérieur des Sciences Agronomiques, de l'Alimentation et de l'Environnement-Centre National de la Recherche Scientifique (CNRS), Laboratoire de Conception, Optimisation et Modélisation des Systèmes (LCOMS), Université de Lorraine (UL), Kacem, I and Laroche, and P and Roka
- Subjects
RTL modeling ,Computer science ,Orthogonal frequency-division multiplexing ,[SPI] Engineering Sciences [physics] ,Common Operators ,02 engineering and technology ,Generic hardware architectures ,FFT- SDF ,[SPI]Engineering Sciences [physics] ,Gate array ,VHDL ,[ SPI ] Engineering Sciences [physics] ,0202 electrical engineering, electronic engineering, information engineering ,Generic hardware architectures, Rake receiver, FFT- SDF, Common Operators, 3D-Network on chip, RTL modeling ,Field-programmable gate array ,computer.programming_language ,Virtex ,business.industry ,020208 electrical & electronic engineering ,020206 networking & telecommunications ,Digital architecture ,Rake receiver ,Computer architecture ,Embedded system ,3D-Network on chip ,business ,Communications protocol ,computer - Abstract
International Conference on Control, Decision and Information Technologies (CoDIT), Ecole Natl Ingenieurs Metz, Metz, FRANCE, NOV 03-05, 2014; International audience; The need to integrate multiple wireless communication protocols into a single low-cost flexible hardware platform is prompted by the increasing number of emerging communication protocols and applications in modern embedded systems. So the current challenge is to design of new digital architectures, in addition to its ability to take over of many functions. In this paper we have identified similarities between the despreader units in Rake receiver and the processor element in FFT-SDF (Fast Fourier Transform-Single path Delay Feedback) to propose a generic architecture shared between the two algorithms widely used. This Smart architecture is interconnected with similar modules by a 3D Network-on-Chip for implementation of Rake receiver (used in WCDMA system) and FFT receiver (in OFDM system). We present in this paper a 3D-NoC with half layer-layer connection, this architecture uses a modified XYZ routing algorithm. The proposed architectures are coded using VHDL onto a Virtex 5 Field-Programmable Gate Array (FPGA) device and results are compared with similar works. The implementation demonstrates that the proposed architectures can deliver a high reduction of the FPGA logic requirements with high maximum frequency.
- Published
- 2014