Search

An electrical characterization of Al2O3 based metal-insulator-semiconductor structures are carried out by using capacitance-voltage, deep level transient spectroscopy, and conductance-transient (G-t) techniques. Dielectric films are atomic layer deposited (ALD) at temperatures ranging from 300 to 800 degree Celsius directly on silicon substrates and on Al2O3 buffer layer that is grown in the same process by using 15 ALD cycles at 300 degree Celsius.

A study of metal-insulator-semiconductor structures on InP is presented.

The electrical properties of electron and hole traps found in fully implanted p(super +)n InP junctions have been studied through deep-level transient spectroscopy. Results indicate the presence of an electron trap, E8, a hole trap, H2, located 0.19 eV below the conduction band and 0.13 eV above the valence bond. The high-temperature capture cross sections were determined to be 9.5 x 10 raised to the -17th power and 5.2 x 10 raised to the -19th power cm squared, respectively.

Researchers investigated the electrical characteristics of the semiconductor/insulator interface in an Al/SiNx:H/InP metal-insulator-semiconductor (MIS) device in which the electron cyclotron resonance plasma method was used to deposit the insulator. They found that the electrical characteristics were similar to those of devices which involve passivation treatment of the InP surface prior to deposition.

Analysis of SiNx:H thin films deposited by electron cyclotron resonance reveals information about the atomic bonding and electrical properties of the film, and the electrical characteristics of the SiNx:H/Si interface. The films contain hydrogen bonded either to silicon or to hydrogen depending upon the N/Si ratio. Films with an N/Si ratio below 1.38 show an interface trap density within the range (3-5) x 1011 cm-2 eV-1, but this range suddenly increases for N/Si ratios above 1.4. Films with an N/Si ratio of 1.38 have superior electrical properties. Deep level transient spectroscopy reveals silicon dangling bonds at the interface.

Experiments are conducted to analyze the nature of DX centers in selenium doped AlGaAs. Several methods are used in the analysis, namely: deep level transient spectroscopy (DLTS), capacitance voltage transient technique and admittance spectroscopy. Results show that the thermal dependence of DX centers' electron capture rate creates anomalies in the results for DLTS. Electric field enhanced emission processes are also observed to be absent.

Deep-level transient spectroscopy (DLTS) and constant-capacitance DLTS (CC-DLTS) measurements of selenium-related DX centers in AlGaAs were compared to investigate the influence of refilling effects on obtained values. CC-DLTS measurement revealed the existence of one DX center while DLTS indicated two. The results showed that DLTS measurements were greatly affected by refilling effects which occur during capacitance transients. However, the refilling effects did not affect CC-DLTS measurements.

A study on the use of the ion implantation technique to produce high resistivity layers for different fabrication steps in III-V semiconductor device technology was conducted to characterize the electrical properties of the deep levels existing in fully implanted p+ n InP junctions isolated by He implantation. The study focused on the effect of the He implantation for device isolation. Experimental results and conclusions are presented.

Several studies are conducted to determine the effects of the silicon nitride blocking layer thickness and trapping on the interface state densities of the high-k dielectric stacks. The amplitude of the capacitance transient is shown to considerably increase because of the trapping/deptrapping mechanisms of the stacks.

Electrical characterization is used for studying the Al/Hf[O.sub.2]/Si[N.sub.x]:H/n-Si metal-insulator-semiconductor capacitors. The trapping/detrapping mechanism has increased the capacitance transient and the deep-level transient spectroscopy (DLTS) measurements have contributions not only from the insulator/substrate interface but also from the Hf[O.sub.2]Si[N.sub.x]:H interlayer interface.

A combination of x-ray diffraction, x-ray photoelectron spectroscopy, capacitance-voltage, deep level transient spectroscopy, and conductance-transient techniques is used to determine the structural and electrical properties of hafnium silicate film based metal-insulators-semiconductor capacitors. The results prove that the structural heterogeneity and defect density of the dielectric oxide layers can be highly increased due to marked crystallization and phase separation at high temperatures.

The effect of growth temperature and postmetallization annealing on the electrical characteristics of atomic layer deposited HfO2 films is examined. The defect profiling in the samples fabricated at 300, 500 and 600 degree C is discussed.