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A depletion MOS controlled (DMC) current regulator diode (CRD) based on bipolar carrier transport mechanism is proposed and experimentally demonstrated in this paper. Compared with the conventional CRD based on unipolar junction field effect transistor, DMC CRD features a highly doped p-type substrate. On the one hand, the P+ substrate provides hole injection, which makes the output characteristics of DMC CRD resemble a PIN rectifier when operating in the linear region with a small anode voltage. Accordingly, DMC CRD gets a large slope of output characteristic to realize a lower knee voltage (VK) in comparison to the conventional CRD for a same anode current. On the other hand, the P+ substrate and N-type epitaxial layer can form a reverse PN junction to withstand a high reverse breakdown voltage, which allows DMC CRD to be applied in AC circuit. The initial experimental result demonstrates that a low VK of 1.2 V and a high reverse breakdown voltage (BVR) above 250 V are achieved in a 30-mA-level DMC CRD.

In this work, a high-voltage (HV) junction field effect transistor (JFET) with voltage class extended to 800 V is proposed, which obtains a satisfactory on-state breakdown voltage (ON-BV) performance. For the traditional HV JFET, ON-BV is much lower than OFF-BV, which cannot meet the requirement for the application of high voltage start-up circuit. In pursuit of a high ON-BV and making it close to OFF-BV, a dilute-doped resistance region is introduced in the HV JFET to mitigate space-charge-modulation (SCM) effect without additional mask and area. By appropriately increasing the dose of Deep N-Well (DNW), ON-BV can be further increased without degrading OFF-BV. At last, the proposed JFET obtains a high OFF-BV of 900 V and a high ON-BV of 965 V without sacrificing the competitive current capacity above 0.11 mA/μm. Besides, the mechanism of power loss (P LOSS ) induced by substrate current (I SUB ) and gate current (I Gate ) during charging process is also revealed, which is associated with SCM. Benefit by the mitigation of SCM, I SUB +I Gate is reduced significantly in the proposed structure.

High-voltage (HV) integrated power devices are widely used in many applications, including alternating current/direct current (AC/DC) power converter, HV gate driver integrated circuit (IC) and light emitting diode (LED) driver IC, etc. Among these applications, AC/DC power converter is essential for almost all power systems operated in the DC conditions. As a power switch in the AC/DC converter, the fundamental performance requirement of these power devices is to withstand a high voltage of 500–900 V and simultaneously have a low power loss for its efficient conversion. Therefore, several device technologies have been proposed to realize a high breakdown voltage (BV) and a low specific on-resistance (Ron,sp), such as reduced surface field (RESURF) technology, lateral super-junction (SJ) structure, lateral insulated-gate bipolar transistor (LIGBT), integrated vertical structure and junction termination technology. In this paper, a comprehensive review of the development and prospect of these technologies in AC/DC switching application is presented. Furthermore, analytic Ron,sp-BV models for some typical device structures, the possible strategies of Bipolar - Complementary metal oxide semiconductor - Double-diffused metal oxide semiconductor (BCD) platform integrated with vertical SJ devices, partial silicon-on-insulator (SOI) BCD technology, low gate charge (Qg) HV integrated power devices and wide bandgap technology are also described.