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With the recent rapid development of IT technology, the demand for multifunctional semiconductor devices capable of high performance has increased rapidly, and the miniaturization of such devices has also faced limitations. To overcome these limitations, various studies have investigated three-dimensional packaging methods of stacking devices, and among them, hybrid bonding is being actively conducted during the bonding process. studies of hybrid bonding during the bonding process are active. In this study, Cu bonding using a nano passivation layer was carried out for Cu/SiO2 hybrid bonding applications, with Au and Ag deposited on Cu at the nano level and used as a protective layer to prevent Cu oxidation and to achieve low-temperature Cu bonding. Au was deposited at about 12 nm, and Ag was deposited at about 15 nm, with Cu bonding carried out at 180 °C for 30 min, after which an annealing process was conducted at 200 °C for one hour. After bonding, the specimen was diced into a 1 cm × 1 cm chip, and the bonding interface was analyzed using SEM and TEM. Additionally, the 1 cm × 1 cm chip was diced into 2 mm × 2 mm specimens to measure the shear strength of the bonded chip, and the average shear strength of Au and Ag was found to be 5.4 and 6.6 MPa, respectively. The degree of diffusion between Au-Cu and Ag-Cu was then investigated; the diffusion activation energy when Au diffuses to Cu was 6369.52 J/mol, and the diffusion activation energy when Ag diffuses to Cu was 17,933.21 J/mol. [ABSTRACT FROM AUTHOR]

As semiconductor device scaling faces a severe technical bottleneck, vertical die stacking technologies have been developed to obtain high performance, high density, low latency, cost effectiveness and a small form factor. This stacking technology is receiving great attention from industry as a core technology from the point of view of recent heterogeneous integration technology. Most importantly, bonding using copper is aggressively studied to stack various wafers or dies and realize genuine three-dimensional packaging. Copper is emerging as the most attractive bonding material due to its fine-pitch patternability and high electrical performance with a CMOS-friendly process. Unfortunately, copper is quickly oxidized, and a high bonding temperature is required for complete Cu bonding, which greatly exceeds the thermal budget for the packaging process. Additionally, the size of Cu pads is decreasing to increase the density of interconnections. Therefore, various copper bonding methods have been studied to realize copper oxidation prevention, a low bonding temperature, and a fine-pitch Cu pad structure with a high density. Furthermore, recently, hybrid bonding, which refers to the simultaneous bonding of copper pads and surrounding dielectrics, has been considered a possible solution for advanced bonding technology. This paper reviews recent studies on various copper bonding technologies, including Cu/oxide hybrid bonding. [ABSTRACT FROM AUTHOR]

Hybrid bonding enables the commercialization of ultra‐fine pitch high‐density 3D packages. Cu/SiO2 hybrid bonding is the standard packing interface recently introduced in the industry. Herein, the Cu/polymer hybrid bonding interface beyond Cu/SiO2 is proposed in order to have high compatibility for additional processes in the future. Ideally, polymers can provide excellent bonding strength and low permittivity, enabling high‐speed signal transmission with high reliability. To realize it, optimum polymer and additives selection and polymer bonding processing development are needed to get the desired packaging interface. Therefore, detailed materials and processing challenges are discussed to realize the successful Cu/polymer hybrid bonding. Then, the authors' preliminary results are suggested to supplement the feasibility of the emerging bonding technology. [ABSTRACT FROM AUTHOR]

PVD-deposited Cu3N has been demonstrated for Cu-Cu bonding as a low-cost passivation material. Cu3N exhibits stability at room temperature but undergoes decomposition upon heating, making it an attractive candidate for Cu bonding passivation. XRD analysis reveals that the decomposition of PVD-deposited Cu3N primarily occurs within the temperature range of 200 $^{\circ }\text{C}\sim 250^{\circ }\text{C}$ . Cu3N-Cu3N bonding, relying on the decomposition reaction, is successfully demonstrated, and TEM analysis confirms the presence of Cu grains at the bonding interface. Moreover, Cu bonding using Cu3N passivation has been demonstrated as well. The bonding capability at low temperatures is found to be influenced by the thin film properties of Cu3N. For wafer level bonding, the $N_{2}$ flow rate during Cu3N deposition requires careful adjustment to balance the anti-oxidation capability and the $N_{2}$ outgassing phenomenon. For chip level bonding, the $N_{2}$ outgassing phenomenon poses no significant issue. By demonstrating the potential of Cu3N as a passivation material, this study suggests a promising method for achieving lower temperature requirements in Cu bonding through the adjustment of Cu3N thin film properties.

With the recent rapid development of IT technology, the demand for multifunctional semiconductor devices capable of high performance has increased rapidly, and the miniaturization of such devices has also faced limitations. To overcome these limitations, various studies have investigated three-dimensional packaging methods of stacking devices, and among them, hybrid bonding is being actively conducted during the bonding process. studies of hybrid bonding during the bonding process are active. In this study, Cu bonding using a nano passivation layer was carried out for Cu/SiO2 hybrid bonding applications, with Au and Ag deposited on Cu at the nano level and used as a protective layer to prevent Cu oxidation and to achieve low-temperature Cu bonding. Au was deposited at about 12 nm, and Ag was deposited at about 15 nm, with Cu bonding carried out at 180 °C for 30 min, after which an annealing process was conducted at 200 °C for one hour. After bonding, the specimen was diced into a 1 cm × 1 cm chip, and the bonding interface was analyzed using SEM and TEM. Additionally, the 1 cm × 1 cm chip was diced into 2 mm × 2 mm specimens to measure the shear strength of the bonded chip, and the average shear strength of Au and Ag was found to be 5.4 and 6.6 MPa, respectively. The degree of diffusion between Au-Cu and Ag-Cu was then investigated; the diffusion activation energy when Au diffuses to Cu was 6369.52 J/mol, and the diffusion activation energy when Ag diffuses to Cu was 17,933.21 J/mol.

[Display omitted] • An effective strategy is developed for Cu-Cu bonding with the Co passivation layer. • A defect-free Co-Co bonding is achieved at 200 °C with double strength promotion. • The activation enhances the electrical properties of the interface by over 90%. • The non-oxidation bonding method paves shortcuts for ultrafine pitch integration. Cu-based hybrid bonding, known for its high density and low latency, is widely applied in big data throughput scenarios. However, Cu joints are prone to oxidation and perform poorly at fine pitches, hindering signal transmission and leading to failures in integrated devices. One of the most promising approaches to overcome these challenges is applying a cobalt (Co) passivation layer on the Cu surface owing to its preferable electrical and anti-electromigration behavior in sub-micron scale. However, the high melting point (∼1500 °C) and inevitable oxidation of the Co film coated on Cu are scarcely evitable. In this work, a ternary plasma composed of Ar, NH 3 , and H 2 O is introduced to activate the surface of the Co-passivated Cu, facilitating bonding at a temperature of 200 °C. Significant surface and interface electrical resistivity reductions were observed, reduced to 67.5 % and less than 10 %, respectively. Additionally, tensile strength more than doubled with ternary plasma activation attributed to the continuous and tightly bonded Co-Co interface. The application of this Co-passivated Cu bonding structure is evaluated through signal integrity simulations for 3D interconnection with ultrafine pitch. In summary, this work provides guidelines for the future fabrication of high-performance interconnection structures. [ABSTRACT FROM AUTHOR]

Fine pitch Cu/SiO2 hybrid bonding has been successfully demonstrated at a low temperature of 120 °C, a breakthrough, using Au passivation method in this work. To explore the bonding mechanism of passivation structures for hybrid bonding in details, Cu-Cu direct bonding with Au passivation on both wafer-level and chip-level has been discussed, including analyses of AFM, SAT, TEM, electrical measurements, and reliability test. Cu/SiO2 hybrid bonding with the fine pitch structure with stable electrical performance can be achieved at low bonding temperature under an atmospheric environment. Accordingly, this Au passivation scheme for Cu/SiO2 hybrid bonding with excellent bonding quality, low thermal budget, and high reliability shows a great feasibility for the 3D IC and heterogenous integration applications.

Low-temperature Cu-Cu bonding technology plays a key role in high-density and high-performance 3D interconnects. Despite the advantages of good electrical and thermal conductivity and the potential for fine pitch patterns, Cu bonding is vulnerable to oxidation and the high temperature of the bonding process. In this study, chip-level Cu bonding using an Ag nanofilm at 150 °C and 180 °C was studied in air, and the effect of the Ag nanofilm was investigated. A 15-nm Ag nanofilm prevented Cu oxidation prior to the Cu bonding process in air. In the bonding process, Cu diffused rapidly to the bonding interface and pure Cu-Cu bonding occurred. However, some Ag was observed at the bonding interface due to the short bonding time of 30 min in the absence of annealing. The shear strength of the Cu/Ag-Ag/Cu bonding interface was measured to be about 23.27 MPa, with some Ag remaining at the interface. This study demonstrated the good bonding quality of Cu bonding using an Ag nanofilm at 150 °C. [ABSTRACT FROM AUTHOR]

Cu-Cu direct bonding at low temperature with Cr wetting layer and Au passivation has been developed, and the bonding mechanism has been investigated. A chip-level Cu-to-Cu direct bonding can be achieved under a very low thermal budget condition at 70 °C for 90 s or 150 °C for 15 s, while wafer level bonding can be achieved at 100 °C under a low vacuum environment ($10^{-{2}}$ Torr) by deposition of capping metal layers, which can protect Cu from oxidation, as well as reduce surface roughness and grain size of Cu. During the bonding process, Cu atoms diffuse through Cr/Au layers into the bonding interface, forming a new inter-layer without voids to achieve high quality bonding. The phenomenon of recrystallization and effects of grain size have been validated by TEM analyses. This Cu-Cu bonding with capping metal layers scheme can enable bonding with ultra-low thermal budget, excellent bonding quality, good electrical performance and high reliability, showing the great feasibility for the 3D integration applications. [ABSTRACT FROM AUTHOR]

Cu–Cu bonding is a key process in fine pitch Cu interconnect in 3-dimenssional Si integration. Despite the excellent electrical property and pattern ability of Cu material, the Cu–Cu bonding process is affected by the high bonding temperature and easy oxidation. Thus, the ability to protect the copper surface in a reactive air environment is very important in Cu–Cu bonding, especially for die–to–wafer Cu bonding applications. We studied Cu–Cu bonding using a copper nitride nanolayer as an antioxidant passivation layer and investigated the stability of the copper nitride nanolayer over 7 days and its decomposition capability across temperatures of up to 400 °C. We found that the copper nitride (Cu4N) nanolayer formed by two-step Ar/N2 plasma treatment protected the copper surface from further oxidation in the air, and that the energy required for thermal decomposition of the copper nitride nanolayer in this study was about 29.6 kJ/mol. It can be seen that the bonding temperature of Cu–Cu bonding can be sufficiently lowered by using a low–temperature decomposition property of copper nitride. [ABSTRACT FROM AUTHOR]

Pt has been investigated as a metal passivation material to achieve low-temperature Cu–Cu direct bonding process. With 10-nm Pt passivation layer capping on Cu surface, a good bonding surface with no oxides and small grain size can be obtained. During the low-temperature bonding process, Cu atoms diffuse through the passivation layer and form a new layer without any pretreatment. This bonding scheme with Pt passivation layer provides a solution for Cu low-temperature bonding, with excellent bonding strength, good electrical performance, and ability to endure temperature variation. In addition, both chip- and wafer-level bonding process have been successfully demonstrated, showing a high potential to be applied on 3-D integrated circuit (IC) and heterogeneous integration. [ABSTRACT FROM AUTHOR]

In this article, low-temperature Cu–Cu bonding with the Ag passivation layer was accomplished at 180 °C for 3 min without a postannealing process. The Ag passivation layer effectively prevents Cu from oxidation and assists Cu diffusion to realize low-temperature bonding. The small grain size of the Ag passivation layer controlled by sputtering working pressure is observed to improve bonding quality. Different plasma treatment parameters and bonding conditions were executed to evaluate bonding quality. The diffusion behavior of passivation bonding is investigated, and the corresponding mechanism is discussed as well. In addition, reliability assessments, including thermal cycling, high-temperature storage, and unbiased highly accelerated stress test, indicate excellent stability of this bonding structure, showing the potential for low-temperature bonding technology in 3-D integration applications. [ABSTRACT FROM AUTHOR]

Low-temperature Cu-Cu bonding technology plays a key role in high-density and high-performance 3D interconnects. Despite the advantages of good electrical and thermal conductivity and the potential for fine pitch patterns, Cu bonding is vulnerable to oxidation and the high temperature of the bonding process. In this study, chip-level Cu bonding using an Ag nanofilm at 150 °C and 180 °C was studied in air, and the effect of the Ag nanofilm was investigated. A 15-nm Ag nanofilm prevented Cu oxidation prior to the Cu bonding process in air. In the bonding process, Cu diffused rapidly to the bonding interface and pure Cu-Cu bonding occurred. However, some Ag was observed at the bonding interface due to the short bonding time of 30 min in the absence of annealing. The shear strength of the Cu/Ag-Ag/Cu bonding interface was measured to be about 23.27 MPa, with some Ag remaining at the interface. This study demonstrated the good bonding quality of Cu bonding using an Ag nanofilm at 150 °C.

Featured Application: 3D packaging, Flip chip packaging. The technology trends of next generation electronic packaging are moving toward heterogeneous 3D packaging systems. One of the key processes of 3D packaging system is Cu-to-Cu bonding, which is highly dependent on the planarized, activated, and oxygen-free Cu surface. A two-step plasma treatment is studied to form a Cu surface that does not react with oxygen and improves the Cu bonding interface quality at low bonding temperature (300 °C). In this study, the effects of two-step plasma treatment on both sputtered and electroplated Cu surfaces were evaluated through structural, chemical, and electrical analysis. The Cu bonding interface was studied by scanning acoustic tomography analysis after the thermocompression bonding process. Both sputtered and electroplated Cu thin films had the preferred orientation of (111) plane, but sputtered Cu exhibited larger grains than the electroplated Cu. As a result, the roughness of sputtered Cu was lower, and the resistivity was higher than that of electroplated Cu. Based on X-ray photoelectron spectroscopy analysis, the sputtered Cu formed more copper nitrides and fewer copper oxides than the electroplated Cu. A significant improvement in bonding quality at the Cu bonded interface was observed in sputtered Cu. [ABSTRACT FROM AUTHOR]

Co-sputtered Cu(Ti) films on SiO 2 substrates exhibit the phase separation of Cu and Ti after annealing at 400 °C. In this study, the diffusion behavior and phase separation were investigated using X-ray photoelectron spectroscopy (XPS), grazing angle incident X-ray diffraction (GIXRD), and transmission electron microscopy (TEM). The GIXRD pattern revealed that the Cu peak replaced the Cu 2 O peak after annealing. The formation Gibbs free energy of TiO 2 (−812 kJ) was lower than that of Cu 2 O (−109 kJ). The calculated diffusivity of Ti in Cu was one order of magnitude smaller than that of Cu in Cu. Thus, Ti was the dominant diffusing species that accumulated near SiO 2 , whereas Cu atoms were segregated near the surface. A few Cu islands were initially formed, and these Cu islands grew and formed continuous Cu layers after long-term annealing at 400 °C. The Cu(Ti) films were bonded face-to-face through thermo-compression. The nearly oxide-free Cu yields strong Cu bonding and a void-free interface. [ABSTRACT FROM AUTHOR]

[Display omitted] • This research thoroughly investigates the ultrathin nanoscale bonding structure using area-selective deposition. • The area-selective passivation bonding platform simplifies the complex conventional passivation process. • With the area-selective passivation bonding platform, chips can be bonded at temperatures below 200 ℃. • This research provides a detailed investigation of the bonding mechanism of the area-selective passivation bonding platform. The Cu-Cu bonding technology is an indispensable vehicle for achieving heterogeneous integration, providing architects and designers with a new solution to address the limitations of transistor miniaturization. In this study, a next-generation efficient-process passivation bonding technology has been developed and investigated. The area-selective passivation bonding platform enables chips to be bonded at ambient temperatures below 200 ℃, while mitigating potential patterning issues and simplifying the complex conventional passivation process. The surface exploration of the area-selective films and their bonding mechanism have been thoroughly investigated through the use of transmission electron microscope (TEM) analyses. The results demonstrate exceptional film quality and the bonded reliability of the area-selective films. Furthermore, devices bonded using an optimized process exhibit more reliable mechanical strength than those bonded using conventional passivation methods. [ABSTRACT FROM AUTHOR]

The technology trends of next generation electronic packaging are moving toward heterogeneous 3D packaging systems. One of the key processes of 3D packaging system is Cu-to-Cu bonding, which is highly dependent on the planarized, activated, and oxygen-free Cu surface. A two-step plasma treatment is studied to form a Cu surface that does not react with oxygen and improves the Cu bonding interface quality at low bonding temperature (300 °C). In this study, the effects of two-step plasma treatment on both sputtered and electroplated Cu surfaces were evaluated through structural, chemical, and electrical analysis. The Cu bonding interface was studied by scanning acoustic tomography analysis after the thermocompression bonding process. Both sputtered and electroplated Cu thin films had the preferred orientation of (111) plane, but sputtered Cu exhibited larger grains than the electroplated Cu. As a result, the roughness of sputtered Cu was lower, and the resistivity was higher than that of electroplated Cu. Based on X-ray photoelectron spectroscopy analysis, the sputtered Cu formed more copper nitrides and fewer copper oxides than the electroplated Cu. A significant improvement in bonding quality at the Cu bonded interface was observed in sputtered Cu.

In the present study, Cu bonds were fabricated through face-to-face thermocompression by co-sputtering Cu(Ti) films. The diffusion behaviors and bonding strengths at various Ti concentrations were analyzed. Phase separation occurred when Ti diffused toward the substrate and Cu moved to the surface with limited oxidation. A high affinity between Ti and O causes a concentration gradient, which acts as the driving force for Ti diffusion. A Cu(Ti) film containing 15 at% Ti with a bonding time of 60 min at 400 °C exhibited the highest bonding strength with no void caused by phase separation. [ABSTRACT FROM AUTHOR]

[Display omitted] • The ultrathin cluster-Ag passivation structure bonded at 70 ℃ by the TCB process has been demonstrated. • The bonding mechanism of different topography of the Ag passivation structure has been investigated in details in this research. • The Cu/SiO 2 hybrid bonding with cluster-Ag passivation layer has been complete with a low thermal budget. • After 2000 h of electromigration test, the Cu/SiO 2 hybrid bonding with cluster-Ag passivation layer demonstrate the high electromigration resistance. The novel low-temperature Cu/SiO 2 hybrid bonding scheme using cluster-Ag passivation has been proposed in this study for the heterogeneous integration application. With the addition of cluster-Ag passivation layer, electromigration and reliability of hybrid bonding structure have been investigated for the first time, indicating negligible deterioration of electrical performance in the bonding structure after applying 107 A/cm2 current density for over 2000 h. The bonding mechanism of cluster-Ag passivation has been explored by the analysis of HR-TEM, and the difference between cluster-Ag passivation and thin-film Ag passivation has been discussed in detail. Based on an ultrathin cluster-Ag passivation layer, Cu-Cu bonding can be achieved at 70 ℃, showing high mechanical strength and good reliability. Therefore, the achievements reported in this paper realize Cu-Cu bonding and hybrid bonding with high quality and high reliability under ultra-low thermal budget, paving the way for the development of next-generation heterogeneous integration and three-dimensional integrated circuits (3DIC) technologies. [ABSTRACT FROM AUTHOR]

A well-known aluminum-scandium (Al-Sc) alloy, already used in lightweight sports equipment, is about to be established for use in electronic packaging. One application for Al-Sc alloy is manufacture of bonding wires. The special feature of the alloy is its ability to harden by precipitation. The new bonding wires with electrical conductivity similar to pure Al wires can be processed on common wire bonders for aluminum wedge/wedge (w/w) bonding. The wires exhibit very fine-grained microstructure. Small AlSc particles are the main reason for its high strength and prevent recrystallization and grain growth at higher temperatures (>150°C). After the wire-bonding process, the interface is well closed. Reliability investigations by active power cycling demonstrated considerably improved lifetime compared with pure Al heavy wires. Furthermore, the Al-Sc alloy was sputter-deposited onto silicon wafer to test it as chip metallization in copper (Cu) ball/wedge bonding technology. After deposition, the layers exhibited fine-grained columnar structure and small coherent AlSc particles with dimensions of a few nanometers. These particles inhibit softening processes such as Al splashing in fine wire bonding processes and increase the thickness of remnant Al under the copper balls to 85% of the initial thickness. [ABSTRACT FROM AUTHOR]

In this paper, one low-temperature direct Cu bonding structure is demonstrated using metal passivated layers. With the protection of Cu bonding layer, the bonding temperature can be reduced to meet low thermal budget requirement. Direct wafer-level Cu bond scheme with Pd passivation is successfully demonstrated at 150 °C. Electrical performance along with the material analysis and reliability tests of passivated Cu bonded structures is presented. Furthermore, reliability assessments, including current stressing, temperature cycling, and unbiased highly accelerated stress test, imply excellent stability without electrical degradation. Diffusion behavior between passivation Pd and Cu layers is surveyed, and the corresponding mechanism is discussed as well. The low-temperature Cu/Pd–Pd/Cu bonded structure presents good bond quality and electrical performance, indicating a great potential for 3-D integration applications. [ABSTRACT FROM AUTHOR]

[Display omitted] • The passivated-Cu bonding structure bonded at 180 °C by the TCB process has been demonstrated. • Diffusion of Cu atoms and recrystallization of amorphous Cu into polycrystalline Cu can eliminate voids at the interface to achieve passivated-Cu bonding. • Diffusion of Cu atoms and Cu recrystallization requires low energy, therefore high-quality bonding results can be obtained with low thermal budget. The bonding mechanism of low-temperature Cu Cu thermal compression bonding (TCB) with passivation layer has been investigated in this research. After the structures of Cu with Au passivation and Cu with Pd passivation were bonded at 180 °C, the analyses of transmission electron microscope (TEM) were performed for the bonded structures to explore the bonding behavior of passivated-Cu during different stages of the TCB process. The results indicate that grain boundary diffusion of Cu leads to formation of amorphous Cu at the bonding interface in the passivated-Cu structure. Furthermore, diffusion of Cu atoms and recrystallization of amorphous Cu into polycrystalline Cu can eliminate voids at the bonding interface during the TCB process. Comparing to conventional Cu direct bonding with high crystallinity Cu at the bonding interface, passivated-Cu bonding can be achieved by much lower energy, leading to high quality bonding results with low thermal budget. [ABSTRACT FROM AUTHOR]

3D integration enhances RC delay mitigation, improves inter-die bandwidth, and has routing advantages for the next generation integrated circuit technology. To realize the advantages of 3D integration, metallic bonding between different dies or wafers is necessary. So, Cu-to-Cu metallic bonding is, without doubt, a key process needed for 3D integration. In this study, Ar plasma treatment on the Cu surface for Cu thermo-compression bonding temperature less than 400 °C was investigated. Ar plasma treatment on the Cu thin film was performed using a conventional DC sputtering technique. The effect of Cu surface modified by Ar plasma was studied for Cu-to-Cu bonding. Also, the influence of Ar plasma treatment on the Cu surface was evaluated structurally and electrically. [ABSTRACT FROM AUTHOR]

Starting in the 1980s and continuing right into the last decade, a great deal of research has been published on Cu ball/wedge (Cu B/W) wire bonding. Despite this, the technology has not been established in industrial manufacturing to any meaningful extent. Only spikes in the price of Au, improvements in equipment and techniques, and better understanding of the Cu wire-bonding process have seen Cu B/W bonding become more widespread-initially primarily for consumer goods manufacturing. Cu wire bonding is now expected to soon be used for at least 20% of all ball/wedge-bonded components, and its utilization in more sophisticated applications is around the corner. In light of this progress, the present paper comprehensively reviews the existing literature on this topic and discusses wire-bonding materials, equipment, and tools in the ongoing development of Cu B/W bonding technology. Key bonding techniques, such as flame-off, how to prevent damage to the chip (cratering), and bond formation on various common chip and substrate finishes are also described. Furthermore, apart from discussing quality assessment of Cu wire bonds in the initial state, the paper also provides an overview of Cu bonding reliability, in particular regarding Cu balls on Al metalization at high temperatures and in humidity (including under the influence of halide ions). [ABSTRACT FROM AUTHOR]

Abstract: The demand for wafer stacking technology has been increasing significantly. Although many technical challenges of wafer stacking have improved greatly, there are still many processing issues to be resolved. One of them is wafer warpage since it causes process and product failures such as delamination, cracking, mechanical stresses, and even electrical failure. In this study the warpage of multi-stacked wafers has been evaluated. Three Si wafers have been stacked on a Si substrate using a thermo-compression Cu bonding. Each wafer stack was ground down to ∼30μm and the thickness of the thinned Si wafer and wafer curvature were measured by FTIR (Fourier Transform Infrared Spectrometer) and FSM (Film-Stress Measurement), respectively. Wafer curvature becomes severe as the number of wafers in a stack increases, but the increment of wafer bow is reduced as the number of stack increases. The experimental results were also compared with the analytical model. [Copyright &y& Elsevier]

Thermal-compression bonding (TCB) is the key technology to ensure vertical chip (or wafer) stacking in three-dimensional (3D) integration with higher I/O density than conventional soldering technology. For different TCB approaches, copper (Cu) to Cu bonding has always been the preferred candidate due to the excellent electrical and thermal properties of Cu, high mechanical strength of bonding interface, as well as compatibility and cost consideration in the packaging fabrication. However, high thermal budget of the bonding process caused by oxidation of Cu leads to issue of wafer warpage, bonding misalignment, and compatibility with back-end-of-line process. Therefore, this review paper first presents an extensive survey on the advance of low temperature Cu-based bonding technologies. In addition, the feasibility of Cu Cu bonding in the fine pitch applications is challenged by coplanarity issue of Cu pillars and insufficient gaps for filling. Accordingly, based on the progress of low temperature Cu Cu bonding, low temperature Cu/SiO 2 hybrid bonding will be introduced as an emerging bonding technology to solve the coplanarity and filling issue, which can provide the great potential for 3D integration with ultra-high density of interconnection. [ABSTRACT FROM AUTHOR]

A novel CMOS-compatible bond structure using Cu-to-Cu bonding with Ti passivation is demonstrated at low temperature and investigated. With the Ti protection of inner Cu, Cu bonding temperature can be reduced to 180^\circC. In addition, excellent electrical stability against humidity and temperature cycling is achieved. Diffusion behavior and mechanism of Cu and Ti are also discussed. With excellent bond results and reliability, this bonded scheme has the potential to be applied in 3-D integration. [ABSTRACT FROM PUBLISHER]

Abstract: In 3D wafer-stacking technology, one of the major manufacturing issues is wafer warpage because it causes process and product failures, such as delamination, cracking, mechanical stresses, and even electrical failure. In this study, the wafer warpage and local strain of thinned Si wafers in a wafer stack were investigated. A blanket Cu film was deposited on a Si wafer by a sputtering process. Two Cu deposited wafers were bonded by a thermo-compression method, and a stacked wafer was thinned down to 30 μm. The three wafers were then stacked on a Si wafer substrate. The wafer warpage and local strain of each stacked Si wafer were measured by film-stress measurement and the convergent-beam electron diffraction technique of transmission electron microscopy, respectively. An emphasis was placed on the effects of wafer stacking by Cu bonding and Si thinning on stress development in a thinned Si wafer. As the number of wafers in a stack increased, wafer warpage became severe, and the local strain in thinned Si wafers near the Si/Cu interface was increased. [Copyright &y& Elsevier]