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The unprecedented performance potential of gallium nitride-on-silicon (GaN-on-Si) high electron mobility transistors (HEMTs) is seen as the key enabler for the design of power converters featuring extreme power density figures, as demanded in next-generation power electronics applications. However, unexpected loss mechanisms, i.e. dynamic $ {R}_{\text {ds,on}}$ phenomena and $ {C}_{\text {oss}}$ -losses, are appearing in currently available GaN transistors and are compromising their operation. In this paper, measurements of $ {C}_{\text {oss}}$ -losses are performed in a dedicated calorimetric measurement setup and, through a systematic approach, the root cause of the loss mechanism is potentially identified. Afterward, with the essential support of a manufacturer of power semiconductors, a novel transistor, featuring an enhanced multilayer III-N buffer, is developed according to the acquired knowledge. A significant reduction in terms of $ {C}_{\text {oss}}$ -losses, i.e. of soft-switching losses, and the absence of dynamic $ {R}_{\text {ds,on}}$ phenomena are verified experimentally on the new device. These achievements enable a significant performance improvement for future soft-switching power converters featuring GaN-on-Si HEMTs.

Charge trapping effects are considered as one of the most severe reliability issues in gallium nitride (GaN)/aluminium gallium nitride (AlGaN) metal-insulator-semiconductor HEMTs (MISHEMTs). Thus, the identification of the origin and the physical properties of active defects is one of the key factors to improve the stability of GaN technology. In this work, we suggest two neighboring nitrogen vacancies as the origin of correlated random telegraph noise (RTN) emissions in a GaN/AlGaN fin-MISHEMT. We determine the magnitude of electrostatic coupling between these two defects by using three different approaches and verify the results by simulating the RTN emissions of a similar system using a Hidden Markov Model (HMM).

Capacitance transient spectroscopy and dc current–voltage ( I–V ) characterization are employed to analyze charging/discharging effects and transport in 200-nm-thin carbon-doped GaN layers (GaN:C) with a low ( ${N}_{\textsf {C}} = \textsf {10}^{\textsf {18}}$ cm $^{-\textsf {3}}$ ) and high ( ${N}_{\textsf {C}} = \textsf {10}^{\textsf {19}}$ or ${N}_{\textsf {C}}= \textsf {7}\times \textsf {10}^{\textsf {19}}$ cm $^{-\textsf {3}}$ ) carbon concentration ${N}_{\textsf {C}}$ . The discharging and charging events are found to be governed by transport properties of GaN:C for whole ${N}_{\textsf {C}}$ range. However, distinct temperature behavior has been found as a function of ${N}_{\textsf {C}}$ . In the samples with low ${N}_{\textsf {C}}$ , an Arrhenius-like behavior with an activation energy of 0.8 eV indicates that the hole transport in valence band (VB) is the limiting process and the carrier exchange occurs between VB and the defect level. In contrast, in samples with high ${N}_{\textsf {C}}$ , a non-Arrhenius charging/discharging behavior with exp( aT )-dependence ( ${a}$ being a constant) in a wide temperature range (150–560 K) indicates that the transport is governed by defect bands (DBs) where the carrier exchange occurs between DBs and the carbon defect level. For samples with ${N}_{\textsf {C}} \ge \textsf {10}^{\textsf {19}}$ cm $^{-\textsf {3}}$ , the large charge accumulation in GaN:C produces a large energy barrier to prevent electron injection from n-GaN to GaN:C, thus making GaN:C blocking. This is in contrast to samples with ${N}_{\textsf {C}} = \textsf {10}^{\textsf {18}}$ cm $^{-\textsf {3}}$ where the barrier is low, rendering thus the bilayer leaky. Detailed physical models for carrier capture and emission processes and carrier transport are provided for both cases. The developed knowledge is important for understanding the role of growth parameters such as ${N}_{\textsf {C}}$ and dislocation densities, as well as for reliability testing and defect analysis.

In this work, an analysis of the impact of drain field plate (FP) length on the semi- ON degradation of AlGaN/GaN high-electron-mobility transistors (HEMTs) is performed. A wafer-level characterization, by means of pulsed stress tests, reveals a faster and more severe decrease of the drain current in the linear region for the samples with longer drain FP. 2-D technology computer-aided design (TCAD) hydrodynamic simulations show that a time and field-dependent hot electrons (HEs) trapping takes place at the passivation/barrier interface. The higher drain current decrease in the longer FP samples can be ascribed to an enhanced HE trapping at the drain FP edge due to a different electric field distribution.

This paper investigates the kinetics of buffer trapping in GaN-based normally-off high-voltage transistors. The analysis was carried out on transfer-length method (TLM) structures. By means of a custom setup, (i) we investigated the trapping and de-trapping processes induced by a large vertical bias and identified different mechanisms, responsible for the storage of negative and positive charge in the buffer. (ii) temperature-dependent analysis was carried out to evaluate the time constants associated to negative and positive charge build-up. Remarkably, the results indicate that the activation energy for negative charge trapping is ~0.3 eV, which is much lower than the ionization energy of carbon acceptors (0.8-0.9 eV). This result is explained by considering that trapping and de-trapping are not dominated by thermal processes (thermal emission from acceptors), but by transport mechanisms, that limit the transfer of charge to trap states. (iii) in the recovery experiments, after low stress bias negative charge trapping dominates. After high stress bias, also the effect of positive charge generation is detected, and the related activation energy is evaluated. The results presented within this paper clearly indicate that the trapping and de-trapping kinetics of normally-off GaN HEMTs are the results of the interplay of transport-limited conduction processes, that result in a low thermal activation (Ea~0.3 eV), compared to that of CN acceptors., Comment: ["European Union (EU)" & "Horizon 2020"]["Euratom" & Euratom research & training programme 2014-2018"][ECSEL Joint Undertaking (JU)][UltimateGaN][grant agreement No 826392]

Two particular defects are commonly discussed at the III-N interface: the required donor states, known to exist from the formation of the two-dimensional electron gas (2DEG) below a hetero-barrier, and defect states at the interface or within the dielectric layer. It appears that the latter ones are responsible for the ongoing challenge to find a low-defect gate dielectric to reduce positive bias temperature instabilities (PBTI). This raises the question, why the natively given donor states behave almost like fixed charges. We review the known and verified characteristics for both defect types and the link between them. Moreover, we define a lifetime criterion for power switching applications to compare PBTI effects related to III-N interfaces.

Carbon impurities in GaN form both acceptors and donors. Donor-to-acceptor ratios (DARs) determine the semi-insulating behavior of carbon-doped GaN (GaN:C) layers and are still debated. Two models are discussed; both can theoretically achieve semi-insulating behavior: the dominant acceptor model (DAM, DAR

Charge trapping is one of the main reliability issues for GaN-based MIS-high-electron-mobility-transistor technologies. In this paper, we focus on the defects located at or close to the interface with the dielectric, which are responsible for the threshold voltage instability at positive gate bias conditions. We present a methodology to analyze the experimental data based on the nonradiative multiphonon model for charge trapping. In particular, we show how to extract the density of interface traps as a function of their activation energy from stress and recovery experiments performed at various temperatures. Our approach is applied to two GaN/AlGaN/SiN samples with different trapping properties, at temperatures ranging from −190 °C to 200 °C. We evaluate their response to forward bias stress and finally, we extract the activation energy distribution for electron capture and emission over a continuous energy range.

GaN-on-Si is a lateral technology and as such it allows the integration of high voltage High Electron Mobility Transistors and low voltage devices on the same chip, thus enabling the miniaturization and reduction of parasitic inductances. Due to the fact that integrated devices share a common substrate, the performance of one device can be significantly affected by the operation of another. The choice of the substrate bias is particularly important in the integrated half-bridge, a popular topology which includes a low- and a high-side device. A grounded substrate will cause vertical stress on the high-side device, while a floating substrate will couple with the high voltage, resulting in stress on the low-side device. This is highly problematic as the devices may fail to turn on or have a significantly increased RON. In this work, we carefully investigate the substrate coupling of a high-side and low-side device via backgating measurements. We demonstrate that the unwanted RON increase in the high side device could be suppressed by hole injection from the gate, if the gate is formed of a p-type material.

The addition of a p-GaN drain to a conventional gate-injection transistor (GIT), forming the so-called hybrid drain embedded GIT, is crucial in the suppression of the dynamic Rdson. The DC leakage due to hole injection is limited to around 10 nA/mm at 600 V (25 °C). However, an injected hole current of several amperes (W = 210 mm) has been observed during the hard switching event. To reconcile this difference over 6 orders of magnitude, a TCAD study is carried out to understand the dynamics of the hole injection and what leads to the difference between the static and the transient current. According to the scenario played out by the present simulation model, the high concentration of carbon, intentionally doped to control the vertical leakage, plays a crucial role in limiting the hole injection current to its DC level, while under fast switching, the hole injection current can be very high due to a lag in response on the part of the carbon trap.

Charge trapping related phenomena are among the most serious reliability issues in GaN/AlGaN MIS-HEMTs technology. Today, many research efforts are undertaken to investigate and identify the defects responsible for device degradation. This work focuses on the trap sites located close to the interface with the dielectric, which are responsible for large voltage drifts in on-state conditions. We study the response of GaN/AlGaN/SiN systems to small and large signal excitation. Measurements performed with a lock-in amplifier enable us to deeply understand the dynamic behavior because of the improved time resolution and the versatility of the instrument. We investigate the frequency dispersion and the hysteresis of these devices and conclude that direct analysis of impedance characteristics is not sufficient to extract information about the interface trap response. We propose a methodology to study trapping phenomena based on transient measurement analysis, describing the approximations made and their effect on the accuracy of the result. Results on MIS test structures confirm the existence of a broad distribution of trap states. Capture time constants are found to be uniformly distributed in the experimental time window between 50 μs and 100 s.

Investigations of chemical species at the dielectric/III-N interface remain an important question in order to understand the chemical origin of the surface states, which are present at the heterostructure surface. In this work, we demonstrate a sample preparation technique to analyze the existing interface species by X-ray photoelectron spectroscopy (XPS) through thin uniform silicon nitride (Si3N4) layers 1.4 ± 0.2 nm. We show that it is crucial that the layers are as thin as possible but as thick as necessary to avoid oxygen diffusion through the passivation. Due to the sufficient information depth provided by such layers, the photoelectrons are detected. This is an advantage over sputtering as no intermixing of atoms or cleavage of bonds occurs. We show that the deposited Si3N4 hinders oxygen diffusion through the layer to the AlGaN surface. Selective SiO2 over Si3N4 etching and XPS depth profiles indicate that ∼1 nm of the thin Si3N4 layer has formed a surface oxide. Angle-resolved XPS measurements confirm the accumulation of oxygen at the top and bottom Si3N4 interfaces. No indication is found that interfacial oxygen is bound to any other than the group-13 metal. In agreement with the HSAB concept, the interfacial oxygen is bound to Al rather than Ga. Scheme of the nondestructive XPS interface analysis of the dielectric/AlGaN interface.

Analysis of carbon doped GaN (GaN:C) layers in a wide temperature range reveals the same non-Arrhenius thermal behavior of capacitance transients related to trapping/detrapping dynamics on carbon defects and of the leakage current. Our results indicate that GaN:C does not behave like a classical semiconductor but is rather determined by a defect band (DB). Leakage via DB is the slowest process in charging/discharging dynamics, thus controlling it. We propose a microscopic model of carrier exchange between the carbon atom and the DB which can also explain the wide range of activation energies attributed previously to carbon. Understanding of leakage mechanisms and its interplay with charging is an important step towards optimization of GaN HEMT buffers.

The influence of surface modifications on the Schottky barrier height for gallium nitride semiconductor devices is frequently underestimated or neglected in investigations thereof. We show that a strong dependency of Schottky barrier heights for nickel/aluminum-gallium nitride (0001) contacts on the surface terminations exists: a linear correlation of increasing barrier height with increasing electronegativity of superficial adatoms is observed. The negatively charged adatoms compete with the present nitrogen over the available gallium (or aluminum) orbital to form an electrically improved surface termination. The resulting modification of the surface dipoles and hence polarization of the surface termination causes observed band bending. Our findings suggest that the greatest Schottky barrier heights are achieved by increasing the concentration of the most polarized fluorine-gallium (-aluminum) bonds at the surface. An increase in barrier height from 0.7 to 1.1 eV after a 15% fluorine termination is obtained with ideality factors of 1.10 ± 0.05. The presence of surface dipoles that are changing the surface energy is proven by the sessile drop method as the electronegativity difference and polarization influences the contact angle. The extracted decrease in the Lifshitz-van-der-Waals component from 48.8 to 40.4 mJ/m(2) with increasing electronegativity and concentration of surface adatoms confirms the presence of increasing surface dipoles: as the polarizability of equally charged anions decreases with increasing electronegativity, the diiodomethane contact angles increase significantly from 14° up to 39° after the 15% fluorine termination. Therefore, a linear correlation between increasing anion electronegativity of the (Al)GaN termination and total surface energy within a 95% confidence interval is obtained. Furthermore, our results reveal a generally strong Lewis basicity of (Al)GaN surfaces explaining the high chemical inertness of the surfaces.

The etch mechanism of group-III-nitrides in hot H3PO4 has been studied and compared to KOH. The etched surfaces were investigated by AFM, SEM, TEM, EDX and the etch solutions by NMR. AlGaN is shown to be selectively etched by low temperature H3PO4 or molten KF · 2H2O. The material dependency causes much flatter etch pit angles for AlGaN over GaN as well as H3PO4 over molten KOH. 27Al-NMR investigations prove a fast ligand exchange as well as homogenous ligands. 31P-NMR confirms that the dissolved metal is present as AlH2PO42+ and no hydration takes place nor does water play a role in the chemical reaction, opposed to KOH etching. Hence we propose a dissolution limited etch mechanism which can explain difference etch pit angles and material dependencies, as they are the result of material dependent dissolution, assuming that the vertical etch rate is constant.

Charge trapping in gallium-nitride (GaN) metal-insulator-semiconductor high-electron-mobility transistors (MIS-HEMTs) is a serious reliability challenge but is still poorly understood. A promising opportunity to investigate physical defect properties has become available through nanoscale GaN fin-MIS-HEMTs which are small enough to be sensitive to the impact of individual defects. In this work, we extract the properties of four pre-existing single defects, which are identified by their correlated random telegraph noise (RTN) signals and step heights. We use a two-state non-radiative multi-phonon (NMP) model to extract their vertical positions, their trap levels and their apparent activation energies. We show that they are in close proximity to each other within the barrier layer and also share a similar trap-level despite their different capture and emission times. Furthermore, TCAD simulations are used to estimate the influence of the vertical and horizontal positions of single-traps which are in reasonable agreement with the experimental data.

The transient recovery characteristics of the threshold voltage drift (ΔVth) of GaN-based HEMTs with a SiO2 gate dielectric induced by forward gate bias stress are systematically and comprehensively investigated for stress times from 100 ns to 10 ks, recovery times from 4 μs to 10 ks, and stress biases from 1 to 7 V. The measured recovery data are analyzed using the concept of capture emission time maps. It is shown that the observed data cannot be explained by simple first-order defect kinetics. It is revealed that the recovery curves for constant stress times scale with the stress bias. Furthermore, the shape of the recovery curves changes from concave to convex with increasing stress time, independent of the stress bias. For short stress times and low stress bias, a dominant rate limiting effect of the III/N barrier layer is proposed. Defect-related physical processes with a broad distribution of characteristic time constants are discussed to explain the logarithmic time dependency of ΔVth stress and recovery, at which the role of the Coulomb feedback effect, complex defects, and spatially distributed defects are considered.

Stress and recovery dynamics of the drain current are analysed in normally-off GaN Hybrid-Drain - embedded Gate Injection Transistors (HD-GITs) submitted to a semi-ON state stress. Under this condition moderate drain current and high drain voltage (350-650 V) are applied simultaneously. During the stress phase the drain current shows a remarkable decrease due to hot carrier trapping and is dependent on the applied drain voltage, stress current and temperature (30–190 °C). This degradation is fully recoverable, either thermally in the temperature range 150–190 °C or by hole injection from the gate. We provide a model for the detrapping time constant taking into account both the thermally-driven process dominating for gate biases VGS 3 V.

We analyze the degradation of InAlN/GaN HEMTs using a secondary gate electrode placed on top of the SiN passivation layer in between the Schottky gate and drain contact. Although the actual transistor showed only minor degradation during the stress test under off-state bias for more than 60 h, a linear increase of trapped charges in the SiN layer has been detected starting at about 13 h of stress. The charge increase is correlated with the increased leakage current and dielectric breakdown at the secondary gate.

We report on AlGaN/GaN MIS-HEMTs with a thermally stable dielectric/AlGaN interface induced by plasma fluorination. The plasma treatment leads to a modification of the "native" surface donors and a fundamentally different device and defect behavior. The feasibility of III-N surface defect modifications shows a new direction for reducing VTh drifts or the possibility of engineering the surface defects.

We demonstrate the applicability of atomic layer deposition of Al2O3 and ZrO2 on InAlN/GaN-materials by means of Metal Oxide Semiconductor High Electron Mobility Transistors (MOS-HEMTs). We investigate the impact of various surface pre-treatment methods, as well as the impact of in-situ pre-treatment by ALD on the electrical characteristics to evaluate insulation quality and thermal stability of the gate oxide stack, threshold voltage and interface traps. We show that by using the right surface pre-treatment as well as by using an adapted ALD pulsing scheme, one can obtain clearly improved MOS-HEMT performance concerning reduced gate leakage currents, suppressed current collapse effects, and increased drain currents

We present the electrical characteristics of an AlGaN/GaN/p-GaN heterostructure field-effect transistor (HFET) with a Si delta-doped layer. The p-GaN layer greatly improves buffer isolation (between neighboring mesas) in the AlGaN/GaN HFET and leads to effective carrier confinement. The Si delta-doped layer compensates not only the carrier depletion caused by the formation of a pn junction, but also even causes an increase in two-dimensional electron gas (2DEG) density. The proposed AlGaN/GaN HFET shows greatly improved electrical characteristics such as high drain current density and transconductance and low buffer and gate leakage currents compared with those of conventional AlGaN/GaN HFETs.

Charge trapping in the insulating layer of gallium-nitride (GaN) metal-insulator-semiconductor high-electron-mobility transistors (MIS-HEMTs) is a serious reliability challenge but is still poorly understood. We demonstrate here that the observed Vth drift and recovery can be understood as charge capture and emission following a non-radiative multi-phonon (NMP) mechanism into traps with widely distributed properties. Furthermore, due to the large amount of trapped charge, the feedback of that charge on the surface potential and thus on the capture and emission times has to be considered self-consistently in order to correctly explain the temporal changes in their distributions.

Threshold voltage instabilities are investigated in GaN-based metal-insulator-semiconductor (MIS) high-electron-mobility-transistors (HEMTs) with specially designed on-wafer heaters structures. The heaters are based on metal lines or 2-dimensional electron gas (2DEG) resistors and enable to choose the temperature during stress and recovery in the stress-recovery experiments independently. It allows to decouple thermal activation of capture (< 0.9 eV) and emission (0.4–0.9 eV) processes at the dielectric/nitride interface, which is not possible in stress-recovery experiments performed at a common ambient temperature.

The influence of threading dislocations (TDs) on the dry thermal oxidation of c-plane gallium nitride (GaN) is investigated for oxidation temperatures above 800°C. The transformation of GaN to gallium oxide (Ga2O3) is preferably found at TDs and grain boundaries, showing enhanced vertical oxidation, compared to defect free surface sites. Therefore, the increase in surface roughness commonly obtained upon oxidation is explained by an inhomogeneous chemical reactivity associated with those crystal defects. Additionally, annealing in an N2 atmosphere showed that also decomposition is favored at such chemically reactive spots. Comparison between decomposition and oxidation suggests that at temperatures above 950°C, the Ga2O3 formation is supported by the decomposition of GaN and subsequent oxidation of the metallic gallium.

Novel ion beam processing for microelectronic applications has been performed by doping silicon with a focused ion beam tool. A Ga+ ion beam with a energy between 10 and 50 keV was used for p-doping of Si. The ion beam could be focused to an effective beam diameter in the sub-micron range with the smallest focus own below 10 nm. In contrast to conventional implantation with a broad ion beam where the doped area is assigned by a hardmask the implantation was achieved by scanning a focused ion beam over the designated implantation area. With this approach not only the hardmask becomes obsolete because of the electronic beam guidance. Moreover, different doses may be implanted on the same wafer. An additional feature is the inhomogeneous implantation in a pixel-array, where the distance between exposed pixels can be deliberately varied. Even single spots can be independently doped with the focused gallium beam. Due to lateral scattering of ions in the semiconductor the circular implantation area is larger than the beam diameter. With a variation of the pixel spacing we could intentionally obtain either a overlap or a separation of implantation spots. With a four-point method we have investigated the conductivity of the dot-array implanted area. The conductivity of the p-doped region could be deliberately scaled by varying the pixel spacing, the implantation dose and the ion energy. The effective implantation diameter of a single pixel could be determined. This modified implantation approach was also used to fabricate functional p-channel MOSFET’s. The Ga implantation with a focused ion beam was used for p-doping of source and drain regions of the transistor device. The utilization of this dot-array implantation with a FIB for semiconductor circuitry demonstrates the potential application of this approach. With the laterally inhomogeneous implantation dot-arrays of doped zones in the nanometer range could be fabricated.

The very fast dynamics of threshold voltage drift (ΔVth) of GaN-based metal-insulator-semiconductor-HEMTs induced by forward gate bias stress is investigated with a simple oscilloscope based setup. We show that the logarithmic recovery time dependence of ΔVth, previously found for recovery times ranging from 10 ms up to 1 ms, extend even to the μs regime. Further, we observed an accumulation of ΔVth because of repetitive stress pulses of 100 ns. Consequences for device operation and reliability are discussed.

We present enhancement-mode GaN high electron mobility transistors on Si substrates with ZrO2 gate dielectrics of thicknesses t(ox) between 10 and 24 nm. The oxide interlayers between the InAlN/AlN barrier and gate metal allow raising the device threshold voltage up to + 2.3 V and reduce gate leakage current to less than 100 nA/mm with a high drain current on/off ratio of 4 orders of magnitude. We use a model that explains the observed linear dependence of the threshold voltage on tox and allows determining fixed charges at the oxide/barrier interface. (C) 2012 Elsevier B. V. All rights reserved.

In carbon-doped GaN (GaN:C) buffers used in a GaN-on-Si technology, the buffer is embedded in between transition and channel layers. This makes the analysis of buffer properties difficult due to e.g., carrier injection from or potential drop at these adjacent layers. Here, we analyze capacitance- and current-voltage characteristics of 200–300 nm thick GaN:C ([C] = 1019 cm−3) layers which are embedded between a top metal electrode and bottom n-doped GaN (n-GaN). Such structures allow a better potential control in GaN:C and thus determination of the band diagram quantitatively. The accumulation of negative charge (concentration up to 6 × 1017 cm−3) with bias is observed in GaN:C at both polarities. For biases Vappl +1.7 V, accumulated negative charges in GaN:C raise an energy barrier of ∼1.1 eV for electron injection from n-GaN ...

Gallium nitride based high electron mobility transistors are widely known for their operational instabilities regarding interface defects to the dielectric. In this paper, we discuss a III-N surface treatment that results in an electrically more defined interface and hence a narrower distribution of electrically present interface states compared to the original, untreated interface. This surface modification is caused by a remote plasma fluorination of the III-N surface. We show that it is a very distinctive surface processing which cannot be reproduced by other plasma techniques or ion implantation. Applying physical and chemical analyses, the fluorination is found to have a remarkable stability towards temperatures up to 700 °C and is also stable in air for up to 180 h. However, an aqueous clean allows the surface to return to its original state. Even though the exact physical origin of the responsible surface donor cannot be inferred, we suggest that fluorine itself might not directly represent the new surface donor but that it rather activates the III-N surface prior to the dielectric deposition or even substitutes and hence reduces the concentration of surface hydroxides.

Exchange of carriers between the GaN channel and the dielectric/AlGaN interface in AlGaN/GaN metal insulator semiconductor high electron mobility transistors was recently attributed to a serial process of electron transport through the AlGaN barrier and electron trapping/emission at the interface. In this paper, the time constant related to barrier transport is evaluated from the measurements of time onset of threshold voltage drift in stress-recovery experiments. Temperature and forward gate bias dependent studies reveal an activation energy of 0.65 eV for the electron transport at zero bias being consistent with the estimated potential barrier of 0.75 eV at the dielectric/AlGaN interface. Thermo-ionic emission and defect assisted tunneling to near interface states are considered as transport mechanisms.

Gallium nitride based high-electron-mobility transistors (HEMTs) have been investigated extensively as an alternative to Si-based power transistors by academia and industry over the last decade. It is well known that GaN-based HEMTs outperform Si-based technologies in terms of power density, area specific on-state resistance and switching speed. Recently, wide band-gap material systems have stirred interest regarding their use in various sensing fields ranging from chemical, mechanical, biological to optical applications due to their superior material properties. For harsh environments, wide bandgap sensor systems are deemed to be superior when compared to conventional Si-based systems. A new monolithic sensor platform based on the GaN HEMT electronic structure will enable engineers to design highly efficient propulsion systems widely applicable to the automotive, aeronautics and astronautics industrial sectors. In this paper, the advancements of GaN-based HEMTs for mechanical sensing applications are discussed. Of particular interest are multilayered heterogeneous structures where spontaneous and piezoelectric polarization between the interface results in the formation of a 2-dimensional electron gas (2DEG). Experimental results presented focus on the signal transduction under strained operating conditions in harsh environments. It is shown that a conventional AlGaN/GaN HEMT has a strong dependence of drain current under strained conditions, thus representing a promising future sensor platform. Ultimately, this work explores the sensor performance of conventional GaN HEMTs and leverages existing technological advances available in power electronics device research. The results presented have the potential to boost GaN-based sensor development through the integration of HEMT device and sensor design research.

An unexpected enhancement of V th drift (ΔV th ) in GaN MIS-HEMTs induced by repetitive forward gate bias stress pulses in contrast to single pulses is found. Further, it is revealed that the slope of ΔV th recovery curves decreases for increasing intermediate-recovery time t i , i.e. the recovery time in between individual stress pulses. The observed behavior is explained by the interaction of the 2DEG channel with the dielectric/III-N interface via the III-N barrier during (repetitive) stress, for which a charge feedback mechanism plays a crucial role.

In this paper we focus on activation and diffusion during annealing of silicon after implantation into Mg-doped GaN epitaxial layers. The Si diffusion was analyzed for different capping materials and compared to an uncapped sample. Investigation of the Si concentration obtained from secondary ion mass spectroscopy (SIMS) and comparison with calculation revealed several diffusion constants. Different diffusion behaviours at the surface were detected for different Si concentrations around the solubility of Si in GaN. Further, we found similar Si activation efficiencies in GaN for high and low fluences, after taking into account the compensation of electrons by the p-type background doping. In addition, we investigated the insulation between Si implanted islands in p-type GaN and the effect of additional Ar+ implantation. (© 2010 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim)

We present GaN-based high electron mobility transistors (HEMTs) with a 2-nm-thin InAlN/AlN barrier capped with highly doped n(++) GaN. Selective etching of the cap layer results in a well-controllable ultrathin barrier enhancement-mode device with a threshold voltage of +0.7 V. The n(++) GaN layer provides a 290-Omega/square sheet resistance in the HEMT access region and eliminates current dispersion measured by pulsed IV without requiring additional surface passivation. Devices with a gate length of 0.5-mu m exhibit maximum drain current of 800 mA/mm, maximum transconductance of 400 mS/mm, and current cutoff frequency f(T) of 33.7 GHz. In addition, we demonstrate depletion-mode devices on the same wafer, opening up perspectives for reproducible high-performance InAlN-based digital integrated circuits.

A high dielectric interface quality is the determining factor for high power GaN metal oxide semiconductor field- effect transistor (MOSFET) devices. We characterized 100 A thick aluminum oxide (Al2O3) films deposited by ALD on MOCVD grown undoped GaN on sapphire. First we measured the leakage current and densification behaviour of the dielectric after annealing at different temperatures up to 900 °C and determined the polycrystalline phase change to be around 800 °C. Further we characterized the interface charges of both films according to the flatband shift, induced by over-band gap UV light, showing the lowest interface charge density of 1.27 × 1011 cm–2 after thermal treatment at 850 °C. Additionally, we measured the AC conductivity and calculated the interface states density (Dit) of the upper half of the GaN bandgap, showing the lowest Dit of around 2×1010 cm–2 eV–1 at 2 eV above the valence band, while it remains higher around the band edge at 2.8×1011 cm–2 eV–1, after annealing at 750 °C. (© 2008 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim)

GaN-power HEMTs with insulated gate structure suffer from threshold voltage drifts (ΔV th ) under forward gate bias stress. We present a systematical approach to characterize the phenomenon and understand the dominant physical mechanisms causing this effect. We found out that ΔV th is caused by traps with a broad distribution of trapping and emission time constants. This distribution is analyzed using so called Capture Emission Time (CET) maps known from the study of bias temperature instability (BTI) in CMOS devices. Physical models, which could explain the broad distribution of time constants, are discussed.

Design considerations and performance of n(++) GaN/InAlN/AlN/GaN normally off high-electron mobility transistors (HEMTs) are analyzed. Selective and damage-free dry etching of the gate recess through the GaN cap down to a 1-nm-thick InAlN barrier secures positive threshold voltage, while the thickness and the doping of the GaN cap influence the HEMT direct current and microwave performance. The cap doping density was suggested to be 2 x 10(20) cm(-3). To screen the channel from the surface traps, the needed cap thickness was estimated to be only 6 nm. Design is proved by an experiment showing a constant value of the HEMT dynamical access resistance, while a single-pulse experiment indicated almost collapse-free performance. On the other hand, it is found that the n(++) GaN cap does not contribute to the HEMT drain current conduction, nor does it provide a path for the OFF-state breakdown. HEMTs with a gate length of 0.25 mu m and a 4-mu m source-to-drain distance show a drain-to-source current of 0.8 A/mm, a transconductance of 440 mS/mm, a threshold voltage of similar to 0.4 V, and a cutoff frequency of 50 GHz. A thin and highly doped GaN cap is also found to be suitable for the processing of normally on HEMTs by adopting the nonrecessed gate separated from the cap by insulation.

We provide theoretical and simulation analysis of the small signal response of SiO2/AlGaN/GaN metal insulator semiconductor (MIS) capacitors from depletion to spill over region, where the AlGaN/SiO2 interface is accumulated with free electrons. A lumped element model of the gate stack, including the response of traps at the III-N/dielectric interface, is proposed and represented in terms of equivalent parallel capacitance, Cp, and conductance, Gp. Cp -voltage and Gp -voltage dependences are modelled taking into account bias dependent AlGaN barrier dynamic resistance Rbr and the effective channel resistance. In particular, in the spill-over region, the drop of Cp with the frequency increase can be explained even without taking into account the response of interface traps, solely by considering the intrinsic response of the gate stack (i.e., no trap effects) and the decrease of Rbr with the applied forward bias. Furthermore, we show the limitations of the conductance method for the evaluation of the density...

The high density of defect states at the dielectric/III-N interface in GaN based metal-insulator-semiconductor structures causes tremendous threshold voltage drifts, ΔV th, under forward gate bias conditions. A comprehensive study on different dielectric materials, as well as varying dielectric thickness t D and barrier thickness t B, is performed using capacitance-voltage analysis. It is revealed that the density of trapped electrons, ΔN it, scales with the dielectric capacitance under spill-over conditions, i.e., the accumulation of a second electron channel at the dielectric/AlGaN barrier interface. Hence, the density of trapped electrons is defined by the charging of the dielectric capacitance. The scaling behavior of ΔN it is explained universally by the density of accumulated electrons at the dielectric/III-N interface under spill-over conditions. We conclude that the overall density of interface defects is higher than what can be electrically measured, due to limits set by dielectric breakdown. These findings have a significant impact on the correct interpretation of threshold voltage drift data and are of relevance for the development of normally off and normally on III-N/GaN high electron mobility transistors with gate insulation.

We experimentally prove the viability of the concept of the double-heterostructure quantum well InAlN/GaN high-electron-mobility transistor (HEMT) for the device higher robustness and reliability. In the single quantum well InAlN/GaN HEMTs, the intrinsic channel resistance increases by 300% after 1 h off-state stress; much less degradation is observed in the double-heterostructure device with an AlGaN back barrier. Physics-based device simulation proves that the back barrier blocks the rate of carrier injection into the device buffer. However, whatever the quantum well design is, the energy of the injected electrons in the buffer of InAlN/GaN-based HEMTs is higher than that in the buffer of AlGaN/GaN HEMTs. This energy may be sufficient for releasing hydrogen from GaN point defects.