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A new random sampling strategy, designed for retrieving subsets consisting of two edge pixels from an input image, is proposed as the sampling process for RANSAC circle detection using coaxal transform. The proposed strategy is shown to have the following advantages over the conventional random sampling strategy. First, a poll size can be planned in a principled manner. Second, once a poll size is set, the probability that a circle is missed by the sampling process is kept relatively constant regardless of noise. Third, the actual number of subsets taken is automatically adjusted for different image complexities. Experimental results in agreement with the claimed advantages are presented. Index Terms--Random sampling strategy, poll size determination, circle detection, RANSAC, Hough transform.

A proposal is presented for a physical model for a humidity-sensing metal-insulator-semiconductor capacitor with porous ceramic film.

Dynamic-stress-induced enhanced degradation of 1/frequency noise has been investigated in n-MOSFETs with thermal oxide or nitrided oxide as the gate dielectric. Physical mechanisms were analyzed. Degradation of 1/frequency noise under ac stress was found to be far more significant than that under dc stress. Under the two types of ac stress conditions, much smaller degradation of 1/frequency noise is seen for the nitrided device because of the improved oxide/Si interface and near-interface oxide factors associated with interfacial nitrogen .

The authors present designs for a high-quality thin gate dielectric transistor. Topics include hot-carrier stress, MOS devices, and oxynitrides.

The role of degradation in increasing 1/f noise in n-channel metal-oxide-semiconductor field-effect transistors subjected to various hot-carrier stresses has been studied. Results indicate that the rise in 1/f noise can be traced to greater carrier-number fluctuations from oxide traps under any hot-carrier stress. For maximum substrate- and gate-current stresses, 1/f noise results from enhanced surface-mobility fluctuation due to electron trapping at preexisting and generated fast interface states.

Research was conducted to examine the backsurfaces and interface properties of six types of metal-oxide-semiconductor capacitors which were bombarded with a low-energy (550 eV) argon beam. The gate oxides of the capacitors were trichloroethyene oxide, thermal oxide, reoxidized-nitrided oxide, NH3-nitrided oxide, N2O-nitrided oxide and rapid-thermal-nitrided oxide. Results revealed that the interface-state density of all devices declined with increasing bombardment time/ does for bombardment times of up to 45 min.

A study was conducted to show that the emission wavelength of (InP)2/(GaP)2 short-period superlattice quantum wells can be changed by altering the tilt angle of the substrate or by adjusting the interruption time during switching. Variable temperature photoluminescence spectroscopy was carried out to characterize the samples. Results indicated that the growth mechanism can be determined through the bonding preference between the group III adatoms on the surface.

An experiment was conducted to determine the accuracy of charge-pumping measurement technique with gate sawtooth pulses on metal oxide semiconductor field effect transistors. A pulse generator was utilized to supply the gate sawtooth pulses and a reverse bias method was applied to the source and drain of the transistors. Results revealed that the dominant mechanism which affected the measurement accuracy was the energy range of interface-trap distribution.

A trap assisted, two-step tunneling model is developed and used to investigate the relation of increased interface states in n-MOS field effect transistors to post-stress, gate-induced-drain-leakage (GIDL) current increase during hot-carrier stress. It will be shown that the two-step tunneling method is so dominant under appropriate drain-gate biases that GIDL current shift is insensitive to temperatures up to about 50 degrees centigrade.

A study using backsurface argon bombardment has been carried out on interface and charge-trapping properties of nitrided n-channel metal-oxide-semiconductor field-effect transistors (n-MOSFETs). After bombardment, interface state density lessens and interface hardness against hot-carrier bombardment gets better. Oxide-charge-trapping properties were better. Turnaround behavior could be seem in the improvements depending on bombardment conditions. It can be attributed to stress compensation in the area of the Si/SiO(sub.2) interface and annealing effects.

Post-oxidation N2O annealing in the gate oxide N2O anneal step causes a 4- to 10-fold increase in the lifetime of CMOSFETs and reduces boron infiltration from the P-MOSFET p+ poly-Si gate. Charge trapping properties and interface hardness remain unaffected at the cryogenic temperatures. A nitrogen concentration of 2% at the Si/SiO2 interface at a temperature of 900 degrees Celsius or 950 degrees Celsius is responsible for the enhancements in the MOSFET.

Temperature influences the electronic conduction in thin nitrided oxide films. The temperature dependency for the conduction current is different for various proportions of nitride in oxide films. The trap assisted conduction is shallow and causes the temperature dependencies of oxide films.

The derivation of mathematical equation for hot-electron induced interface state generation and threshold-voltage shift reveals that both the parameters are related to each other by the power law. The derivation is performed by the consideration of water-related chemical bond decomposition near the silicon/oxide interface. Interface hardness, capture cross section of trap, water-related chemical bond density and initial interface trap density influence the threshold voltage shift.

The drain leakage in n-channel metal-oxide-semiconductor field-effect transistors with pure oxide, nitrided oxide or annealed nitrided oxide gate insulators was investigated over the temperature range of 300 to 400 degrees Kelvin. The measurements were carried out in a nitrogen ambient under light-tight conditions. Results indicate that a tunneling mechanism is responsible for the high-field drain leakage in the transistors.

A new procedure has been developed for extracting the energy of trap levels in insulators. The process involves plotting 1n(JE) vs 1/E which makes it possible to determine trap energy drirectly from the slope and approximate trap density from the intercept. Through the procedure, the nitridation-induced trap energy was identified at 2.2 eV for nitride-oxide capacitors.

The off-state instabilities of n-channel metal oxide semiconductor field effect transistors that have undergone thermal nitridation are studied. The latter prompts a barrier height decrease at the Si/SiO2 interface that leads to gate oxide hot-hole injection under conditions of band-to-band tunneling. This yields a higher off-state gatecurrent and a reduction in the gate-induced drain leakage current.

A quasi-two-dimensional model of the threshold voltage is developed for lightly doped drain (LDD) and non-LDD metal oxide semiconductor field effect transistors with deep-submicrometer channels. The model considers the influence of gate oxide thickness, source-drain junction height and channeldoping in predicting the accelerated Vth decrease. Experimental results on fabricated devices are also analyzed to validate the model.

Electrical conduction in different types of nitrided oxide dielectric capacitors was investigated. The results showed that a trap-assisted mechanism and barrier lowering due to nitrogen accumulation at the injecting interface were the main causes of enhanced conduction in nitridedoxide devices. The model's predictions were in good agreement with previous results obtained by other researchers.