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Luminescent radicals are attracting attention as emitters in electroluminescent devices thanks to the exploitation of doublet excitons. Recent studies reveal that exciton formation in radical organic light‐emitting diodes (OLEDs) primarily occurs through a charge trapping mechanism. Although typically detrimental for OLEDs, this might be a key process to elucidate light emission in organic light‐emitting transistors (OLETs). Here, a unipolar n‐type architecture suitable for the implementation of radical emitters is introduced, designed based on computational calculations. The operation of the as‐realized devices incorporating the newly synthesized [2,6‐dichloro‐4‐(2,6‐dimethoxyphenyl)phenyl](3,5‐dichloro‐4‐pyridyl) (2,4,6‐trichlorophenyl)methyl radical is investigated via transient electroluminescence measurements to demonstrate the occurrence of long‐living emission ascribed to the charge trapping mechanisms. Moreover, a comprehensive understanding of the processes governing radical‐OLET is obtained by recording complete 2D maps of both optical and electrical response of the device as a function of applied voltages. Notably, the trapping of electrons by radical moieties is demonstrated to generate a negative charge density in the emissive layer that facilitates holes to be injected: increasing the balance of opposite charge carriers, a tenfold enhancement of the external quantum efficiency (EQE) at the proper source‐drain and source‐gate voltage conditions is reported to reach a maximum EQE value of 0.2%. [ABSTRACT FROM AUTHOR]

The 2D van der Waals material CuInP2S6, characterized by its memory behavior arising from room‐temperature ferroelectricity and Cu+ ions migration, has emerged as a promising candidate material for artificial synaptic devices. Nevertheless, with a bandgap of 2.7 eV, CIPS‐based devices are generally limited to operating in pure electrical mode or under ultraviolet light, making them unsuitable for applications across the entire visible light spectrum. Here, a two‐terminal artificial synapse based on CIPS/MoS2/graphene heterojunction is constructed. Compared to ion migration or ferroelectricity under high bias voltage, photogating due to charge trapping is identified as the working mechanism under low bias voltage (< 1.5 V), which can respond to the shortest pulse (∼5 ms) and least energy consumption of 1.7 / 6.3 fJ per pulse up to date for CIPS‐based synapses. Benefiting from the fading memory effect and nonlinear characteristics in visible light range, handwritten digit recognition based on reservoir computing has achieved an accuracy of 90.43% with four times higher efficiency than directly using an artificial neuron network. This work thus paves the way for constructing CIPS heterostructure for artificial vision and neuromorphic computing systems. [ABSTRACT FROM AUTHOR]

Exposure to ionizing radiation has been known to affect the mechanical properties of solids; however, the exact mechanisms remain debated. In this study, we test the hypothesis that long lived metastable states formed by trapping of charges within defects influence subcritical cracking (SCC). Crack propagation rates were measured in 5 mol% Yttria‐stabilized zirconia samples, with and without prior exposure to Co‐60 gamma radiation (10 kGy absorbed dose). Crack growth was followed in situ by employing a double cantilever beam specimen inside an environmental scanning electron microscope (ESEM). In comparison with the unirradiated samples, an increased energy release rate of ∼10 J/m2 was required to maintain SCC in the irradiated samples conforming to an increase in SCC fracture resistance. Raman and x‐ray studies preclude any phase transformation and volume change due to irradiation; however, there was a significant change in optical absorption characteristics observed as the darkening of the irradiated sample. Thermally and optically stimulated luminescence measurements suggest that sample darkening is caused by metastable states that form due to charge trapping during radiation exposure. A closer examination of the SEM images demonstrates an increased number of microcracks ahead of the main crack in the irradiated specimens. We conclude that charge trapping in defects due to irradiation, and subsequent detrapping during crack propagation by mechanical stresses, initiate the formation of these microcracks. Consequently, energy is consumed during the interactions between the main crack and the developing microcracks, ultimately ensuing an overall increase in fracture resistance in the SCC regime. [ABSTRACT FROM AUTHOR]

In this work, the absorption spectra of metastable Dy2+, Nd2+, and Sm2+  are identified in SrAl2O4:Eu,Ln persistent phosphors after excitation with blue light, thereby confirming that the persistent luminescence is indeed due to a charge transfer between the two lanthanide dopants. In contrast to previous studies relying on X‐ray absorption spectroscopy to observe charge transfers between dopants, here low‐energy light is exclusively employed to probe for changes in the absorption spectrum of the phosphor, thereby only minimally affecting the state of the phosphor. Optical bleaching in combination with thermoluminescence measurements allowed to assign which optically active trapping centers contribute to the afterglow of the persistent phosphors. [ABSTRACT FROM AUTHOR]

Dielectric capacitors are widely used in aerospace, power systems, and other fields. Working environments with ever‐increasing temperatures pose a new challenge to energy storage performance. Polyetherimide (PEI) has gained extensive research for its good high‐temperature properties. In order to further improve its energy storage performance at high temperatures, many researchers have worked on PEI all‐organic composites doping with molecular semiconductors. Previous studies generally only considered the effect of introduced deep traps on macroscopic properties such as electrical conductivity, electrical breakdown, and energy storage performance. It has been shown that only qualitative analyses can be performed from the perspective of charge trapping, and it is difficult to obtain quantitative results. Therefore, this work proposes to study the macroscopic properties of polymer dielectrics by combining charge trapping with molecular displacement. A comprehensive conduction‐breakdown‐energy storage model was established to explain the influence mechanism of molecular semiconductors on the improved energy storage performance of PEI composites at high temperatures. The molecular semiconductor fillers increase the coefficient of friction between molecular chains, which restricts the movement of molecular chains and also limits charge hopping. Therefore, the dielectrics have higher breakdown strengths and smaller conduction losses, which synergistically enhance the energy storage performance. [ABSTRACT FROM AUTHOR]

This work investigates the gate oxide reliability of commercial 1.2 kV silicon carbide (SiC) metal-oxide-semiconductor field-effect transistors (MOSFETs) with planar and trench gate structures. The performance of threshold voltage (V t h) and gate leakage current (I g s s) in SiC MOSFETs is evaluated under positive and negative gate voltage stress. The oxide lifetimes of SiC planar and trench MOSFETs at 150 °C are measured using constant voltage Time-Dependent Dielectric Breakdown (TDDB) testing. From the test results, it is found that electron trapping and hole trapping in S i O 2 caused by oxide electric field (E o x)  stress affect the V t h of SiC MOSFETs. The saturation and turnaround behavior of the V t h shift during positive and negative gate voltage stresses indicates that the influence of charge trapping in the gate oxide varies with stress time. The I g s s under positive and negative gate voltages depends on the tunneling barrier height for electrons and holes, respectively, which can be calculated using the Fowler–Nordheim (FN) tunneling mechanism. Moreover, the presence of near-interface traps (NITs) affects the barrier height for holes under negative gate voltages. The behavior of V t h shift and I g s s under high-temperature gate bias reflects the charge trapping occurring in different regions of the gate oxide. In addition, compared to SiC planar MOSFETs, SiC trench MOSFETs with thicker gate oxide tend to exhibit higher lifetimes in TDDB tests. [ABSTRACT FROM AUTHOR]

Ferroelectric polarization charge in doped-HfO2 such as HfZrOx (HZO) has a high surface density (~1014 cm-2) compared to the channel carrier (~1013 cm-2), thereby, ferroelectric polarization induces high electric field near the channel surface, critically impacting on the channel carrier behaviors in metal-ferroelectric-insulator-semiconductor (MFIS) ferroelectric field-effect-transistor (FEFET). In this context, channel mobility degradation by ferroelectric polarization and trapped charges will become a concern, because it is well-known that a huge number of charges (~1014 cm-2) are trapped at the gate stack. Especially, channel mobility during the read operation is required to be discussed, because FEFETs are typically targeted for non-volatile memory applications. In this work, we show that channel mobility (μch) and surface inversion carrier density (Ns,inv) in the n-channel FEFET (nFEFET) during read can be significantly different in the multi-level-cell (MLC) operation. This indicates that trapped carriers significantly degrade mobility and the degradation has a “history” effect, revealing that μch and Ns,inv are determined by overlapped effects of ferroelectric polarization and trapped charges. In addition, it is suggested that ferroelectric polarization induces remote phonon scattering. The complicated device physics of the MFIS FEFET indicates that channel mobility should be carefully modeled in the device simulation.

Triboelectric nanogenerators (TENGs) have become reliable green energy harvesters by converting biomechanical motions into electricity. However, the inevitable charge leakage and poor electric field (EF) of conventional TENG result in inferior tribo‐charge density on the active layer. In this paper, TiO2‐MXene incorporated polystyrene (PS) nanofiber membrane (PTMx NFM) charge trapping interlayer is introduced into single electrode mode TENG (S‐TENG) to prevent electron loss at the electrode interface. Surprisingly, this charge‐trapping mechanism augments the surface charge density and electric output performance of TENGs. Polyvinylidene difluoride (PVDF) mixed polyurethane (PU) NFM is used as tribo‐active layer, which improves the crystallinity and mechanical property of PVDF to prevent delamination during long cycle tests. Herein, the effect of this double‐layer capacitive model is explained experimentally and theoretically. With optimization of the PTMx interlayer thickness, S‐TENG exhibits a maximum open‐circuit voltage of (280 V), short‐circuit current of (20 µA) transfer charge of (120 nC), and power density of (25.2 µW cm−2). Then, this energy is utilized to charge electrical appliances. In addition, the influence of AC/DC EF simulation in wound healing management (vitro L929 cell migration, vivo tissue regeneration) is also investigated by changing the polarity of trans‐epithelial potential (TEP) distribution in the wounded area. [ABSTRACT FROM AUTHOR]

The charge carrier mobility in tris(4‐carbazoyl‐9‐ylphenyl)amine (TCTA), a host and hole transport material typically used in organic light‐emitting diodes (OLEDs), is measured using charge carrier electrical injection metal–insulator–semiconductor charge extraction by linearly increasing voltage (i‐MIS‐CELIV). By employing the injection current i‐MIS‐CELIV method, charge transport at time scales shorter than the transit times typically observed in standard MIS‐CELIV is measured. The i‐MIS‐CELIV technique enables the experimental measurement of unequilibrated and pretrapped charge carriers. Through a comparison of injection and extraction current transients obtained from i‐MIS‐CELIV and MIS‐CELIV, it is concluded that hole trapping is negligible in evaporated neat films of TCTA within the time‐scales relevant to the operational conditions of optoelectronic devices, such as OLEDs. Furthermore, photocarrier generation in conjunction with i‐MIS‐CELIV (photo‐i‐MIS‐CELIV) to quantify the properties of charge injection from the electrode to the semiconductor of the MIS devices is utilized. Based on the photo‐i‐MIS‐CELIV measurements, it is observed that the contact resistance does not limit the injection current at the TCTA/molybdenum oxide/silver interface. Therefore, when TCTA is employed as the hole transport/electron‐blocking layer in OLEDs, it does not significantly reduce the injection current and remains compatible with the high injection current densities required for efficient OLED operation. [ABSTRACT FROM AUTHOR]

Phototransistor using 2D semiconductor as the channel material has shown promising potential for high sensitivity photo detection. The high photoresponsivity is often attributed to the photogating effect, where photo excited holes are trapped at the gate dielectric interface that provides additional gate electric field to enhance channel charge carrier density. Gate dielectric material and its deposition processing conditions can have great effect on the interface states. Here, we use HfO2 gate dielectric with proper thermal annealing to demonstrate a high photoresponsivity MoS2 phototransistor. When HfO2 is annealed in H2 atmosphere, the photoresponsivity is enhanced by an order of magnitude as compared with that of a phototransistor using HfO2 without annealing or annealed in Ar atmosphere. The enhancement is attributed to the hole trapping states introduced at HfO2 interface through H2 annealing process, which greatly enhances photogating effect. The phototransistor exhibits a very large photoresponsivity of 1.1 × 107 A W−1 and photogain of 3.3 × 107 under low light illumination intensity. This study provides a processing technique to fabricate highly sensitive phototransistor for low optical power detection. [ABSTRACT FROM AUTHOR]

This study demonstrates a significant enhancement in the performance of thin-film transistors (TFTs) in terms of stability and mobility by combining indium–tungsten oxide (IWO) and zinc oxide (ZnO). IWO/ZnO heterojunction structures were fabricated with different channel thickness ratios and annealing environments. The IWO (5 nm)/ZnO (45 nm) TFT, annealed in O2 ambient, exhibited a high mobility of 26.28 cm2/V·s and a maximum drain current of 1.54 μA at a drain voltage of 10 V, outperforming the single-channel ZnO TFT, with values of 3.8 cm2/V·s and 28.08 nA. This mobility enhancement is attributed to the formation of potential wells at the IWO/ZnO junction, resulting in charge accumulation and improved percolation conduction. The engineered heterojunction channel demonstrated superior stability under positive and negative gate bias stresses compared to the single ZnO channel. The analysis of O 1s spectra showed OI, OII, and OIII peaks, confirming the theoretical mechanism. A bias temperature stress test revealed superior charge-trapping time characteristics at temperatures of 25, 55, and 85 °C compared with the single ZnO channel. The proposed IWO/ZnO heterojunction channel overcomes the limitations of the single ZnO channel and presents an attractive approach for developing TFT-based devices having excellent stability and enhanced mobility. [ABSTRACT FROM AUTHOR]

For operation as power amplifiers in RF applications, high electron mobility transistor (HEMT) structures are subjected to a range of bias conditions, applied at both the gate and drain terminals, as the device is biased from the OFF- to ON-state conditions. The stability of the device threshold voltage (Vt) condition is imperative from a circuit-design perspective and is the focus of this study, where stresses in both the ON and OFF states are explored. We see rapid positive threshold voltage increases under negative bias stress and subsequent recovery (i.e., Vt reduces), whereas conversely, we see a negative Vt shift under positive stress and Vt increase during the subsequent relaxation phase. These effects are correlated with the thickness of the GaN layer and ultimately result from the deep carbon-acceptor levels in the C-GaN back barrier incorporated to screen the buffer between the silicon substrate and the epitaxially grown GaN layer. Methods to mitigate this effect are explored, and the consequences are discussed. [ABSTRACT FROM AUTHOR]

Photocatalytic hydrogen evolution (PHE) from water splitting is a promising technology for clean and renewable energy production. Elemental crystalline red phosphorus (CRP) is purposefully designed and developed for PHE reaction. However, the photocatalytic activity of CRP is limited by its intrinsic P vacancy (VP) defects, which lead to detrimental charge trapping at deep states and hence its severe recombination. To address this issue, a boron (B) incorporated CRP (B‐CRP) photocatalyst is tailored, synthesized via a simple and mild boric acid‐assisted hydrothermal strategy. The incorporation of B effectively fills the VP defects, reducing deep trap states (DTS) and introducing beneficial shallow trap states (STS) within the band structure of CRP. This defect engineering approach leads to enhanced photocatalytic activity, with B‐CRP achieving a PHE rate of 1392 µmol g−1 h−1, significantly outperforming most reported elemental photocatalysts in the literature. Density functional theory (DFT) simulations and ultrafast spectroscopy support the constructive role of B‐dopant‐induced STS in prolonging active charge carrier lifetimes, promoting more efficient photocatalytic reactions. The findings not only demonstrate the effectiveness of B‐CRP as a photocatalyst but also highlight the usefulness of dopant‐induced STS in advancing PHE technologies. [ABSTRACT FROM AUTHOR]

Artificial synaptic devices (ASDs) are attracting widespread attention as highly promising components for use in complex neuromorphic systems, playing crucial roles in addressing the challenges posed by the conventional von Neumann architecture. However, the instabilities of ASDs in high‐temperature environments diminish the reliabilities of the device performances, significantly inhibiting their practical application. Herein, a highly reliable 2D MoS2/GaPS4 ASD that maintains its functionality even after exposure to 400 °C is proposed. Moreover, due to the enhanced charge‐trapping effect of the GaPS4 layer, the memory window expands from an initial 42 to 55 V, accompanied by a substantial on/off ratio of 105, low off‐leakage current of 10−11 A, and high number of endurance cycles (103). The device effectively simulates various biological synaptic functions via electric and light stimulation. Notably, the high electric and light paired‐pulse facilitation indices suggest an exceptional synaptic performance. The findings introduce a novel approach to high‐temperature neuromorphic applications via defect engineering. [ABSTRACT FROM AUTHOR]

Crystalline calcium fluoride (CaF2) is drawing significant attention due to its great potential of being the gate dielectric of two-dimensional (2D) material MOSFETs. It is deemed to be superior to boron nitride and traditional silicon dioxide (SiO2) because of its larger dielectric constant, wider band gap, and lower defect density. Nevertheless, the CaF2-based MOSFETs fabricated in the experiment still present notable reliability issues, and the underlying reason remains unclear. Here, we studied the various intrinsic defects and adsorbates in CaF2/molybdenum disulfide (MoS2) and CaF2/molybdenum disilicon tetranitride (MoSi2N4) interface systems to reveal the most active charge-trapping centers in CaF2-based 2D material MOSFETs. An elaborate Table comparing the importance of different defects in both n-type and p-type devices is provided. Most impressively, the oxygen molecules (O2) adsorbed at the interface or surface, which are inevitable in experiments, are as active as the intrinsic defects in channel materials, and they can even change the MoSi2N4 to p-type spontaneously. These results mean that it is necessary to develop a high-vacuum packaging process, as well as prepare high-quality 2D materials for better device performance. [ABSTRACT FROM AUTHOR]

Abstract Triboelectric nanogenerators (TENGs) have become reliable green energy harvesters by converting biomechanical motions into electricity. However, the inevitable charge leakage and poor electric field (EF) of conventional TENG result in inferior tribo‐charge density on the active layer. In this paper, TiO2‐MXene incorporated polystyrene (PS) nanofiber membrane (PTMx NFM) charge trapping interlayer is introduced into single electrode mode TENG (S‐TENG) to prevent electron loss at the electrode interface. Surprisingly, this charge‐trapping mechanism augments the surface charge density and electric output performance of TENGs. Polyvinylidene difluoride (PVDF) mixed polyurethane (PU) NFM is used as tribo‐active layer, which improves the crystallinity and mechanical property of PVDF to prevent delamination during long cycle tests. Herein, the effect of this double‐layer capacitive model is explained experimentally and theoretically. With optimization of the PTMx interlayer thickness, S‐TENG exhibits a maximum open‐circuit voltage of (280 V), short‐circuit current of (20 µA) transfer charge of (120 nC), and power density of (25.2 µW cm−2). Then, this energy is utilized to charge electrical appliances. In addition, the influence of AC/DC EF simulation in wound healing management (vitro L929 cell migration, vivo tissue regeneration) is also investigated by changing the polarity of trans‐epithelial potential (TEP) distribution in the wounded area.

The charge carrier mobility in tris(4‐carbazoyl‐9‐ylphenyl)amine (TCTA), a host and hole transport material typically used in organic light‐emitting diodes (OLEDs), is measured using charge carrier electrical injection metal–insulator–semiconductor charge extraction by linearly increasing voltage (i‐MIS‐CELIV). By employing the injection current i‐MIS‐CELIV method, charge transport at time scales shorter than the transit times typically observed in standard MIS‐CELIV is measured. The i‐MIS‐CELIV technique enables the experimental measurement of unequilibrated and pretrapped charge carriers. Through a comparison of injection and extraction current transients obtained from i‐MIS‐CELIV and MIS‐CELIV, it is concluded that hole trapping is negligible in evaporated neat films of TCTA within the time‐scales relevant to the operational conditions of optoelectronic devices, such as OLEDs. Furthermore, photocarrier generation in conjunction with i‐MIS‐CELIV (photo‐i‐MIS‐CELIV) to quantify the properties of charge injection from the electrode to the semiconductor of the MIS devices is utilized. Based on the photo‐i‐MIS‐CELIV measurements, it is observed that the contact resistance does not limit the injection current at the TCTA/molybdenum oxide/silver interface. Therefore, when TCTA is employed as the hole transport/electron‐blocking layer in OLEDs, it does not significantly reduce the injection current and remains compatible with the high injection current densities required for efficient OLED operation.

(Hf,Zr)O2 offers considerable potential for next-generation semiconductor devices owing to its nonvolatile spontaneous polarization at the nanoscale. However, scaling this material to sub-5 nm thickness poses several challenges, including the formation of an interfacial layer and high trap concentration. In particular, a low-k SiO2 interfacial layer is naturally formed when (Hf,Zr)O2 films are directly grown on a Si substrate, leading to high depolarization fields and rapid reduction of the remanent polarization. To address these issues, we conducted a study to significantly improve ferroelectricity and switching endurance of (Hf,Zr)O2 films with sub-5 nm thicknesses by inserting a TiO2 interfacial layer. The deposition of a Ti film prior to Hf0.5Zr0.5O2 film deposition resulted in a high-k TiO2 interfacial layer and prevented the direct contact of Hf0.5Zr0.5O2 with Si. Our findings show that the high-k TiO2 interfacial layer can reduce the SiO2/Si interface trap density and the depolarization field, resulting in a switchable polarization of 60.2 μC/cm2 for a 5 nm thick Hf0.5Zr0.5O2 film. Therefore, we propose that inserting a high-k TiO2 interfacial layer between the Hf0.5Zr0.5O2 film and the Si substrate may offer a promising solution to enhancing the ferroelectricity and reliability of (Hf,Zr)O2 grown on the Si substrate and can pave the way for next-generation semiconductor devices with improved performance.

Photostimulated luminescence phosphors are promising candidates for next‐generation optical data storage devices. Herein, optically‐reversible luminescence modulation is demonstrated using UV wavelengths in the fluoroperovskite RbCdF3:Mn, where the modulation is mediated by photostimulated luminescence processes. UV‐C stimulation enhances the luminescence from Mn2+ centers and simultaneously fills electron traps. This charging process occurs via electron transfer from Mn2+ ions to fluorine vacancies, yielding Mn3+ ions and F‐centers, and is mediated by conduction band transport. UV‐A stimulation restores the material to the initial state. This discharging process occurs via electron transfer from F‐centers to Mn3+ ions and is similarly mediated by conduction band transport. Moreover, the discharging process manifests Mn2+ photostimulated luminescence. The primary trap state has activation energies in the range 1.46 to 1.73 eV and has room temperature lifetimes exceeding 40 000 years. A kinetic model is presented and evaluated that accurately describes the charge transport and luminescence properties of the material. Thus, a material is presented via which ultra‐long term, multi‐level luminescent data storage can be realized, and a model via which precise control over the luminescence modulation and photostimulated luminescence intensities can be achieved. [ABSTRACT FROM AUTHOR]

Neuromorphic devices, which can mimic the human body's neural system, are rising as an essential technology for artificial intelligence. Here, two types of organic synaptic transistors (OSTRs), OSTR‐A and OSTR‐B, are fabricated on either glass or polymer film using water‐processable charge‐trapping gate‐insulating layers that are prepared by reacting ethylenediamine (EDA) and poly(2‐acrylamido‐2‐methyl‐1‐propanesulfonic acid) (PAMPSA). OSTR‐A is designed to function as a basic artificial synapse by gate pulse stimulation only, while OSTR‐B has additional near‐infrared (NIR)‐absorbing conjugated polymer layers for further sensing of NIR light upon gate voltage stimulations. The PAMPSA:EDA films are found to contain permanent charge bridges (ion pairs of –SO3− +NH3‐) that play a charge‐trapping role in OSTRs. Both devices with the PAMPSA:EDA layers exhibit clear postsynaptic current (PSC) signals upon gate voltage pulses, leading to long‐term potentiation/depression characteristics. The flexible OSTR‐B devices can sense the NIR light (905 nm) upon gate pulse stimulation and their PSC signals are well maintained even after bending (>5000 times). Artificial neural network simulations disclose that the flexible OSTR‐B devices can stably perform synaptic operations under the NIR light with high accuracy (>90%) even after repeated bending (5000 times), indicative of potential use in artificial neuromorphic skin applications. [ABSTRACT FROM AUTHOR]

Nonvolatile memory is an indispensable component of electronic devices. However, the current technology makes it difficult to satisfy the emerging big data demand. To circumvent the existing problems, herein, a first attempt is made to achieve multifunctional nonvolatile memory based on all 2D heterostructures, consisting of histidine‐doped molybdenum disulfide quantum disks mixed with graphene oxide and a graphene macroscopic heterojunction. The designed device possesses intriguing hybrid electrically and optically controllable nonvolatile memory functionalities. By harnessing the unique properties of these materials, memory devices demonstrate long‐term stability and nonvolatile characteristics under both optical and electrical control signals. These devices possess outstanding features, such as multiple read‐write cycles, multi levels, and fast switching speeds, overcoming the limitations of traditional components. To explore the underlying physical mechanism, the Fermi level of graphene is measured and it is confirmed that the charge transfer and trapping across the heterojunctions are the major factors responsible for the observed behavior. This study demonstrates that 2D heterostructures for hybrid optically and electrically controllable nonvolatile memory pave an alternative route for the next‐generation information technology. [ABSTRACT FROM AUTHOR]

Although 2D material van der Waals heterostructures (vdWHs) exhibit many novel properties and applications, 2D homojunctions have unique advantages in interface lattice matching, band continuity, and charge transfer efficiency. However, the rectification performances of 2D homojunction diodes are severely limited by the small junction barrier, mainly due to inefficient charge doping. In this work, an ultrahigh‐rectification‐ratio WSe2 homojunction diode achieved by the semi‐floating gate doping of graphdiyne oxide (GDYO) is reported. Utilizing the WSe2/GDYO direct charge trapping mode can free the inhibition of charge capturing efficiency by removing conventional insulating barriers and thus improve the rectification ratio. The C─C(sp) and oxygen‐containing functional groups in the GDYO layer can provide outstanding charge‐trapping ability due to their unsaturation. Furthermore, the oxygen plasma treatment used for oxidizing graphdiyne (GDY) into GDYO can make GDYO a flatter surface, thus creating strong‐coupling WSe2/GDYO interfaces to improve the charge transfer efficiency and enhance the electrostatic doping effect. Besides, the WSe2/GDYO interfaces are confirmed to possess a higher junction barrier than that of the WSe2/GDY interfaces. This research proposes a brand‐new approach to building p–n junctions via charge trapping and the homojunction diode with a record‐highest rectification ratio of up to 106 is obtained. [ABSTRACT FROM AUTHOR]

This study investigates the electrical characteristics observed in n-channel and p-channel ferroelectric field effect transistor (FeFET) devices fabricated through a similar process flow with 10 nm of ferroelectric hafnium zirconium oxide (HZO) as the gate dielectric. The n-FeFETs demonstrate a faster complete polarization switching compared to the p-channel counterparts. Detailed and systematic investigations using TCAD simulations reveal the role of fixed charges and interface traps at the HZO-interfacial layer (HZO/IL) interface in modulating the subthreshold characteristics of the devices. A characteristic crossover point observed in the transfer characteristics of n-channel devices is attributed with the temporary switching between ferroelectric-based operation to charge-based operation, caused by the pinning effect due to the presence of different traps. This experimental study helps understand the role of charge trapping effects in switching characteristics of n- and p-channel ferroelectric FETs.

Neuromorphic devices, which can mimic the human body's neural system, are rising as an essential technology for artificial intelligence. Here, two types of organic synaptic transistors (OSTRs), OSTR‐A and OSTR‐B, are fabricated on either glass or polymer film using water‐processable charge‐trapping gate‐insulating layers that are prepared by reacting ethylenediamine (EDA) and poly(2‐acrylamido‐2‐methyl‐1‐propanesulfonic acid) (PAMPSA). OSTR‐A is designed to function as a basic artificial synapse by gate pulse stimulation only, while OSTR‐B has additional near‐infrared (NIR)‐absorbing conjugated polymer layers for further sensing of NIR light upon gate voltage stimulations. The PAMPSA:EDA films are found to contain permanent charge bridges (ion pairs of –SO3− +NH3‐) that play a charge‐trapping role in OSTRs. Both devices with the PAMPSA:EDA layers exhibit clear postsynaptic current (PSC) signals upon gate voltage pulses, leading to long‐term potentiation/depression characteristics. The flexible OSTR‐B devices can sense the NIR light (905 nm) upon gate pulse stimulation and their PSC signals are well maintained even after bending (>5000 times). Artificial neural network simulations disclose that the flexible OSTR‐B devices can stably perform synaptic operations under the NIR light with high accuracy (>90%) even after repeated bending (5000 times), indicative of potential use in artificial neuromorphic skin applications.

Abstract Although 2D material van der Waals heterostructures (vdWHs) exhibit many novel properties and applications, 2D homojunctions have unique advantages in interface lattice matching, band continuity, and charge transfer efficiency. However, the rectification performances of 2D homojunction diodes are severely limited by the small junction barrier, mainly due to inefficient charge doping. In this work, an ultrahigh‐rectification‐ratio WSe2 homojunction diode achieved by the semi‐floating gate doping of graphdiyne oxide (GDYO) is reported. Utilizing the WSe2/GDYO direct charge trapping mode can free the inhibition of charge capturing efficiency by removing conventional insulating barriers and thus improve the rectification ratio. The C─C(sp) and oxygen‐containing functional groups in the GDYO layer can provide outstanding charge‐trapping ability due to their unsaturation. Furthermore, the oxygen plasma treatment used for oxidizing graphdiyne (GDY) into GDYO can make GDYO a flatter surface, thus creating strong‐coupling WSe2/GDYO interfaces to improve the charge transfer efficiency and enhance the electrostatic doping effect. Besides, the WSe2/GDYO interfaces are confirmed to possess a higher junction barrier than that of the WSe2/GDY interfaces. This research proposes a brand‐new approach to building p–n junctions via charge trapping and the homojunction diode with a record‐highest rectification ratio of up to 106 is obtained.

The majority of voltage-gated ion channels contain a defined voltage-sensing domain and a pore domain composed of highly conserved amino acid residues that confer electrical excitability via electromechanical coupling. In this sense, the voltage-gated proton channel (Hv1) is a unique protein in that voltage-sensing, proton permeation and pH-dependent modulation involve the same structural region. In fact, these processes synergistically work in concert, and it is difficult to separate them. To investigate the process of Hv1 voltage sensor trapping, we follow voltage-sensor movements directly by leveraging mutations that enable the measurement of Hv1 channel gating currents. We uncover that the process of voltage sensor displacement is due to two driving forces. The first reveals that mutations in the selectivity filter (D160) located in the S1 transmembrane interact with the voltage sensor. More hydrophobic amino acids increase the energy barrier for voltage sensor activation. On the other hand, the effect of positive charges near position 264 promotes the formation of salt bridges between the arginines of the voltage sensor domain, achieving a stable conformation over time. Our results suggest that the activation of the Hv1 voltage sensor is governed by electrostatic–hydrophobic interactions, and S4 arginines, N264 and selectivity filter (D160) are essential in the Ciona-Hv1 to understand the trapping of the voltage sensor. [ABSTRACT FROM AUTHOR]

This study focuses on InGaZnO-based synaptic devices fabricated using reactive radiofrequency sputtering deposition with highly uniform and reliable multilevel memory states. Electron trapping and trap generation behaviors were examined based on current compliance adjustments and constant voltage stressing on the ITO/InGaZnO/ITO memristor. Using O2 + N2 plasma treatment resulted in stable and consistent cycle-to-cycle memory switching with an average memory window of ~95.3. Multilevel resistance states ranging from 0.68 to 140.7 kΩ were achieved by controlling the VRESET within the range of −1.4 to −1.8 V. The modulation of synaptic weight for short-term plasticity was simulated by applying voltage pulses with increasing amplitudes after the formation of a weak conductive filament. To emulate several synaptic behaviors in InGaZnO-based memristors, variations in the pulse interval were used for paired-pulse facilitation and pulse frequency-dependent spike rate-dependent plasticity. Long-term potentiation and depression are also observed after strong conductive filaments form at higher current compliance in the switching layer. Hence, the ITO/InGaZnO/ITO memristor holds promise for high-performance synaptic device applications. [ABSTRACT FROM AUTHOR]

Two-dimensional rhenium disulfide (ReS2), a member of the transition-metal dichalcogenide family, has received significant attention due to its potential applications in field-effect transistors (FETs), photodetectors, and memories. In this work, we investigate the suppression of the subthreshold current during the forward voltage gate sweep, leading to an inversion of the hysteresis in the transfer characteristics of ReS2 nanosheet-based FETs from clockwise to anticlockwise. We explore the impact of temperature, sweeping gate voltage, and pressure on this behavior. Notably, the suppression in current within the subthreshold region coincides with a peak in gate current, which increases beyond a specific temperature but remains unaffected by pressure. We attribute both the suppression in drain current and the presence of peak in gate current to the charge/discharge process of gate oxide traps by thermal-assisted tunnelling. The suppression of the subthreshold current at high temperatures not only reduces power consumption but also extends the operational temperature range of ReS2 nanosheet-based FETs. [ABSTRACT FROM AUTHOR]

This study investigates the electrical characteristics observed in n-channel and p-channel ferroelectric field effect transistor (FeFET) devices fabricated through a similar process flow with 10 nm of ferroelectric hafnium zirconium oxide (HZO) as the gate dielectric. The n-FeFETs demonstrate a faster complete polarization switching compared to the p-channel counterparts. Detailed and systematic investigations using TCAD simulations reveal the role of fixed charges and interface traps at the HZO-interfacial layer (HZO/IL) interface in modulating the subthreshold characteristics of the devices. A characteristic crossover point observed in the transfer characteristics of n-channel devices is attributed with the temporary switching between ferroelectric-based operation to charge-based operation, caused by the pinning effect due to the presence of different traps. This experimental study helps understand the role of charge trapping effects in switching characteristics of n- and p-channel ferroelectric FETs. [ABSTRACT FROM AUTHOR]

Pseudo-ferroelectric transistors have attracted particular interest owing to their applications in the non-volatile memories and neuromorphic circuits; however, it remains to be explored in the limit of few-layer devices. Here we reveal a pseudo-ferroelectric phenomenon in the ultrathin graphene/black phosphorene (G/BP) heterostructure by first-principles calculations. Putting forward an excitation-assisted mechanism, the ferroelectric-like hysteresis loop can be explained by a combined effect of the external electric fields dependent bipolarity and anisotropy in the G/BP heterostructure. Considering the build-in electric field, the bipolar behavior results in the multistate effect of the G/BP heterostructure when modulating the applied electric field. The anisotropic hybridization caused by the susceptible Dirac electrons in graphene and the large in-plane anisotropy in BP provides the interfacial states, which trap excitations and stabilize the multistate. The pseudo-ferroelectric behavior should be useful for interpreting transport experiments in gated G/BP devices and exploring its applications in memories or synaptic devices. [ABSTRACT FROM AUTHOR]

Artificial synapses are key elements in building bioinspired, neuromorphic computing systems. Ferroelectric field‐effect transistors (FeFETs) with excellent controllability and complementary metal oxide semiconductor (CMOS) compatibility are favorable to achieving synaptic functions with low power consumption and high scalability. However, because of the only nonvolatile ferroelectric (Fe) characteristics in the FeFET, it is difficult to develop bioplausible short‐term synaptic elements for spatiotemporal information processing. By judiciously combining defects (DE) and Fe domains in gate stacks, a compact artificial synapse featuring spatiotemporal information processing on a single Fe–DE fin FET (FinFET) is proposed. The devices are designed to work in a separate DE mode to induce short‐term plasticity by spontaneous charge detrapping, and a hybrid Fe–DE mode to trigger long‐term plasticity through the coupling of defects and Fe domains. The capability of the compact synapse is demonstrated by differentiating 16 temporal inputs. Moreover, the highly controllable static electricity of advanced FinFETs leads to an ultralow power of 2 fJ spike−1. An all Fe–DE FinFET reservoir computing (RC) system is then constructed that achieves a recognition accuracy of 97.53% in digit classification. This work enables constructing RC systems with fully advanced CMOS‐compatible devices featuring highly energy‐efficient and low‐hardware systems. [ABSTRACT FROM AUTHOR]

Understanding electronic dynamics in multiexcitonic quantum dots (QDs) is important for designing efficient systems useful in high power scenarios, such as solar concentrators and multielectron charge transfer. The multiple charge carriers within a QD can undergo undesired Auger recombination events, which rapidly annihilate carriers on picosecond time scales and generate heat from absorbed photons instead of useful work. Compared to the transfer of multiple electrons, the transfer of multiple holes has proven to be more difficult due to slower hole transfer rates. To probe the competition between Auger recombination and hole transfer in CdSe, CdS, and CdSe/CdS QDs of varying sizes, we synthesized a phenothiazine derivative with optimized functionalities for binding to QDs as a hole accepting ligand and for spectroscopic observation of hole transfer. Transient absorption spectroscopy was used to monitor the photoinduced absorption features from both trapped holes and oxidized ligands under excitation fluences where the averaged initial number of excitons in a QD ranged from ∼1 to 19. We observed fluence-dependent hole transfer kinetics that last around 100 ps longer than the predicted Auger recombination lifetimes, and the transfer of up to 3 holes per QD. Theoretical modeling of the kinetics suggests that binding of hole acceptors introduces trapping states significantly different from those in native QDs passivated with oleate ligands. Holes in these modified trap states have prolonged lifetimes, which promotes the hole transfer efficiency. These results highlight the beneficial role of hole-trapping states in devising hole transfer pathways in QD-based systems under multiexcitonic conditions.

For operation as power amplifiers in RF applications, high electron mobility transistor (HEMT) structures are subjected to a range of bias conditions, applied at both the gate and drain terminals, as the device is biased from the OFF- to ON-state conditions. The stability of the device threshold voltage (Vt) condition is imperative from a circuit-design perspective and is the focus of this study, where stresses in both the ON and OFF states are explored. We see rapid positive threshold voltage increases under negative bias stress and subsequent recovery (i.e., Vt reduces), whereas conversely, we see a negative Vt shift under positive stress and Vt increase during the subsequent relaxation phase. These effects are correlated with the thickness of the GaN layer and ultimately result from the deep carbon-acceptor levels in the C-GaN back barrier incorporated to screen the buffer between the silicon substrate and the epitaxially grown GaN layer. Methods to mitigate this effect are explored, and the consequences are discussed.

Crystalline calcium fluoride (CaF2) is drawing significant attention due to its great potential of being the gate dielectric of two-dimensional (2D) material MOSFETs. It is deemed to be superior to boron nitride and traditional silicon dioxide (SiO2) because of its larger dielectric constant, wider band gap, and lower defect density. Nevertheless, the CaF2-based MOSFETs fabricated in the experiment still present notable reliability issues, and the underlying reason remains unclear. Here, we studied the various intrinsic defects and adsorbates in CaF2/molybdenum disulfide (MoS2) and CaF2/molybdenum disilicon tetranitride (MoSi2N4) interface systems to reveal the most active charge-trapping centers in CaF2-based 2D material MOSFETs. An elaborate Table comparing the importance of different defects in both n-type and p-type devices is provided. Most impressively, the oxygen molecules (O2) adsorbed at the interface or surface, which are inevitable in experiments, are as active as the intrinsic defects in channel materials, and they can even change the MoSi2N4 to p-type spontaneously. These results mean that it is necessary to develop a high-vacuum packaging process, as well as prepare high-quality 2D materials for better device performance.

Artificial synapses are key elements in building bioinspired, neuromorphic computing systems. Ferroelectric field‐effect transistors (FeFETs) with excellent controllability and complementary metal oxide semiconductor (CMOS) compatibility are favorable to achieving synaptic functions with low power consumption and high scalability. However, because of the only nonvolatile ferroelectric (Fe) characteristics in the FeFET, it is difficult to develop bioplausible short‐term synaptic elements for spatiotemporal information processing. By judiciously combining defects (DE) and Fe domains in gate stacks, a compact artificial synapse featuring spatiotemporal information processing on a single Fe–DE fin FET (FinFET) is proposed. The devices are designed to work in a separate DE mode to induce short‐term plasticity by spontaneous charge detrapping, and a hybrid Fe–DE mode to trigger long‐term plasticity through the coupling of defects and Fe domains. The capability of the compact synapse is demonstrated by differentiating 16 temporal inputs. Moreover, the highly controllable static electricity of advanced FinFETs leads to an ultralow power of 2 fJ spike−1. An all Fe–DE FinFET reservoir computing (RC) system is then constructed that achieves a recognition accuracy of 97.53% in digit classification. This work enables constructing RC systems with fully advanced CMOS‐compatible devices featuring highly energy‐efficient and low‐hardware systems.

To further improve the output performance of triboelectric devices, reducing charge attenuation and loss has become a hot research topic. Particularly, textiles have emerged as one of the promising research directions for triboelectric devices owing to their special internal structure and large specific surface area. In the present work, polyacrylonitrile fibers are fabricated with two distinct structures to provide a higher dielectric constant due to the strong polar properties brought about by higher dipole moment of the CN group. In addition, the complex and closely connected structure of the textile increases specific internal surface area. As a friction layer, the output voltage is shown to increase to 625% of the initial value (from 8 to 60 V) after the application of friction for a short time due to accumulation property. When acting as a trapping layer, the charge loss after injection is effectively prevented due to excellent charge trapping effect. After 24 h, the triboelectric output performance remains at ≈70% of the initial value (decreasing from 320 to 220 V), which is more than 20 times that of the polytetrafluoroethylene film, which decreases from 125 to 19 V. The device is realized for the advanced application of multi‐modal sensors. [ABSTRACT FROM AUTHOR]

The ever increasing field of application of nanodielectrics in electrical insulations calls for description of the mechanisms underlying the performance of these systems and for identification of the signs exposing their aging under high electric fields. Such approach is of particular interest to electrically insulating polymers because their chemical defects are of deleterious nature for their electrical properties and can largely degrade their performance at high electric fields. Although these defects usually leave spectroscopic signatures in terms of characteristic luminescence peaks, it is nontrivial to assign, in an unambiguous way, the identified peaks to specific chemical groups or defects because of the low intensity of the signal with the main reason being that the insulating polymers are weakly emitting materials under electric field. In this work, we go beyond the conventional electroluminescence technique to record spectroscopic features of insulating polymers. By introducing a single plane of silver nanoparticles (AgNPs) at the near-surface of thin polypropylene films, the electroluminescent signal is strongly enhanced by surface plasmons processes. The presence of AgNPs leads not only to a much higher electroluminescence intensity but also to a strong decrease of the electric field threshold for detection of light emission and to a phase-stabilization of the recorded spectra, thus improving the assignment of the characteristic luminescence peaks. Besides, the performed analyses bring evidence on the capability of AgNPs to trap and eject charges, and on the possibility to adjust the energetics of charge carriers in electrically insulating polymers at the electrode/dielectric contact via AgNPs.

Sufficient energy consumption for conventional information processing makes it necessary to look for new computational methods. One of the possible solutions to this problem is neuromorphic computations using memristive devices. Memristors based on molybdenum disulfide (MoS2$\left(\text{MoS}\right)_{2}$) are a promising way to provide a sizeable amount of hysteresis at low energy costs. Herein, different configurations of MoS2$\left(\text{MoS}\right)_{2}$ memristors as well as the mechanisms involved in hysteresis formation are shown. Bottom gated configuration is beneficial in terms of hysteresis area and energy efficiency. The impact of device channel dimensions on the hysteresis area and energy consumption is discussed. Different operation conditions with triangular, rectangular, sinusoidal, and sawtooth drain‐to‐source pulses are simulated, and rectangular pulses demonstrate the highest energy efficiency. The study shows the potential to realize low‐power neuromorphic systems using MoS2$\left(\text{MoS}\right)_{2}$ memristive devices. [ABSTRACT FROM AUTHOR]

To avoid the complexity of the circuit for in‐memory computing, simultaneous execution of multiple logic gates (OR, AND, NOR, and NAND) and memory behavior are demonstrated in a single device of oxygen plasma‐treated gallium selenide (GaSe) memtransistor. Resistive switching behavior with RON/ROFF ratio in the range of 104 to 106 is obtained depending on the channel length (150 to 1600 nm). Oxygen plasma treatment on GaSe film created shallow and deep‐level defect states, which exhibit carriers trapping/de‐trapping, that lead to negative and positive photoconductance at positive and negative gate voltages, respectively. This distinguishing feature of gate‐dependent transition of negative to positive photoconductance encourages the execution of four logic gates in the single memory device, which is elusive in conventional memtransistor. Additionally, it is feasible to reversibly switch between two logic gates by just adjusting the gate voltages, e.g., NAND/NOR and AND/NAND. All logic gates presented high stability. Additionally, memtransistor array (1×8) is fabricated and programmed into binary bits representing ASCII (American Standard Code for Information Interchange) code for the uppercase letter "N". This facile device configuration can provide the functionality of both logic and memory devices for emerging neuromorphic computing. [ABSTRACT FROM AUTHOR]

Amorphous InGaZnO (a-IGZO) thin-film transistors (TFTs) have attracted much attention owing to their promising applications, such as display devices and dynamic random access memory (DRAM) devices. This study reports a comprehensive study on the bias temperature instability of a-IGZO TFTs. We analyzed the behavior of transfer characteristics, under repeated bias stress and recovery at different temperatures, to unveil the degradation mechanism of bias and thermal stress. Based on threshold voltage, subthreshold swing, and field-effect mobility, the correlation between transfer characteristics and stress time was found to depend on temperature, revealing the opposite trends. The trends are interpreted using two mechanisms: trapped electron and oxygen vacancy. The consequential behavior of transfer characteristics under repeated stress and recovery depended on the competition between the two mechanisms, and the result of the competition depended on the temperature. The predominant mechanism was determined based on the temperature, and a high temperature enhanced the generation of oxygen vacancies, resulting in a negative shift at high temperatures. Repeated stress revealed that the predominant mechanisms were maintained with constant VT shifts over cycles, and repeated recovery confirmed the difference in recovery mechanisms with increasing VT shifts over cycles. Understanding the competition between the two main mechanisms aids in explaining the bias temperature instability of a-IGZO TFTs. [ABSTRACT FROM AUTHOR]

Abstract To avoid the complexity of the circuit for in‐memory computing, simultaneous execution of multiple logic gates (OR, AND, NOR, and NAND) and memory behavior are demonstrated in a single device of oxygen plasma‐treated gallium selenide (GaSe) memtransistor. Resistive switching behavior with RON/ROFF ratio in the range of 104 to 106 is obtained depending on the channel length (150 to 1600 nm). Oxygen plasma treatment on GaSe film created shallow and deep‐level defect states, which exhibit carriers trapping/de‐trapping, that lead to negative and positive photoconductance at positive and negative gate voltages, respectively. This distinguishing feature of gate‐dependent transition of negative to positive photoconductance encourages the execution of four logic gates in the single memory device, which is elusive in conventional memtransistor. Additionally, it is feasible to reversibly switch between two logic gates by just adjusting the gate voltages, e.g., NAND/NOR and AND/NAND. All logic gates presented high stability. Additionally, memtransistor array (1×8) is fabricated and programmed into binary bits representing ASCII (American Standard Code for Information Interchange) code for the uppercase letter “N”. This facile device configuration can provide the functionality of both logic and memory devices for emerging neuromorphic computing.

Rather than generating a photocurrent through photo-excited carriers by the photoelectric effect, the photogating effect enables us to detect sub-bandgap rays. The photogating effect is caused by trapped photo-induced charges that modulate the potential energy of the semiconductor/dielectric interface, where these trapped charges contribute an additional electrical gating-field, resulting in a shift in the threshold voltage. This approach clearly separates the drain current in dark versus bright exposures. In this review, we discuss the photogating effect-driven photodetectors with respect to emerging optoelectrical materials, device structures, and mechanisms. Representative examples that reported the photogating effect-based sub-bandgap photodetection are revisited. Furthermore, emerging applications using these photogating effects are highlighted. The potential and challenging aspects of next-generation photodetector devices are presented with an emphasis on the photogating effect. [ABSTRACT FROM AUTHOR]

Gray scale consistency in pixels was extremely important for electrowetting displays (EWDs). However, traditional electrowetting display driving waveforms could not obtain a pixel aperture ratio consistency, which led to the occurrence of gray inconsistency even if it was the same driving waveform. In addition, the oil backflow caused by charge trapping could not be sustained. Therefore, a multi-direct current (DC) overdriving waveform for gray scale consistency was proposed in this paper, which could effectively improve the performance of EWDs. The driving waveform was divided into a start-up driving phase and a stable driving phase. The stable driving phase was composed of a square wave with a duty cycle of 79% and a frequency of 43 Hz. Subsequently, an overdriving pulse was also introduced in the stable driving phase. The multi-DC driving waveform for gray scale consistency was applied to a thin film transistor-electrowetting display (TFT-EWD). The average difference between increasing driving voltage and decreasing driving voltage was only 2.79%. The proposed driving waveform has an aperture ratio of 3.7 times at low voltages compared to DC driving. [ABSTRACT FROM AUTHOR]