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The factors limiting channel mobility in AlSiO/p‐type GaN metal–oxide–semiconductor (MOS) field‐effect transistors are examined by performing Hall‐effect measurements in conjunction with a gate bias, with and without a thin AlN interlayer. In the absence of this interlayer, the free carrier concentration associated with the Hall effect is significantly reduced compared with the net gate charge density estimated from capacitance–voltage data, indicating that electrons are trapped to a significant extent at the MOS interface. These interface traps are found to have an energy ≈20 meV above the Fermi level in strong inversion based on temperature‐dependent Hall effect data. The insertion of a 0.8 nm‐thick AlN interlayer eliminates charge trapping such that almost all gate charges are mobile. The mobility components could be divided into types based on their effect on the effective electric field perpendicular to the channel. Coulomb scattering centers resulting from interface states are evidently reduced by inserting the AlN interlayer, which also enhances the channel mobility to over 150 cm2 V−1s−1. [ABSTRACT FROM AUTHOR]

We have carried out a detailed study of the impact of oxygen vacancies (O $_{\mathrm {V}}$ ), on the performance and the lattice temperature variation in a stacked silicon nanosheet field effect transistor (Si NSFET) through combined first-principles simulations, based on the density functional theory (DFT) and well-calibrated TCAD models. Due to their presence at the interface and in the oxide, OV are the source of reliability concern in the nanoscale devices because of the strong influence on the effective work function (EWF) in the high- $\kappa $ /metal gate stack (HKMG). Employing the DFT simulations, we discuss the variabilities in the EWF and the reliability issues due to OV in the HKMG stack. Further, our TCAD study reveals that due to the inclusion of OV in the gate stack regions, the threshold voltage (V $_{\mathrm {T}}$ ), ON current (I $_{\mathrm {ON}}$ ), and OFF current (I $_{\mathrm {OFF}}$ ) of the Si NSFET are negatively impacted. In addition, due to the poor thermal coupling between the source/channel/drain interfaces and the substrate (heat sink), the ION degrades by nearly 24%. The lattice temperature increases by more than 45 K, when OV are present at Si/SiO2, SiO2/HfO2, and HfO2/TiN interfaces. The statistical variance in VT and ION in the presence of OV is calculated as 0.27 V and $152.23~\mu $ A respectively. Furthermore, the peak electron mobility in the conduction region reduces to 433 cm2V−1s−1 in the presence of OV as compared to 459 cm2V−1s−1 without OV in the gate stack. We believe that our results are essential steps in the quantification and characterization of the reliability of the sub-5 nm transistor technologies.

In this research, the electron mobility in GaAs quasi-one-dimensional wires with the presence of ionized impurity at zero temperatures was investigated and the results were compared with the mobility of a two-dimensional electron gas system. GaAs is a non-magnetic semiconductor with a direct band gap. Here for the calculations, the Boltzmann transport equation is used in the relaxation time approximation, taking into account the ionized impurity potential. Focusing on ionized Coulomb scattering and the short-range disorder is our goal. Electron mobility was investigated based on related parameters (Fermi energy and width of nanowires), and its diagram was drawn. In the end, the results of this research were compared with electron mobility in completely two-dimensional electronic systems. As expected, the numerical results showed that the electron mobility in extensive wires converges to the electron gas mobility of a fully two-dimensional plane. [ABSTRACT FROM AUTHOR]

In this work, low frequency noise (LFN) in Schottky junction trigate silicon nanowire (SiNW) field-effect transistors (FETs) (SJGFETs) fabricated on bonded silicon on insulator (SOI) substrate is systematically analyzed. The LFN exhibited a typical 1/ ${f}$ spectrum and can be well described by the carrier number fluctuation (CNF) with correlated mobility fluctuation (CMF) model. It was found that CNF is the dominant component of the LFN, while CMF associated with the Coulomb scattering near the buried oxide (BOX)/SiNW channel interface plays an insignificant role. Applying a substrate bias can further modulate the LFN of the SJGFETs, and the effect is ascribed to the nonuniform energy distribution of the BOX/SiNW channel interface traps. Confining current path in the channel bulk away from the interface brought limited gain in terms of LFN performance. Finally, our experimental results suggested a possible transition of CMF mechanism from Coulomb scattering to surface roughness scattering when the current path is pushed away from the BOX/SiNW channel interface to the channel bulk. [ABSTRACT FROM AUTHOR]

Interrelations between the problems of electrical conductivity of a completely ionized plasma and the ion drag force in a dusty plasma are discussed. It is shown that a physically motivated modification of the Coulomb logarithm proposed in the context of ion-particle scattering in dusty plasma allows us to improve the theoretical description of the conductivity in the moderately non-ideal regime. A simple theoretical expression obtained is in reasonable agreement with available results from experiments and numerical simulations.

This article presents a comparative low-frequency noise (LFN) characterization of gate-all-around nanosheet n-channel Si metal–oxide–semiconductor field effect transistors, processed with three different metal gates (MGs): an aluminum-based reference process and two alternative effective work function (EWF) stacks. In all cases, the gate dielectric is composed of HfO2 over an SiO2 interfacial layer. The LFN figures of merit are extracted, such as the oxide trap density and Coulomb scattering coefficient, and the correlations with the threshold voltage and the electron mobility are investigated. Carrier number fluctuations are confirmed as the dominant mechanism of the 1/ƒ noise for all evaluated devices. Additionally, it is shown that the specific MG can contribute to the carrier scattering, degrading the electron mobility. The most promising results are obtained for one of the alternative MGs, exhibiting a low oxide trap density level, a low threshold voltage and insignificant mobility degradation. [ABSTRACT FROM AUTHOR]

We consider a double-layer system made of two parallel bilayer graphene sheets separated by a dielectric medium. We calculate the finite-temperature electrical conductivity of the first layer due to charged impurities located in two layers. We study the effects of temperature, interlayer distance, dielectric constants and impurity concentration, carrier concentration on the electrical conductivity. We show the importance of charged impurities located in layer II in determining electrical conductivity of the first layer for small interlayer distance. The results in this paper give us more understanding about the long-range charged impurity scattering in bilayer graphene under the effect of the second one. [ABSTRACT FROM AUTHOR]

Abstract The GAMMA-400 currently developing space-based gamma-ray telescope is designed to measure the gamma-ray fluxes in the energy range from ∼20 MeV to several TeV in the highly elliptic orbit (without shadowing the telescope by the Earth) continuously for a long time. The physical characteristics of the GAMMA-400 gamma-ray telescope, especially the angular and energy resolutions (at 100-GeV gamma rays they are ∼0.01° and ∼1%, respectively), allow us to consider this space-based experiment as the next step in the development of extraterrestrial high-energy gamma-ray astronomy. In this paper, a method to improve the reconstruction accuracy of incident angle for low-energy gamma rays in the GAMMA-400 space-based gamma-ray telescope is presented. The special analysis of topology of pair-conversion events in thin layers of converter was performed. Applying the energy dependence of multiple Coulomb scattering for pair components, it is possible to estimate the energies for each particle, and to use these energies as weight in the angle reconstruction procedure. To identify the unique track in each projection the imaginary curvature method is applied. It allows us to obtain significantly better angular resolution in comparison with other methods applied in current space-based experiments. When using this method for 50-MeV gamma rays the GAMMA-400 gamma-ray telescope angular resolution is about 4°. [ABSTRACT FROM AUTHOR]

The electron effective mobility analytical model without empirical parameters is investigated for uniaxial strained Si inversion layer, which can be conveniently applied by device and circuit designers. By one‐dimensional inverse transform for the three‐dimensional (3D) scattering matrix element along the vertical channel direction, three scattering (coulomb scattering, acoustic phonon scattering and intervalley scattering) rate models are researched. Then, the surface roughness scattering rate is taken into account to calculate the 2D inversion layer electron mobility. Based on the models, the simulations have been carried out by Matlab. The simulation results are in accord with the reference data, and the saturation phenomenon is brought to light. [ABSTRACT FROM AUTHOR]

The correlation of electron counts from two detectors illuminated by a coherent electron beam is analyzed by associating the path of the electron beam through the lenses with the direct Coulomb interaction between two individual electrons. This is shown to lead to a full statistical description of the electron counts. The dominant contribution to the correlation is found to be due to the trajectory displacement caused by the repulsive Coulomb interaction between the first anode and the cathode tip, and the correlation of electron counts is found to depend on the amount of defocusing on the shift of the virtual source for two electrons within the correlation time. The Coulomb scatterings, which altered the direction of two neighbor electrons, occur during the acceleration, leading to a significant decrease in the electron density. The Coulomb potential with no screening will then cause large-angle scattering of nearest-neighbor electrons within the correlation time. These results are consistent with those obtained by a previous experiment. [ABSTRACT FROM AUTHOR]

Highlights • Measurements of parasitic capacitance for several front and back biases is possible. • New model of the inversion charge density for several back bias is validated. • Mobility of UTBB‐FDSOI device with short length is assessed for several back biases. • Short FDSOI device mobility depends on the channel edges scattering mechanism. • Mobility reduction suggests edge‐defects from top to bottom of the Si‐Substrate. Abstract In this work we measure the inversion charge density for short UTBB-FDSOI MOSFETs (down to 45 nm) using an accurate method for the extraction of the parasitic components which take into account the effect of the back bias. Based on these results, we propose a modification of the inversion charge density model that uses the simplified Lambert function in order to include the back bias effect. This model is then validated with the experimental data for different gate lengths (from 185 nm to 45 nm). It is shown that this inversion charge model is valid for the mobility extraction and gives very good assessment of the mobility if we know only the IV-characteristic, the threshold voltage (under back bias effect) and the inversion charge capacitance. Finally, this method is used to extract the mobility for short channel devices (down to 40 nm) and it is found that the short channel mobility suffers from degradation even for large back biases. For the shortest device, it is demonstrated that the main source of mobility degradation is caused by oxide charges and interface states located near the S/D extensions and then it is deduced that the mobility reduction for large back biases is related to neutral defects from Si-crystal close to the channel edge. [ABSTRACT FROM AUTHOR]

Dual-channel thin-film transistors (TFTs) show excellent effective mobility (μeff) and reliability, including negative-bias-illumination stability. To enhance the performance of these devices, post-thermal annealing in air is performed for 2 h at the low temperature of 250°C. To investigate the effects of low-temperature thermal annealing, indium–zinc-oxide/gallium–indium–zinc-oxide (IZO/IGZO) dual-channel TFTs with various IZO thicknesses are fabricated and examined. The observed parameters are μeff, saturation mobility (μsat), subthreshold slope (SS), and threshold voltage (VTH). The interface quality may be improved by low-temperature thermal annealing, which was confirmed by the improvement in μeff and SS. However, these performance enhancements are intensively observed only in the channels with an IZO thickness below 10 nm. When the IZO thickness becomes 10 nm or more, the improvement in μeff due to low-temperature thermal annealing hardly occurs. This is because μeff is greatly influenced by the interface quality due to Coulomb scattering when the IZO thickness is <10 nm. However, for an IZO thickness above 10 nm, as phonon scattering also has a significant effect on μeff, the improvement in interface quality by thermal annealing is small. This is also supported by low-frequency noise measurements, which are sensitive to interface quality. [ABSTRACT FROM AUTHOR]