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The deviations of cryogenic collector current–voltage characteristics of SiGe heterojunction bipolar transistors (HBTs) from ideal drift-diffusion theory have been a topic of investigation for many years. Recent work indicates that direct tunneling across the base contributes to the non-ideal current in highly scaled devices. However, cryogenic discrepancies have been observed even in older-generation devices for which direct tunneling is negligible, suggesting that another mechanism may also contribute. Although similar non-ideal current–voltage characteristics have been observed in Schottky junctions and were attributed to a spatially inhomogeneous junction potential, this explanation has not been considered for SiGe HBTs. Here, we experimentally investigate this hypothesis by characterizing the collector current ideality factor and built-in potential of a SiGe HBT vs temperature using a cryogenic probe station. The temperature dependence of the ideality factor and the relation between the built-in potential as measured by capacitance–voltage and current–voltage characteristics are in good qualitative agreement with the predictions of a theory of electrical transport across a spatially inhomogeneous junction. These observations suggest that inhomogeneities in the base–emitter junction potential may contribute to the cryogenic non-idealities. This work helps to identify the physical mechanisms limiting the cryogenic microwave noise performance of SiGe HBTs. [ABSTRACT FROM AUTHOR]

We have systematically investigated effects of metal–semiconductor or insulator–semiconductor interfacial layers (ILs) in AlGaN/GaN devices, where AlO x , TiO x , or NiO x is employed as an IL. From capacitance–voltage characteristics of metal/IL/AlGaN/GaN devices with a metal–semiconductor IL between the gate metal and AlGaN, it is shown that the IL modulates the threshold voltage V th , attributed to the vacuum level step induced by the dipole of the IL. We find negative vacuum level steps for AlO x and TiO x ILs, and positive for NiO x , from which the IL dipole density is estimated for each IL material. The two-dimensional electron gas carrier concentration in the metal/IL/AlGaN/GaN devices is also modulated by the vacuum level step. On the other hand, from capacitance–voltage characteristics of metal/ Al 2 O 3 /IL/AlGaN/GaN devices with an insulator–semiconductor IL between Al 2 O 3 and AlGaN, the fixed charge density of the Al 2 O 3 /IL/AlGaN interface is evaluated by the Al 2 O 3 thickness dependence of V th . For AlO x and TiO x ILs, the fixed charge density is higher than that of the Al 2 O 3 /AlGaN interface with no IL, while lower for NiO x. The fixed charge density for an IL shows a positive correlation with the IL dipole density, suggesting that the fixed charge is related to the unbalanced IL dipole. Furthermore, using the conductance method, we find a low trap density of the Al 2 O 3 /IL/AlGaN interface for AlO x and NiO x ILs, in comparison with that of the Al 2 O 3 /AlGaN interface with no IL. [ABSTRACT FROM AUTHOR]

The field-effect transistors (FETs) based on reduced graphene oxide (rGO) with SiO2, porous silicon (PS), and oxidized porous silicon (PSox) supporting layers were obtained. The influence of charged impurities in the silicon substrate and electrically active defects in the support layers on the electrical properties of the FETs was studied based on the capacitance-voltage characteristic analysis. Localized electron states in the SiO2, PS, and PSox supporting layers that affect the charge transfer in the rGO-based FETs were determined using thermally stimulated depolarization spectroscopy. The influence mechanisms of various supporting layers on the electrical characteristics of the obtained FETs are discussed. [ABSTRACT FROM AUTHOR]

We fabricated p-Si/n-Ga2O3 and p+-Si/n-Ga2O3 heterostructures by surface-activated bonding (SAB) and investigated their electrical properties. Current density–voltage measurement was performed before and after thermal annealing at 450 °C. The current density substantially increased after annealing, which was attributed to thinning of an intermediate layer formed by the bonding process. Distinctive two-stage capacitance–voltage characteristics were observed for p-Si/n-Ga2O3 heterostructures, which were well reproduced by numerical calculation considering the effect of two-dimensional electron gas formed at the heterointerface. These results indicate that Ga2O3-based p–n heterostructures with good interface properties and large-area uniformity can be fabricated using SAB. [ABSTRACT FROM AUTHOR]

Diamond electronic devices have attracted significant interest owing to their excellent semiconducting properties. We recently demonstrated that eliminating surface-transfer doping enhances carrier mobility and achieves normally off behavior in diamond field-effect transistors (FETs) with a hexagonal boron nitride (h-BN) gate insulator. In our previous study, the gate electrode was overlapped onto the source/drain electrodes to prevent the increase in access resistance caused by excluding surface-transfer doping. However, it is known that gate overlap increases parasitic capacitance and gate leakage current. In this study, we developed a technique for self-aligning the gate electrode with the edge of h-BN using oblique-angle deposition. The diamond FET with a self-aligned gate electrode exhibits optimal FET characteristics, including high mobility of ≈ 400 cm2V−1s−1, low sheet resistance of 2.4 k Ω , and output characteristics demonstrating pinch-off behavior. Furthermore, the capacitance-voltage characteristics clearly indicate distinct ON and OFF states, validating the efficacy of this technique. This method enables the fabrication of diamond/h-BN FETs with no gate overlap and without increasing access resistance, making it a promising approach for developing high-speed, low-loss diamond FETs with a wide range of applications. [ABSTRACT FROM AUTHOR]

Annotation. In today's century, the development of information technology has given impetus to the development of the economy. Impact of the development of semiconductor materials and nanoelectronics technologies on innovative processes in the electronic economy. This research examines the concentration and energy levels of charge carriers in modern conditions for the study of electrophysical tools of semiconductor materials and the application of new diagnostic methods. Semiconductor technologies form the basis of modern electronics and information technologies. These technologies are especially important in creating high-speed telecommunication systems. Semiconductor electronic devices are basically the elementary base of micro- and nanoelectronics. Therefore, research and synthesis of new materials, study of their electrophysical properties, production technology were developed in this field. [ABSTRACT FROM AUTHOR]

Van der Waals ferroelectric semiconductors, which encompass both ferroelectricity and semiconductivity, have garnered intensive research interests for developing novel non‐volatile functional devices. Previous studies focus on ferroelectricity characterization and device demonstration, with little attention paid to the fundamental electronic properties of these materials and their functional structures, which are essential for both device design and optimization. In this study, scanning microwave impedance microscopy (sMIM) is utilized to investigate the ferroelectric semiconductor of α‐phase indium selenide (α‐In2Se3) and its synaptic field effect transistors. α‐In2Se3 nanoflakes of varying thicknesses are visualized through capacitive signal detection, whose responses are consistent with finite element simulations manifesting dependence on both flake thickness and its semiconductor property. sMIM spectroscopy performed on α‐In2Se3‐based metal‐oxide‐semiconductor (MOS) structures reveals typical MOS capacitance‐voltage characteristics, with additional hysteresis arising from the ferroelectric switching of α‐In2Se3. The local conductance state changes of synaptic α‐In2Se3 ferroelectric semiconductor transistors (FeSFET) in response to gate voltage stimuli are effectively detected by in situ sMIM, in good agreement with electrical device transport properties. This work deepens the understanding of ferroelectric semiconductor physics toward their practical device application. [ABSTRACT FROM AUTHOR]

The characteristic voltages in the capacitance–voltage (C–V) curve of quantum dot light-emitting diodes (QLEDs) are usually linked to the start of charge injection and recombination in a working device. However, it may lead to a misunderstanding of the carrier process in QLEDs. This is because capacitance change only reflects an electrical response of additional carriers induced by a small signal loaded on an applied DC voltage but does not directly correlate with the total free carrier response governed by the working voltage. In this work, we study the frequency-dependent C–V characteristics of a blue QLED, focusing on the characteristic voltages, characteristic times, and their relationships. First of all, we identify that the charge injection point of QLEDs should be extracted by the current density–voltage–luminance characteristics rather than the C–V curve. As for the characteristic voltages obtained from the C–V curve, they are determined by voltage-dependent characteristic times in different time domains. Furthermore, the C–V characteristic is helpful to evaluate charge accumulation or leakage in blue QLED, serving as an accessible analysis tool in the carrier transport process. Our work provides a definite physical meaning of characteristic voltages in the C–V curve and exhibits the usefulness of C–V characteristics for analyzing the charge dynamics of QLED. [ABSTRACT FROM AUTHOR]

The capacitance–voltage (C – V) and conductance–voltage (G – V) characteristics of GaN metal–insulator–semiconductor (MIS) structures have a frequency dependence due to the capture and emission of electrons by the high density of the interface states. However, the details of how an interface state affects C – V and G – V characteristics is still not well understood. In this paper, we report a numerical modeling method that can simulate the frequency dependent C – V and G – V characteristics of GaN MIS structures. [ABSTRACT FROM AUTHOR]

In this work, a measuring system was developed according to the scheme of an AC bridge, with the help of which a constant voltage was applied to polymer-dispersed liquid-crystal films doped with silicon dioxide nanoparticles. For these cells with different content of silicon dioxide nanoparticles, capacitance-voltage measurements were carried out at different frequencies of the alternating voltage generator. For these cells, a memory effect was found, which manifests itself in the hysteresis behavior of the capacitance of these cells. The largest hysteresis area and the largest shift of the cell capacitance in the absence of an external field are observed at 10 kHz. In the entire region under study, with a minimum at a frequency of 10 kHz, the perpendicular component of the permittivity has a pronounced dispersion. It has been established that the content of silicon dioxide nanoparticles affects the permittivity of a polymer-dispersed liquid-crystal cell. The data obtained can be used in the development of energy-independent nanostructured data storage systems. [ABSTRACT FROM AUTHOR]

The current–voltage and capacitance–voltage characteristics of InGaAs/InP heterostructure p-i-n photodiodes fabricated by mesa technology have been studied. Photodiodes of circular configuration differ in active region diameter from 0.05 to 2.5 mm. All measurements are performed in the dark at room temperature using the probe method on a wafer with ready-made devices. Data are obtained on dark currents (leakage currents), Idark, which are interpreted in terms of the surface and bulk currents in p–i–n photodiodes of various sizes. In the absorbing layer of the InGaAs/InP photodiode heterostructures, the concentration profiles ND(x) are assessed for the first time by the nondestructive CV method and are compared with the electrochemical profiling data. It is shown that for the most part of the heterostructure i-layer the two methods are complementary. [ABSTRACT FROM AUTHOR]

In this work, polycrystalline n-CrSe2 nanosheets with thickness of 100 nm are grown on p-type Si wafers by the thermal deposition technique under vacuum pressure of 10−5 mbar. Structural and optical investigations showed the preferred growth of the trigonal phase of CrSe2 on Si substrates. Direct allowed transitions within an energy band gap of 2.60 eV were found to be dominant in the films. Silver contacts on the layers allowed construction of hybrid optoelectronic device structure formed from Ag/p-Si Schottky arm and p -Si/ n -CrSe2 pn junction. The device runs in such a way that forward biasing of the Schottky arm is accompanied by a reverse biasing of the pn junction. It is observed that the hybrid device structure can perform as a high-frequency capacitor. The capacitance–voltage characteristic curves show that these capacitors can respond to ac signals with frequencies of 100 MHz. They also exhibit bandstop filter characteristics allowing the passing of signals with return loss and voltage standing wave ratios exceeding 10 dB and 1.76, respectively, at 60 MHz. The device under study displayed rectifying and photo-sensing properties with an asymmetry ratio of 60 in the dark and 217 under excitation of visible light. Visible light excitation of these photosensors displayed voltage biasing dependence in their current responsivity, external quantum efficiency and specific detectivity, reaching values of 0.24 A/W, 65.2% and 4.83 × 109 Jones, respectively. The features of the hybrid devices which use CrSe2 nanosheets as active media make them good candidates for use in radio wave and visible light communication technologies. [ABSTRACT FROM AUTHOR]

High-voltage gradual p0–i–n0 junctions of AlxGa1 –xAs1 –ySby with x ~ 0.24 and y ~ 0.05 in the i‑region were studied using capacitance-voltage characteristics method and transient spectroscopy of deep levels. It has been established that the effective recombination trap in them is the DX-center of the Si donor impurity, with a thermal activation energy Et = 414 meV, a capture cross section σn = 1.04 × 10–14 cm2, and a concentration Nd = 2.4 × 1015 cm–3. In the heterostructures studied, there were no deep levels associated with dislocations. [ABSTRACT FROM AUTHOR]

The paper discusses the basic mechanisms of conductivity in silicon nano/micro structures. The object of the study is porous silicon doped with erbium impurity from an aqueous solution of erbium nitrate Er(NO3)3⋅5H2O by temperature annealing in a diffusion furnace at a temperature of 800°C for 1 h. Comparative characteristics of current-voltage and capacitance-voltage correlations describing regular changes in the mechanisms of current flow and charge capture in the studied samples are presented. The results of the work qualitatively and quantitatively describe the temporary change in the electrical characteristics of porous silicon, which can be taken into account by technologists for better understanding the mechanisms of current transfer in luminescent structures of porous silicon with erbium ions, as well as in the study and manufacture of light-emitting diodes based on it. [ABSTRACT FROM AUTHOR]

The development of Organic Light Emitting Diode (OLED) devices has shown numerous advantages to date. To further develop and optimize OLED technology, modeling research has become crucial. However, existing OLED physical models are not conducive to industrial applications, and the accuracy of equivalent circuit models is insufficient. In this paper, a high‐precision segmented OLED device model is introduced, dividing the voltage into four regions for construction. This model can simulate and accurately predict the current‐voltage characteristics and capacitance‐voltage characteristics of OLED devices. Finally, the proposed model is imported into software for fitting, and simulation results show very small overall and partition errors, demonstrating good predictive performance in terms of voltage scalability. [ABSTRACT FROM AUTHOR]

The shape of high-frequency capacitance-voltage characteristics of structures with an insulating layer replacing silicon oxide is considered. It is shown that the buffer layer interaction on the interface with silicon substrates is related to the shielding of external electric fields by charges of the electron traps. It is found that the presence of two plateaus in the high-frequency capacitance-voltage characteristics does not necessarily indicate deep depletion and strong enrichment of a semiconductor. The presence of both capacitive plateaus in the case of strong screening can be explained by the pinning of the Fermi level of Si on electron traps of the buffer layer with a high concentration and a U-shaped spectrum. An algorithm is formulated for calculating the band bending in a semiconductor from the minimal values of the high-frequency capacitance of a sample in the region of depletion effects on the substrate. The theoretical construction was used for determining the characteristics of a structure with an insulating HfO 2 layer and it was shown that in this case the buffer layer almost completely shields external electric fields, which prevents significant band bending in the silicon substrate. [ABSTRACT FROM AUTHOR]

In this study, platinum (Pt) and tungsten (W), two materials with dissimilar coefficients of thermal expansion (CTE) and work functions (WF), are used as the top electrode (TE) and the bottom electrode (BE) in metal/ferroelectric/metal (MFM) structures to explore the ferroelectricity of hafnium zirconium oxide (HZO) with a thickness less than 10 nm. The electrical measurements indicate that a higher CTE mismatch between HZO and TE/BE is beneficial for enhancing the ferroelectric properties of nanoscale HZO thin films. The different WFs of TE and BE generate a built-in electric field in the HZO layer, leading to shifts in the hysteresis loops and the capacitance–voltage characteristics. The structural characterizations reveal that the preferred formation of the orthorhombic phase in HZO is dominated by the W BE. The device in which W is used as the TE and BE (the W/HZO/W MFM structure) presents the optimal ferroelectric performance of a high remanent polarization (2 P r = 55.2 μ C cm−2). The presence of tungsten oxide (WO x ) at the W/HZO interfaces, as revealed by high-resolution transmission microscopy, is also responsible for the enhancement of ferroelectric properties. This study demonstrates the significant effects of different CTEs and WFs of TE and BE on the properties of ferroelectric HZO thin films. [ABSTRACT FROM AUTHOR]

In this paper, we report simulation results for capacitance–voltage characteristics and temperature distribution in the cross‐section of p‐type gate‐all‐around nanosheet channel using an in‐house developed numerical simulator. The effects of material, channel width, and crystallographic orientation on electrical and thermal properties of p‐type nanosheet transistor are comprehensively investigated. The effect of channel engineering is analyzed, by evaluating density‐of‐states, hole density, current densities as well as distributions of temperature in the channel cross‐section. Finally, the thermal reliability of the device is addressed in terms of thermal resistance. The density‐of‐states and the hole density distribution at the oxide/channel interface can well explain the effective intrinsic capacitance obtained from the simulation. The better uniformity of the hole density distribution across the cross‐section of (110)/[001] channel, shows good promise for less performance fluctuation in terms of the thermal reliability issue. [ABSTRACT FROM AUTHOR]

Our study examined how native oxide layers, InN and InSb, affected the current-voltage and capacitance-voltage characteristics of the Au/n-InP Schottky diode at a temperature of 300 K with and without interface states, traps, and tunneling current. The simulation was carried out using the Atlas-Silvaco-Tcad device simulator. From our results, we found that the effective barrier heights were measured to be 0.474 eV, 0.544 eV, and 0.561 eV via I-V measurements and 0.675 eV, 0.817 eV, and 0.80 eV via C-V measurements. Additionally, we utilized the high-low frequency method to calculate the average density of interface state density, which was determined to be approximately 6.03 . 1011 and 3.33 . 1012 сm – 2 . eV – 1. The results indicate that a thin film of InN and InSb can effectively passivate the InP surface, as evidenced by the good performance of the passivized sample. [ABSTRACT FROM AUTHOR]

This paper presents the results of studies of the capacitance-voltage characteristics (CVC) of GaAs/In0.53Ga0.47As HEMT before and after neutron irradiation with a fluence of (6.3 ± 1.3) × 1014 cm–2. Based on the experimentally obtained characteristics, the effective electron distribution profiles of the structure are calculated before and after the radiation impact. The effect of radiation defects on the δ-layers of the structure is analyzed. [ABSTRACT FROM AUTHOR]

Terahertz (THz) emission spectroscopy (TES) was used to evaluate the properties of interfaces between thermally grown oxides and 4H-SiC(0001) substrates. Metal–oxide–semiconductor (MOS) structures with transparent electrodes were irradiated with a femtosecond laser pulse and the emitted THz signal was measured by changing the applied gate voltage. The amplitude of the THz pulse signal is dependent on the electric field, namely, band bending near the SiO2/SiC interfaces, and thus contains information on the change in the surface potential of the SiC MOS structures. We compared the peak THz amplitude (ETHz) and gate voltage (Vg) curves taken from SiC MOS structures with different interface qualities and observed a steep ETHz–Vg curve for a high-quality SiO2/SiC interface as compared with the curve for a structure with a higher interface state density. We also compared the ETHz–Vg and capacitance–voltage characteristics of SiC MOS capacitors and investigated the mechanism of THz emission from the SiC MOS structures to validate the ability of the TES technique for characterizing SiO2/SiC interfaces. [ABSTRACT FROM AUTHOR]

The article is devoted to the development of an automated information-measuring system for assessing the capacitance-voltage characteristics of semiconductor structures, including structures based on transparent conductive coatings. The structure of the information-measuring system is proposed, and the results of functional and metrological analysis of the measurement channel of complex conductivity are presented. In particular, as a result of functional analysis, the conversion functions of complex conductivity into a digital code proportional to the capacitive and active components of conductivity are obtained. In the process of metrological analysis, a metrological structural model of the complex conductivity measurement channel was compiled, which, unlike the functional model, takes into account additive, multiplicative errors of the links, as well as the quantization error of the analog-to-digital converter. Expressions are obtained for the real functions of converting complex conductivity into a digital code proportional to the capacitive and active component of conductivity, taking into account the instrumental errors of the links that make up the measuring channel. Metrological analysis addresses both the direct problem of calculating the instrumental error of the measuring channel according to the known nominal parameters and errors of its constituent links, and the inverse problem, which consists of assigning requirements to the metrological characteristics of the links in the measuring channels to ensure the required value of the maximum measurement error. In particular, based on the metrological analysis performed, it was found that the experimentally confirmed limits of the permissible relative error of capacitance and conductivity measurements are less than or equal to ± 3. The developed automated information-measuring system allows the capacitance-voltage characteristics of the studied semiconductor structures to be measured, along with processing the measurements in order to determine the electrophysical parameters by an indirect method. [ABSTRACT FROM AUTHOR]

We have investigated the electrical characteristics of an AlGaAs/GaAs high electron mobility transistor, in which a layer of InAs self-assembled Quantum Dots (QDs) was inserted below the 2DEG channel. A Negative Differential Capacitance (NDC) appeared in the capacitance–voltage characteristics at a bias of 1 V and at low temperatures (even at room temperature) under different illumination powers using white light bulbs. This results in an increase in negative differential conductance with the increase in frequency and optical power. This also applies to the NDC except that it decreases with increasing frequency. The numerical simulation of the energy band structure of the device confirmed that the conduction band lowers to its minimum at a special bias value of 1 V. The numerical analysis of the evolution of the energy levels in the QD-HEMT follows the appearance of multiple capacitance peaks and their behavior with the gate voltage. [ABSTRACT FROM AUTHOR]

This study investigates the influence of molybdenum (Mo) doping on the local atomic structure, morphology, and electrical properties of amorphous germanium telluride (GeTe) thin films. Structural and morphological studies show that Mo-doping inhibits the crystallization of amorphous GeTe thin films. Moreover, the crystallization temperature of the GeTe thin film increases from 197 to 317 °C with increasing Mo dopant concentration. The electrical properties of Mo-doped GeTe thin films are discussed in terms of the capacitance–voltage characteristics in temperatures range 27–357 °C. The optical bandgap values decrease from 0.67 to 0.55 eV when increasing Mo doping in GeTe thin film. Mo integration significantly impacts the Ge–Te bond lengths and structural symmetry, increasing the degree of disorder in amorphous GeTe thin films. This study demonstrates the effectiveness of Mo doping in enhancing the thermal stability of the amorphous phase of GeTe for its envisioned memory and brain-inspired computing applications.

We report on the memory performance study of vertically stacked TiO2/In2O3 metal oxides heterostructure (MOH) nanowire (NW). Two typical structures p-Si/TiO2 TF/TiO2 NW/Ag and p-Si/TiO2 TF/TiO2 NW/In2O3 NW/Ag device were deposited using electron-beam evaporator incorporating glancing angle deposition technique. Frequency dependent studies ranging from 1 MHz to 6 MHz on capacitance-voltage characteristic was conducted to investigate charge trapping nature of both devices. TiO2/In2O3 MOH NW displayed wide memory window of 8.8 V and low interface trap density (Dit) ∼2.55 × 1011 eV−1cm−2. Flat band voltage shift (ΔVFB) was obtained from CV hysteresis and the electron as well as hole trapping density were found for the devices. In addition, the endurance of ON/OFF switching cycles for the TiO2/In2O3 MOH NW device was up to 1000 cycles. A resistance ON/OFF ratio of ∼20 was displayed with a stable retention time of 6500 s showing improved performance and reliability compared to TiO2 NW with resistance ON/OFF ratio of ∼3 and unstable retention time. Our work delivers an opportunity for developing the next generation stable and high-performance nonvolatile memory devices. [ABSTRACT FROM AUTHOR]

Solution‐processed copper(I) thiocyanate (CuSCN) typically exhibits low crystallinity with short‐range order; the defects result in a high density of trap states that limit the device's performance. Despite the extensive electronic applications of CuSCN, its defect properties are not understood in detail. Through X‐ray absorption spectroscopy, pristine CuSCN prepared from the standard diethyl sulfide‐based recipe is found to contain under‐coordinated Cu atoms, pointing to the presence of SCN− vacancies. A defect passivation strategy is introduced by adding solid I2 to the processing solution. At small concentrations, the iodine is found to exist as I− which can substitute for the missing SCN− ligand, effectively healing the defective sites and restoring the coordination around Cu. Computational study results also verify this point. Applying I2‐doped CuSCN as a p‐channel in thin‐film transistors shows that the hole mobility increases by more than five times at the optimal doping concentration of 0.5 mol.%. Importantly, the on/off current ratio and the subthreshold characteristics also improve as the I2 doping method leads to the defect‐healing effect while avoiding the creation of detrimental impurity states. An analysis of the capacitance‐voltage characteristics corroborates that the trap state density is reduced upon I2 addition. [ABSTRACT FROM AUTHOR]

The acceptor removal process is the most detrimental effect encountered in irradiated boron-doped silicon. This process is caused by a radiation-induced boron-containing donor (BCD) defect with bistable properties that are reflected in the electrical measurements performed in usual ambient laboratory conditions. In this work, the electronic properties of the BCD defect in its two different configurations (A and B) and the kinetics behind transformations are determined from the variations in the capacitance-voltage characteristics in the 243–308 K temperature range. The changes in the depletion voltage are consistent with the variations in the BCD defect concentration in the A configuration, as measured with the thermally stimulated current technique. The A→B transformation takes place in non-equilibrium conditions when free carriers in excess are injected into the device. B→A reverse transformation occurs when the non-equilibrium free carriers are removed. Energy barriers of 0.36 eV and 0.94 eV are determined for the A→B and B→A configurational transformations, respectively. The determined transformation rates indicate that the defect conversions are accompanied by electron capture for the A→B conversion and by electron emission for the B→A transformation. A configuration coordinate diagram of the BCD defect transformations is proposed. [ABSTRACT FROM AUTHOR]

Present work reports capacitance-conductance spectroscopic investigations of the selective swift heavy ion irradiated 4H–SiC based Schottky diodes. All measurements are performed under forward bias and in the frequency range from 100 Hz to 1 MHz. Compared to pristine ones, significant shift in the position and height of the peaks in the capacitance–voltage characteristics are observed after selective irradiation of the devices. These findings are discussed on the basis of interfacial modifications carried out by the electronic energy loss mechanism of the impinge ions. Additionally, Raman spectroscopic investigations have been performed to unveil the bulk modifications in the material under reference. A decrease in the peak intensity and occurrence of distorted-SiC peaks in the selectively irradiated material is observed. Such results are explained by taking into account the nuclear energy loss mechanism of the ions at the end of their range in the material under reference. [ABSTRACT FROM AUTHOR]

Experimental samples of single-crystal silicon with hole conductivity doped with boron (KDB-12) and with electronic conductivity doped with phosphorus (KEF-4.5) were studied using the C–V method of postoperative control. On the original KEF-4.5 and KDB-12 wafers, a dielectric layer of silicon dioxide SiO2 was grown. Next, the near-surface layer was doped with phosphorus or boron by ion implantation with the type of conductivity corresponding to the substrate. Postoperative control of the dose of impurity atoms embedded by ion implantation was carried out according to capacitance–voltage characteristics. The impurity distribution profiles for the same sample obtained at different points, as well as for different samples with the same implanted dose, differed slightly. The calculation of the dose of implanted ions and the relative error showed a high accuracy of control of the ion implantation process by measuring the capacitance–voltage characteristics. The relative measurement error when compared with the given dose did not exceed 10%. An error greater than 5% was observed for samples with an implanted ion dose close to the limiting dose detected by this method. [ABSTRACT FROM AUTHOR]

AlGaN/GaN high-electron-mobility transistors (HEMTs) with two different gate–drain distances (30 μm and 10 μm) were exposed to 1 MeV, 0.6 MeV, and 0.4 MeV protons at a fluence of 2.16 × 1012 cm−2. The gate–channel electron density and low-field mobility were obtained by measuring the capacitance–voltage characteristics and current–voltage characteristics. After proton irradiation, the gate–channel low-field electron mobility of the AlGaN/GaN HEMT with a 30 μm gate–drain distance increases and that with a 10 μm gate–drain distance decreases. It is studied and found that the mobility behavior is related to the polarization Coulomb field scattering, and the proton irradiation influences the intensity of the polarization Coulomb field scattering by changing the polarization/strain distribution in the barrier layer. The different gate–drain distances correspond to different variation trends of scattering intensity. The effect of 1 MeV protons on the barrier layer is smaller compared with 0.6 MeV and 0.4 MeV protons, so the mobility variation is smaller. [ABSTRACT FROM AUTHOR]

Unlike red and green quantum dot light-emitting diodes (QLEDs), it is not clear whether a blue QLED is an electron-dominated device. In this work, we identify that electron is over-injected in blue QLEDs by impedance spectroscopy. By analyzing the capacitance–voltage characteristics of the single-carrier devices, we find that the built-in voltage of the electron-only device is smaller than that of the hole-only device. Therefore, electron injection is more efficient than hole injection in blue QLEDs. To support our arguments, we employ a red QD as a fluorescent sensor to spatially investigate the exciton recombination zone of a blue QLED. Consequently, we observe that the exciton recombination zone of the blue QLED is close to the hole transport layer, and it shifts toward an electron transport layer with the increase in the applied bias. Our work provides a practical method for identifying the excess carrier in blue QLEDs, and it could be applied to other types of QLEDs. [ABSTRACT FROM AUTHOR]

This study describes the effects of high temperature annealing performed on structures fluorinated during initial silicon dioxide reactive ion etching (RIE) process in CF4 plasma prior to the plasma enhanced chemical vapour deposition (PECVD) of the final oxide. The obtained results show that fluorine incorporated at the PECVD oxide/Si interface during RIE is very stable even at high temperatures. Application of fluorination and high temperature annealing during oxide layer fabrication significantly improved the properties of the interface (Ditmb decreased), as well as those of the bulk of the oxide layer (Qeff decreased). The integrity of the oxide (higher Vbd ) and its uniformity (Vbd distribution) are also improved.

This study describes a novel technique to form good quality low temperature oxide (< 350°C). Low temperature oxide was formed by N2O + SiH4:N2 plasma in a plasma enhanced chemical vapour deposition (PECVD) system on the silicon surface reactively etched in CF4 plasma (RIE – reactive ion etching). The fabricated oxide demonstrated excellent (for low temperature dielectric formation process) currentvoltage (I−V) characteristics, such as: low leakage current, high breakdown voltage and good reliability. Experimental results indicate that the proposed method of fluorine incorporation into the SiO2/Si inteface improves electrical parameters of MOS structures.

Some green light emitting diodes (LEDs) based on GaN/InGaN multiquantum-well (MQW) structures exhibit strong frequency and temperature dependence of capacitance and prominent changes in capacitance–voltage profiles with temperature that make it difficult to obtain reliable deep level transient spectroscopy (DLTS) measurements. DLTS performed at low probing signal frequency and with constant capacitance between the measurements by controlling applied bias mitigates these issues. This allows measurement of deep electron and hole traps in specific quantum wells (QWs) in the MQW structure. The dominant electron and hole traps detected have levels near Ec− (0.45–0.5) eV and Ev+ (0.6–0.63) eV. Their density increases significantly after aging for a long period (2120 h) at high driving current and elevated temperature. The reason for the observed anomalies in DLTS spectra of these green LEDs is the high density of states in the QWs with activation energies near 0.08, 0.12–0.14, and 0.3 eV, detected in admittance spectra, and, for the 0.08 eV and 0.3 eV, these states are likely related to defects. [ABSTRACT FROM AUTHOR]

Cu(In,Ga)Se2-based solar cells often exhibit fill factor losses at low temperature, in particular after red illumination or reverse biasing. A narrow p+ layer between the absorber and buffer layers is commonly assumed to explain these effects. In this contribution, we analyze by means of analytical and numeric models the influence of the parameters of the p+ layer on current-voltage characteristics. Specifically, we find expressions linking the voltage at which the deterioration of the current-voltage curve begins with the acceptor density and the width of the p+ layer. Moreover, we derive formulas describing the height of the barrier in the conduction band caused by the p+ layer. Examples of the analysis of simulated current-voltage characteristics using our approach are presented. Based on the voltage at which the decrease of the current starts, it is possible to estimate the upper and lower limits of the density of the acceptors in the p+ layer. Furthermore, we analyze the relationship between the fill factor and the height of the barrier in the conduction band, which is determined by the density of acceptors in the p+ layer. [ABSTRACT FROM AUTHOR]

The correlation between capacitance-voltage hysteresis and accumulation capacitance frequency dispersion of metal gate/high-k/n-InGaAs metal-oxide-semiconductor stacks is experimentally assessed. Samples fabricated employing forming gas annealing (FGA) or substrate air exposure to obtain different densities of defects were thoroughly characterized and the results were compared with previous literature on the topic. Results indicate a lack of correlation between capacitance-voltage hysteresis and accumulation capacitance dispersion with frequency, suggesting that defects with remarkably different kinetics are involved in each phenomenon. This is assessed through the dependence of the capacitance-voltage hysteresis with DC bias and stress time, observing that permanent interface defect depassivation under bias has no effect on the hysteresis width after stress. Overall, capacitance-voltage hysteresis probes slow trapping mechanisms throughout the oxide and the bandgap, which are consistent with the negative charge trapping characteristic of the current-time curves for FGA samples at constant voltage stress. Instead, accumulation capacitance frequency dispersion probes defects with short trapping/detrapping characteristic times that can be linked to the stress induced leakage current of air exposed samples under constant DC stress. Experimental results indicate that each effect must be assessed separately due to the large difference in the kinetics of the probed defects. [ABSTRACT FROM AUTHOR]

Abstract—To study and control the technological processes for manufacturing semiconductor devices, the capacitance–voltage and conductance–voltage characteristics of space-charge regions in thin semiconductor layers are measured. Direct determination of the distribution profiles of the concentration and mobility of charge carriers from the measured capacitance–voltage and conductance–voltage characteristics is an urgent task. The work proposes simple operational methods for processing the capacitance–voltage and conductance–voltage characteristics in space-charge regions in thin semiconductor layers in order to obtain profiles of the distribution of the concentration and mobility of charge carriers. In particular, the determination of the concentration profiles of semiconductor majority carriers, the mobility of semiconductor majority carriers on structures with a conducting substrate, and the mobility of semiconductor majority carriers on structures with an insulating substrate are considered. It is shown that methods for processing capacitance–voltage and conductance–voltage characteristics of semiconductor structures such as a Schottky diode, asymmetrical p–n-junctions, and metal—insulator—semiconductor (MIS) structures can be used for monitoring technological processes and for inspecting finished devices. [ABSTRACT FROM AUTHOR]

We analyzed the degradation features by measuring the capacitance–voltage characteristics after electrically aging blue thermally activated delayed fluorescence (TADF) organic light-emitting diodes (OLEDs). The measurement was investigated in terms of the hole transfer layer (HTL) and electron transfer layer (ETL) structures. For the HTL, three different materials—N,N′–bis(naphthalen–1–yl)–N,N′–bis(phenyl)–benzidine (NPB), 4,4′,4″-tris(carbazol–9–yl)triphenylamine (TCTA), and 1,3–bis(carbazol–9–yl)benzene (mCP)—were used at the HTL/emission layer (EML) interface; the TCTA/EML interface had the highest stability among the interfaces. For the ETL, bis [2–(diphenylphosphino)phenyl] ether oxide (DPEPO) without further dopants was used as an exciton blocking layer (ExBL) to effectively confine the excitons at the EML. However, DPEPO has low stability and carrier mobility. Therefore, 0, 10, and 40 nm-thick ExBL devices were investigated; it was found that the 0 nm-thick ExBL device was the most stable. However, the 10 nm-thick ExBL is essential to confine the excitons at the EML, which ensures a high EL performance. [ABSTRACT FROM AUTHOR]

In this paper, the features of radiation compensation of wide-gap semiconductors are discussed, considering the case study of silicon carbide. Two classical methods of concentration determination are compared and analyzed: capacitance-voltage (C–V) and current-voltage (I–V) characteristics. The dependence of the base resistance in high-voltage 4H-SiC Schottky diodes on the dose of irradiation by electrons and protons is experimentally traced in the range of eight orders of magnitude. It is demonstrated that the dependence of the carrier concentration on the irradiation dose can be determined unambiguously and reliably in a very wide range of compensation levels, based on the results of measuring the I–V characteristics. It is shown that the determination of the carrier removal rate using the I–V characteristics is more correct than using the C–V characteristics, especially in the case of high radiation doses. [ABSTRACT FROM AUTHOR]

Extracting gate-drain overlap oxide capacitance (Coxd) is a necessary step for almost all kinds of insulated-gate bipolar transistor (IGBT) compact models. There are two datasheet-driven methods that are universally accepted, one is based on reverse capacitance voltage characteristics (C–V method), and the other uses gate charge characteristics (Q–V method). This letter is to reveal the underlying mechanism of these two methods. It is found that the C–V method has an inescapable shortcoming which will mistake the turn-off delay time forecasted by IGBT models. In this letter, the internal capacitance system of IGBT is modeled and demonstrated completely. Based on this model, the accuracy and feasibility of the C–V and Q–V methods are analyzed. Moreover, the effect of Coxd on IGBT compact models is studied and further verified by experiments and circuit simulations. [ABSTRACT FROM AUTHOR]

The results of electrical characteristics and alpha-particle energy spectrometry of 4H-SiC p-i-n diodes are reported. From the capacitance-voltage measurement, the effective doping concentration of the $80 ~\mu \text{m}$ lightly doped 4H-SiC epitaxial layer used in this work is calculated to be about $2\times 10\,\,^{{13}}$ cm $^{-{3}}$ , approaching the limit of the lowest doping level by the SiC epitaxial growth technique. The detector exhibits consistently low leakage current of picoampere level at a reverse bias of 100 V and superior thermal stability up to 150 °C. Resultantly, an energy resolution of 0.6% has been achieved within a 5486 keV $\alpha $ -particle spectrum, which is comparable to the high-resolution SiC Schottky barrier $\alpha $ -particle detector. Also, near 100% charge collection efficiency has been realized with reverse bias exceeding 25 V. This study thus provides a promising solution to high-performance 4H-SiC radiation detectors with low-voltage operation. [ABSTRACT FROM AUTHOR]