Search

In order to improve the electrical behaviour of metal-insulator-metal capacitors with ZrO2 insulator grown by Atomic Layer Deposition, the influence of the insertion of interfacial Cr layers between Pt electrodes and the zirconia is investigated. An improvement of the α-voltage coefficient of capacitance as low as 567 ppm/V2 is achieved for a single layer of Cr while maintaining a high capacitance density of 10.7 fF/μm2 and a leakage current of less than 1.2 × 10-8 A/cm2 at +1V. The role of the interface is discussed by means of X-ray photoelectron spectroscopy and high-resolution transmission electron microscopy showing the formation of Zr stabilized chromia oxide phase with a dielectric constant of 16. [ABSTRACT FROM AUTHOR]

We provide theoretical and simulation analysis of the small signal response of SiO2/AlGaN/GaN metal insulator semiconductor (MIS) capacitors from depletion to spill over region, where the AlGaN/SiO2 interface is accumulated with free electrons. A lumped element model of the gate stack, including the response of traps at the III-N/dielectric interface, is proposed and represented in terms of equivalent parallel capacitance, Cp, and conductance, Gp, . Cp, -voltage and Gp, -voltage dependences are modelled taking into account bias dependent AlGaN barrier dynamic resistance Rbr, and the effective channel resistance. In particular, in the spill-over region, the drop of Cp, with the frequency increase can be explained even without taking into account the response of interface traps, solely by considering the intrinsic response of the gate stack (i.e., no trap effects) and the decrease of Rbr, with the applied forward bias. Furthermore, we show the limitations of the conductance method for the evaluation of the density of interface traps, Dit, from the Gp,/ω vs. angular frequency ω curves. A peak in Gp/ω vs. ω occurs even without traps, merely due to the intrinsic frequency response of gate stack. Moreover, the amplitude of the Gp/ vs. ω peak saturates at high Dit, which can lead to underestimation of Dit. Understanding the complex interplay between the intrinsic gate stack response and the effect of interface traps is relevant for the development of normally on and normally off MIS high electron mobility transistors with stable threshold voltage. [ABSTRACT FROM AUTHOR]

The impact of thermal post deposition annealing in oxygen at different temperatures on the Ge/Y2O3 interface is investigated using metal oxide semiconductor capacitors, where the yttrium oxide was grown by atomic layer deposition from tris(methylcyclopentadienyl)yttrium and H2O precursors on n-type (100)-Ge substrates. By performing in-situ X-ray photoelectron spectroscopy, the growth of GeO during the first cycles of ALD was proven and interface trap densities just below 1 × 1011 eV-1cm-2 were achieved by oxygen annealing at high temperatures (550 °C-600 °C). The good interface quality is most likely driven by the growth of interfacial GeO2 and thermally stabilizing yttrium germanate. [ABSTRACT FROM AUTHOR]

In this paper, the dielectric constants of colloidal nanocrystals are investigated by scanning capacitance microscopy (SCM) and scanning microwave microscopy (SMM). Whereas SMM provides frequencies from 1 up to 18 GHz, conventional SCM is restricted to values below 20 kHz. With both techniques, C(V) and dC(V)/dV curves are acquired on various nanocrystalline films (Fe3O4, CoFe2O4, PbS) with monolayer thickness and on uncovered reference areas on the same samples. As we find, the dielectric constants of these nanocrystals are significantly larger as those of the bulk materials. A strong decrease of the permittivity with increasing frequency is also found. [ABSTRACT FROM AUTHOR]

In this work, an unusual low frequency behavior observed in scanning capacitance microscopy/spectroscopy on GaAs/Al2O3 junctions is investigated. Using a two-dimensional simulation, we show that the frequency behavior of the capacitance—voltage curves can be explained through an increased minority carrier concentration at to the GaAs–Al2O3 interface and tip geometry effects on the nanoscale. An analytic approach to estimate the transition frequency between the low frequency and high frequency regime is also given. [ABSTRACT FROM AUTHOR]

In this work, the influence of the tip geometry in scanning capacitance microscopy is investigated experimentally and theoretically on metal-oxide-semiconductor- (MOS) and Schottky-type junctions on gallium-arsenide (GaAs). Using a two-dimensional model we find that on Schottky-type junctions the electric field around the tip is screened by the surface states and that the essential parameters entering the capacitance versus voltage C(V) characteristics are the doping level and the contact area only. In contrast to that, the electric field from the tip penetrates into the semiconductor on a MOS-type junction, and the tip geometry effects are much larger. C(V) spectra are fitted to the experimental data and allowed a quantitative determination of doping levels, oxide thickness, and contact area without further calibration measurements. [ABSTRACT FROM AUTHOR]

Zinc metal nanowires have been oxidized at temperatures of 200¿500 °C in ambient air in order to obtain ZnO nanowires. X-ray diffraction investigations reveal a complete transformation from Zn to ZnO at a temperature of ¿300 °C within 30 min. Temperature-induced grain growth attains saturation at about 350 °C. Scanning electron microscopy studies show a pronounced morphology change from smooth, unidirectional to rough, bursted nanorods at a temperature of >250 °C. The corresponding transformation mechanism is discussed. [ABSTRACT FROM AUTHOR]

An unusual low frequency behavior seen in scanning capacitance microscopy/spectroscopy on GaAs/[Al.sub.2][O.sub.3] junctions are examined. A two-dimensional simulation has shown that the frequency behavior of the capacitance-voltage curves is explained by an increased minority carrier concentration at the GaAs-[Al.sub.2][O.sub.3] interface and tip geometry effects on the nanoscale.

Metal Oxide Semiconductor capacitors are investigated, employing ALD grown Y 2 O 3 as gate dielectric, and n-type (1 0 0) germanium as channel substrate. The effect of post deposition annealing (PDA) in oxygen and forming gas atmosphere using a thin catalytically acting platinum (Pt)-layer on the Y 2 O 3 /Ge interface is electrically analyzed for buffered hydrofluoric (BHF) and thermally pre-treated Ge-surfaces. The Pt-assisted PDA ensures even for BHF pre-treated samples very low values for the interface trap density D it of 1.55 × 10 11 eV −1 cm −2 and low leakage current densities J of <7 × 10 −9 A/cm 2 outperforming conventional PDA treatments. The interfacial formation of GeO 2 and yttrium germanate after PDA is proven by using X-ray Photoelectron Spectroscopy measurements. [ABSTRACT FROM AUTHOR]