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We study the interference properties of N coherent oscillators by using an equivalent radiofrequency coaxial cable electrical system consisting of N coaxial cables of different lengths, a 1 x N splitter, and a N x 1 coupler. The typical multiple-beam interference pattern is measured for several values of N as a function of the frequency. Unlike its optical counterpart, we have to consider the attenuation of the cables. The experimental curves agree well with theory and show the characteristics of multiple-beam interference. This approach represents an inexpensive way of experimentally investigating optical arrays. [DOI: 10.1119/1.2359000]

A scale changing approach is proposed for the electromagnetic modeling of phase-shifter elements used in reconfigurable microelectromechanical system (MEMS)-controlled reflectarrays. Based on the partition of the discontinuity plane in planar sub-domains with various scale levels, this technique allows the computation of the phase shift from the simple cascade of networks, each network describing the electromagnetic coupling between two scale levels. The high flexibility of the approach associated with the advantages of the integral equations formulations renders this original approach powerful and rapid. The scale-changing technique allows quasi-instantaneous computing of the 1024 phase shifts achieved by ten RF-MEMS switches distributed on the phase-shifter surface. Moreover, the proposed approach is much better than the finite-element-method-based software in time costing. Experimental data are given for validation purposes. Index Terms--Multiscale structures, planar phase shifter, reflectarrays, RF microelectromechanical systems (MEMS).

An approach for designing Talbot array illuminators that produce quasi-arbitrary numbers of spots and quasi-arbitrary distributions of these spots in the output plane is proposed. The approach consists in combining elementary Talbot array illuminators. In addition to the quasi-arbitrary topology of the output spots, the resulting compound array illuminator shows several advantages such as its ability to be used for both coherent and incoherent imaging. Compared with elementary array illuminators, the compound illuminator does not add any specific technological complication. OCIS codes: 070.0070, 050.1970, 070.6760.

An ultrasound (US), image-guided high-intensity focused ultrasound (HIFU) device was developed for noninvasive ablation of uterine fibroids. The variation in lesion dimensions indicates the possible development of HIFU protocols that increase HIFU throughput and shorten tumor treatment times.

A new algorithm for parametric localization of multiple incoherently distributed sources is presented. This algorithm is based on an approximation of the array covariance matrix using central and noncentral moments of the source angular power densities.

A nonuniform, one-dimensional tunnel junction array that is designed to promote phase-locking to an ac pump signal is proposed and theoretically discussed for possible information processing applications. The required parameter ranges and the necessary degree of control of this design are not practical for tunneling phase logic based on conventional tunnel junction technologies.

Lattice structures for RLS Laguerre adaptive filtering are proposed, including a posteriori- and a priori-based filters, with error-feedback, array-based lattice filters, and normalized lattice filters. Simulations illustrate performance characteristics.

The problem of subspace estimation using multivariate nonparametric statistics is examined. New high-resolution direction-of-arrival (DOA) estimation methods are proposed.

Cramer-Rao Bound (CRB) results are developed for low-rank decomposition of three- and four-dimensional (3-D and 4-D) arrays. Behavior of resulting bounds is examined, and alternating least-square algorithms used to compare such decompositions with CRBs are compared.

How ownership sets can be efficiently determined in the context of the High Performance Fortran (HPF) language is shown. How these sets can be symbolically characterized in the presence of arbitrary array alignment and array distribution directives is discussed.

The global matched filter was applied to direction of arrivals estimation with uniform circular arrays.

We describe the design, implementation, and test results from an analog complementary metal-oxide-semiconductor very large scale integration (CMOS VLSI) chip which combines photosensing and an image filtering operation similar to Gabor filtering. The chip contains a one-dimensional (1-D) 27-pixel array and generates three outputs at every pixel; the input image intensity and the real and imaginary parts of the filter output. These results validate experimentally a recently presented theoretical framework for the design of cellular neural network (CNN) templates for Gabor-type spatial image filtering. Index Terms - Analog circuits, cellular neural network (CNN), Gabor filter, image processing, neural networks.

An asymptotically efficient estimator based on the generalized least squares (GLS) criterion is proposed for the problem of localizing multiple narrowband stationary signals using an arbitrary time-varying array. The estimator approximates the maximum likelihood estimator for the large-sample case and when the signals are a priori known to be uncorrelated, exploits this to get better performance. A second estimator, the spatial-smoothing estimator, is found to be inferior in performance to the GLS estimator.

For free-space optical interconnections between optoelectronic chips to reach commercial realization, the technology must provide high-density optical channels in a simple, inexpensive, and easily aligned package. Although point-to-point connections with microlens pairs can provide densities of several thousand channels per square centimeter, the Gaussian nature of the beams limits the connection range to a few millimeters. We propose an arrangement of microlens pairs with an intermediate relay lens that significantly increases the connection distance. This basic setup can be tiled laterally across large chips to form extensible arrays. The optical design is constructed entirely with diffractive elements because of the low chromatic sensitivity over a range of approximately [+ or -]10% around the design wavelength. We derive the lateral positioning error at the image by using a simple ray trace, and we show the effect of Gaussian beams. We experimentally demonstrate the low chromatic sensitivity for a system with an interconnection distance of 64 mm. Finally, we demonstrate the interconnection of two linear arrays of multimode fibers with two adjacent channels operating at data rates of hundreds of megabits per second. OCIS codes: 050.1970, 200.4650, 200.2610.

A basic-cycle calculation technique is described for simple and efficient block-cyclic(s) to block-cyclic(t) redistribution performance. The communication overhead and computation overhead are overlapped using an asynchronous communication scheme. The technique is used on an IBM SP2 parallel unit and can be applied to multidimensional array redistribution and one-dimensional array redistribution.

Runlength-limited sequences and arrays have found applications in magnetic and optical recording. While the constrained sequences are well studied, little is known about constrained arrays. In this correspondence we consider the question of how to cascade two arrays with the same runlength constraints horizontally and vertically, in such a way that the runlength constraints will not be violated. We consider binary arrays in which the shortest run of a symbol in a row (column) is [d.sub.1]([d.sub.2]) and the longest run of a symbol in a row (column) is [k.sub.1]([k.sub.2]). We present three methods to cascade such arrays. If [k.sub.1] > 4[d.sub.1] - 2 our method is optimal, and if [k.sub.1] [greater than or equal to] [d.sub.1] + 1 we give a method which has a certain optimal structure. Finally, we show how cascading can be applied to obtain runlength-limited error-correcting array codes. Index Terms - Cascading, merging arrays, runlength-limited arrays, runlength-limited sequences.

An implementation framework is presented for the access to and storage of distributed arrays in data parallel languages such as High Performance Fortran. Findings reveal that local set enumeration and local storage methods can be freely combined. As such, the optimal storage strategy can be chosen, without having to rearrange local memory if the access method is changed during the execution of the program.

A recursive least squares algorithm based on inverse triangular updating shows a hardware implementation on a generic systolic array. This algorithm is useful in applications such as singular value decompositions (SVD) updating and Kalman filtering. The method allows the incorporation of alternative data weighting strategies such as directional weighting without affecting the speed of the process.

A joint geometry model and a reliability model are used to generate design/processing guidelines for improving the yield of ball-grid array packages. The reliability model which incorporates a closed-form expression relates the maximum shear strain in a solder joint to load, joint shape parameters and material composition. The models generate results for inverted and upright reflow of uniform and nonuniform arrays.

Discrete-time Laguerre sequences are effective for representing sequences in the form of orthogonal expansions. The main objective of this communication is to propose a systolic-array implementation for finite-duration Laguerre expansions. Key words: Orthonormal expansions, Laguerre expansions, systolic arrays.

A three-dimensional wavefront array for matrix product with minimal block pipelining period of 1 is introduced and compared to existing systolic array architectures for matrix product. An optimal processor-time product of [n.sup.3] with cycles defined computationally by two operations is obtained when successive problem instances are considered. The 3-D architecture; is extensible and scalable, is cycle invariant (all respects), is node invariant (all respects), has minimal node complexity of one multiply and one addition per cycle, has unidirectional and local data forwarding in three dimensions, has 100% utilization of processing elements, and has a cycle-invariant one-to-one correspondence between input/output ports and input/output matrix elements. Key words: Computer architecture, pipelining, systolic array, throughput, matrix product, processor time, three-dimensional, wavefronts, parallel processing, latency.

A three-dimensional programmable erasable nonvolatile cylindrical (PENCIL) flash EPROM cell has small size, high read current, inherent bit line isolation, optimum doping profile, low bit line capacitance, simple array structure and metal bit lines. An algorithmic approach reduces the erase threshold voltage distribution to a great extent. Gate oxide quality determines the window closure. The cells are programmable even after 30,000 cycles.

A novel algorithm suitably distributes parity and data across disks to tolerate two disk failures in disk array systems. The method suitably constructs a N x N redundancy matrix and helps in placing parity and data. The method enables the construction and mapping of a redundancy matrix into a solution to the placement problem under specific conditions between the number of disks N and the redundancy rate p. The method effectively solves two disk failures and possibly more but is limited by the assumption about partitioning disks into blocks.

A general methodology employs a set of canonical dependencies and two models of space projection for partitioning and mapping of arbitrary uniform recurrence equations (URE) onto a specific regular array. The method is algorithmic, and highly efficient in communication and computation. The new procedure is more efficient than locally parallel globally sequential method and locally sequential globally parallel method. The primary limitation is the URE condition.

Analyses of the necessity of framework preconstruction, aggregate storage subsumption and predictive storage preallocation, which are three memory management optimizations, indicate their usage in SISAL 1.2 programs, which help array construction. These optimizations remove the allocate-deallocate sequences, decrease the array component's management overhead and simplify and remove data copying in filtered arrays.

The transient thermal response of vapor deposited micro heat pipe arrays fabricated as an integral part of silicon wafers was measured to determine if these arrays could be used to reduce the local temperature gradients and improve the reliability of semiconductor devices. Wafers with arrays of 34 and 66 micro heat pipes were evaluated using an IR thermal imaging system in conjunction with a VHS video recorder. These arrays occupied 0.75 and 1.45 percent, of the wafer cross-sectional area, respectively. The wafers with micro heat pipe arrays demonstrated a 30 to 45 percent reduction in the thermal time constant when compared to that obtained for plain silicon wafers. This reduction in response time was shown to lead to a significant reduction in the maximum wafer temperature, due to the increased effective thermal conductivity caused by the vaporization and condensation occurring in the individual micro heat pipes. The experimental results were then used to validate a transient numerical model, capable of accurately predicting the transient temperature profile and thermal time constant of the wafer/heat pipe combinations.

An experimental investigation of vapor deposited micro heat pipe arrays was conducted using arrays of 34 and 66 micro heat pipes occupying 0.75 and 1.45 percent of the cross-sectional area, respectively. The performance of wafers containing the arrays was compared with that of a plain silicon wafer. All of the wafers had 8 X 8 mm thermofoil heaters located on the bottom surface to simulate the active devices in an actual application. The temperature distributions across the wafers were obtained using a Hughes Probeye TVS Infrared Thermal Imaging System and a standard VHS video recorder. For wafers containing arrays of 34 vapor deposited micro heat pipes, the steady-state experimental data indicated a reduction in the maximum surface temperature and temperature gradients of 24.4 and 27.4 percent, respectively, coupled with an improvement in the effective thermal conductivity of 41.7 percent. For wafers containing arrays of 66 vapor deposited micro heat pipes, the corresponding reductions in the surface temperature and temperature gradients were 29.0 and 41.7 percent, respectively, and the effective thermal conductivity increased 47.1 percent, for input heat fluxes of 4.70 W/[cm.sup.2]. The experimental results were compared with the results of a previously developed numerical model, which was shown to predict the temperature distribution with a high degree of accuracy, for wafers both with and without the heat pipe arrays.

Analysis of the problem of inverted file partitioning in multiple-disk I/O systems helps develop two partitioning schemes that separate the document file and Index file. One scheme employs the term id while the other scheme employs document id to separate the posting file to secondary storage. Simulations with varying disk numbers, term frequencies in documents and queries and multiprogramming levels help analyze the performance of these schemes.

Incorporation of pipeline architectures enables the efficient processing of a two-scan algorithm for recursive morphological operations. An application-specific systolic array and a parallel program operating on distributed-memory multicomputers are two pipeline architecture-based implementations of the morphological operations. The parallel program employs a large-grain pipeline architecture while the systolic arrays utilize the available hardware to display a cell utilization rate of 100%.