1. High-speed, energy-efficient InP photonic integrated circuits for transceivers
- Author
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Williams, K.A., Trajkovic, M., Rustichelli, V., Lemaître, F., Ambrosius, H.P.M.M., Leijtens, X.J.M., Schroder, Henning, Chen, Ray T., Photonic Integration, Eindhoven Hendrik Casimir institute, NanoLab@TU/e, and Center for Quantum Materials and Technology Eindhoven
- Subjects
business.industry ,Computer science ,Photonic integrated circuit ,Detector ,Hardware_INTEGRATEDCIRCUITS ,Optoelectronics ,Terabit ,Photonics ,Transceiver ,business ,Multiplexer ,Multiplexing ,Electronic circuit - Abstract
Indium Phosphide integrated photonics enables the combination of high-speed lasers and modulators with filters, detectors and multiplexers in one wafer-scale process flow. Low-voltage modulation at rates of 50Gigabit/second and above are feasible with combinations of semi-insulating substrates, optimised multi-quantum wells and high-speed electrical design. Advances in monolithic InP platform technologies have created a mechanism to rapidly introduce such high performance building blocks into sophisticated integration processes, enabling photonic integrated circuits with many tens of active components including distributed feedback lasers, tunable lasers and a range of passsive components. Our recent introduction of 192nm deep UV scanner lithography - believed to be a world first for InP integrated photonics - also enables a step change in the performance for the integrated filters and mode control. In this paper, we present recent innovations in the creation of high performance transceiver technologies for optical interconnects. We showcase circuits using InP integrated photonics to create high-speed, energy-efficient, optically-multiplexed circuits. Monolithic polarization multiplexing and wavelength domain multiplexing are reviewed where all components, inclusive of the lasers, are created in the same wafer. Line-rates of up to 320 Gb/s are demonstrated for optically multiplexed circuits using a variety of open access fabrication platforms. The challenges and approaches for Terabit/second class transceiver chips will be addressed, addressing crosstalk management, component miniaturisation, and intimate electronic integration.
- Published
- 2019