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In this work, hafnium zirconium oxide (HZO)-based 100 × 100 nm2 ferroelectric tunnel junction (FTJ) devices were implemented on a 300 mm wafer platform, using a baseline 65 nm CMOS process technology. FTJs consisting of TiN/HZO/TiN were integrated in between metal 1 (M1) and via 1 (V1) layers. Cross-sectional transmission electron microscopy and energy dispersive x-ray spectroscopy analysis confirmed the targeted thickness and composition of the FTJ film stack, while grazing incidence, in-plane x-ray diffraction analysis demonstrated the presence of orthorhombic phase Pca21 responsible for ferroelectric polarization observed in HZO films. Current measurement, as a function of voltage for both up- and down-polarization states, yielded a tunneling electroresistance (TER) ratio of 2.28. The device TER ratio and endurance behavior were further optimized by insertion of thin Al2O3 tunnel barrier layer between the bottom electrode (TiN) and ferroelectric switching layer (HZO) by tuning the band offset between HZO and TiN, facilitating on-state tunneling conduction and creating an additional barrier layer in off-state current conduction path. Investigation of current transport mechanism showed that the current in these FTJ devices is dominated by direct tunneling at low electric field ( E 0.4 MV/cm). The modified FTJ device stack (TiN/Al2O3/HZO/TiN) demonstrated an enhanced TER ratio of ∼5 (2.2× improvement) and endurance up to 106 switching cycles. Write voltage and pulse width dependent trade-off characteristics between TER ratio and maximum endurance cycles (Nc) were established that enabled optimal balance of FTJ switching metrics. The FTJ memory cells also showed multi-level-cell characteristics, i.e., 2 bits/cell storage capability. Based on full 300 mm wafer statistics, a switching yield of >80% was achieved for fabricated FTJ devices demonstrating robustness of fabrication and programming approach used for FTJ performance optimization. The realization of CMOS-compatible nanoscale FTJ devices on 300 mm wafer platform demonstrates the promising potential of high-volume large-scale industrial implementation of FTJ devices for various nonvolatile memory applications.

The recent discovery of ferroelectric behavior in doped hafnia-based dielectrics, attributed to a non-centrosymmetric orthorhombic phase, has potential for use in attractive applications such as negative differential capacitance field-effect-transistors (NCFET) and ferroelectric random access memory devices (FeRAM). Alloying with similar oxides like ZrO2, doping with specific elements such as Si, novel processing methods, encapsulation and annealing schemes are also some of the techniques that are being explored to target structural modifications and stabilization of the non-centrosymmetric phase. In this study, we utilized synchrotron-based x-ray diffraction in the grazing incidence in plane geometry (GIIXRD) to determine the crystalline phases in hafnia-zirconia (HZO) compositional alloys deposited by atomic layer deposition (ALD). Here we compare and contrast the structural phases and ferroelectric properties of mechanically confined HZO films in metal-insulator-metal (MIM) and metal-insulator-semiconductor (MIS) structures. Both MIM and MIS structures reveals a host of reflections due to non-monoclinic phases in the d-spacing region between 1.75A to 4A. The non-monoclinic phases are believed to consist of tetragonal and orthorhombic phases. Compared to the MIS structures a suppression of the monoclinic phase in MIM structures with 50% zirconia or less was observed. The correlation of the electrical properties with the structural analysis obtained by GIIXRD highlights the importance of understanding the effects of the underlying substrate (metal vs. Si) for different target applications.

Ferroelectric and antiferroelectric Hf/Zr-based oxide films have recently gained interest for memory and AI applications due to their promise of low power and CMOS compatibility. As Hf/Zr-based oxides are not ‘new’ materials, this paper will start with an overview of past learning on this material system. Recent results on fundamental understanding of the mechanism of ferroelectric and antiferroelectric switching will be presented. Challenges in implementation of this material system in high volume manufacturing will be discussed.

Here, we report the measurement of the dielectric spacer etch process for nanowire and nanosheet FET processes. A previously described Nanowire Test Structure (NWTS) was used for this study.[1, 2, 3] This structure has alternating Si/Si1-xGex/…/Si multilayers. Subsequent to the selective etching of the Si1-xGex layers (cavity etch), a silicon nitride (SiN) dielectric layer was deposited on the NWTS. Here we report on the use of Mueller Matrix Spectroscopic Ellipsometry based Scatterometry (MMSE) to measure the thickness of the SiN dielectric layer after deposition and after trim etch steps. Four different amounts of trim etch were characterized.

The three-dimensional architectures for field effect transistors (FETs) with vertical stacking of Gate-all-Around Nanowires provide a pathway to increased device density and superior electrical performance. However, the transition from research into manufacturing will only be successful if their feature shape, critical dimensions, and associated electrical performance are repeatable across the integrated circuit, across the wafer, and among multiple wafers. Patterning process control for these structures will require significant advances in metrology. Two techniques that are potential candidates for this purpose are Mueller Matrix Spectroscopic Ellipsometry based Scatterometry (MMSEscatterometry) and Critical Dimension Small Angle X-Ray Scattering (CDSAXS). In this work, we highlight the characterization of the Nanowire Test Structures fabricated from patterned Si/SixGe1-x/Si/SixGe1-x/Si/SixGe1-x/Si structures using CDSAXS. Preliminary experimental data shows sensitivity to the selective etching of subsurface SixGe1- x. CDSAXS diffraction data provides information in reciprocal space about line shape and periodicity as well as the amount of subsurface etching. Side lobes in the Intensity vs. Qz (structure height) data are observed around Qz positions of around 0.15 nm-1 and 0.5 nm-1 and are at the same positions in the measured and the simulated data for different amounts of SixGe1-x etch in the Nanowire Test Structures. This demonstrates its ability for successful measurement of the critical dimensions and 3D profile of the Nanowire Test Structures, which can then be extended to monitor several key process steps for Nanowire/Nanosheet FET fabrication.

As scaling becomes more challenging, new approaches to transistor design, new materials, and new devices are all being explored. Advanced transistor designs such as vertically stacked nanowire and nanosheet FETs (NW/NS FETs) provide a pathway to sub-10 nm devices. Ferroelectric High κ enables extension of FinFET and NW/NS FETs as well as providing a potential dielectric for memristive devices, including RRAM and ferroelectric tunnel junctions. NW/NS FETs provide a significant challenge for both processing and process control due to the geometries associated with their 3D structure. Increasing computational power will ultimately require more than scaling, however. Neuromorphic (brain like) computing and non-Von Neumann computing architectures are now being explored as alternative options for increasing computation capability. To develop efficient neuromorphic and non-Von Neumann hardware, new devices and materials integration strategies are required. This paper provides an overview of advanced NW/NS transistors and new memristor devices and materials and their characterization and metrology.

The topologically protected surface states of three-dimensional (3D) topological insulators have the potential to be transformative for high-performance logic and memory devices by exploiting their specific properties such as spin-polarized current transport and defect tolerance due to suppressed backscattering. However, topological insulator based devices have been underwhelming to date primarily due to the presence of parasitic issues. An important example is the challenge of suppressing bulk conduction in Bi2Se3 and achieving Fermi levels ( EF) that reside in between the bulk valence and conduction bands so that the topologically protected surface states dominate the transport. The overwhelming majority of the Bi2Se3 studies in the literature report strongly n-type materials with EF in the bulk conduction band due to the presence of a high concentration of selenium vacancies. In contrast, here we report the growth of near-intrinsic Bi2Se3 with a minimal Se vacancy concentration providing a Fermi level near midgap with no extrinsic counter-doping required. We also demonstrate the crucial ability to tune EF from below midgap into the upper half of the gap near the conduction band edge by controlling the Se vacancy concentration using post-growth anneals. Additionally, we demonstrate the ability to maintain this Fermi level control following the careful, low-temperature removal of a protective Se cap, which allows samples to be transported in air for device fabrication. Thus, we provide detailed guidance for EF control that will finally enable researchers to fabricate high-performance devices that take advantage of transport through the topologically protected surface states of Bi2Se3.

Spectroscopic imaging ellipsometry (SIE) is used to localize and characterize flakes of conducting, semi-conducting and insulating 2D-materials. Although the research in the field of monolayers of 2D-materials increased the last years, it is still challenging to look for small flakes and distinguish between different layer numbers. Special substrates are used to enhance optical contrast for the conventional light microscopy (LM). In case when other functional support from the substrate is essential, an additional transfer step needs to be employed, bringing the drawbacks as contamination, cracking and wrinkling of the 2D materials. Furthermore it is time-consuming and not yet fully automatically to search for monolayers by contrast with the LM. Here we present a method, that is able to automatically localize regions with desired thicknesses, e.g. monolayers, of the different materials on arbitrary substrates.

With the rapid advancement of the CMOS technology in the semiconductor industry, innovative device fabrication techniques have led to the development of Nanosheet (NS) FETs and Nanowire (NW) FETs with sub nm dimensions. The application of Mueller Matrix Spectroscopic Ellipsometry (MMSE) based scatterometry simulations to characterize these complex 3D structures is described. Optical model-based simulations were used to investigate sensitivity and limitations of MMSE to characterize small changes in the etching of these NWTS structures. Cross-sectional Scanning Electron Microscopy and Tunneling Electron Microscopy provided a reference technique for the scatterometry simulations. Additionally, sensitivity to the nanowire test structure shape, size of holes, nanosheet thicknesses of each layer and the rounding at the top of the structure were investigated. As a result of this study, we find that Mueller Matrix scatterometry has the sensitivity to monitor dimensional changes during the progression of the selective SiGe etch for the sub surface nanowires and thus provide a reliable measurement method for process control.

In this Letter, we report the percentage of the ferroelectric phase in a 10-nm-thick Hf0.5Zr0.5O2 (HZO) film deposited in a metal-insulator-metal stack by atomic layer deposition. The ferroelectric behavior was confirmed by polarization measurements and piezoresponse force microscopy. Ferroelectric behavior in this material has been attributed most likely to the formation of the polar non-centrosymmetric orthorhombic phase [Muller et al., Appl. Phys. Lett. 99, 102903 (2011)], which is difficult to distinguish from the tetragonal phase in x-ray diffraction due to peak overlap. Using a model for each of the crystal phases of hafnia-zirconia, the phase percentages were estimated using a Rietveld refinement method applied to grazing incidence x-ray diffraction data and a linear combination fit analysis procedure [McBriarty et al., Phys. Status Solidi 257, 1900285 (2020)] applied to grazing incidence extended x-ray absorption fine structure data. Using these methods, it was found that the tetragonal (P42/nmc) phase is the most prevalent at 48–60% followed by the polar non-centrosymmetric orthorhombic (Pca21) phase at 35%–40% with the remainder consisting of the monoclinic (P21/c) phase. Understanding the details of the effect of the phase structure on the electrical properties of these materials is extremely important for device engineering of HZO for logic and emerging nonvolatile memory applications.

In order to achieve proper process monitoring and control for the deposition of thin film photovoltaic absorbers, for example CuIn1 − xGaxSe2 (CIGS), optical techniques such as spectroscopic reflectometry and polarimetry are advantageous because they can be set up in an unobtrusive manner in the manufacturing line, and collect data in-line and in-situ. The use of these techniques requires accurate optical models that correctly represent the properties of the layers being deposited. In this study, spectroscopic ellipsometry (SE) has been applied for the characterization of each individual stage of CIGS layers deposited using the three-stage co-evaporation process. Dielectric functions have been determined for the energy range between 0.7 eV and 5.1 eV. As the layers' thicknesses are in the order of 2.5 μm, thickness non-uniformity along with surface roughness has been included in the analysis. A high similarity between the optical models developed for CIGS on glass and on stainless steel substrate was observed. Critical-point line-shape analysis was used in this study to determine the critical point energies of the CIGS based layers. These results can assist in the development of optical process-control tools for the manufacturing of photovoltaic absorbers, increasing the uptime and yield of the production line.

For exploring the prospect of higher-k dielectric phase engineering on a high mobility substrate, films of Hf1-xZrxO2 with varying x-values (0 ≤ x ≤ 1) were deposited on Al2O3 passivated Ge substrates using atomic layer deposition (ALD) with a cyclic deposit-anneal-deposit-anneal (DADA) scheme. The evolution of monoclinic to higher-k tetragonal structure with increasing ZrO2 concentration was probed by grazing incident x-ray diffraction and partial reciprocal space maps using the highly brilliant synchrotron x-ray source at the Cornell High Energy Synchrotron Source (CHESS). A primarily amorphous/nano-crystalline matrix of the as-deposited films changed to randomly aligned grains of nanocry stalline MO2 (M=Hf, Zr) after post deposition annealing at 800 °C for 200 seconds. In contrast, the DADA films annealed for same thermal budget showed high degree of preferred orientation along certain crystallographic directions. With increasing ZrO2 content, the structure of the films changed from a monoclinic to a tetragonal phase. A lower amount of ZrO2 (x = 0.33) was required for stabilizing the tetragonal phase in films grown on Al2O3 passivated Ge substrate as compared to similar films grown on a Si substrate via the same DADA process (x ≥ 0.50).

The development of on-chip nonlinear optical devices in silicon is of great importance to silicon photonics and silicon chip based quantum information processing technologies. With the aim for a viable solution to overcome the lack of second harmonic generation (SHG) in Si, which is fundamentally limited by its centrosymmetric lattice structure, our work investigates SHG behaviors from Si (100) crystals with silver nanostructures formed following deposition of an ultrathin silver film and subsequent annealing. This study is aided by additional techniques, including x-ray photoelectron spectroscopy for measuring surface band bending, secondary electron microscopy for monitoring surface morphology, and Raman scattering for assessing crystal stress. The resultant Ag nanostructures are found to strongly impact the second order nonlinear polarizations in the Si surface regions rather than the bulk. The SHG intensities are increased following the Ag deposition but reduced below the Si control levels after annealing at 600 and 700 °C, which may be due to charge transfer from Ag to SiO2/Si and/or passivation of interfacial defects. Interestingly, annealing at higher temperatures (800 and 900 °C) leads to the formation of Ag nano-shell structures embedded below the SiO2/Si interface, different from the as-deposited and low-temperature annealing cases with Ag nano-spheroid structures appearing on the surface, and concomitantly, the SHG intensities are recovered and even exceed the level for the as-deposited sample in the p-Si case. The enhanced SHG following high-temperature annealing, particularly at 800 °C, is attributed to a redshift of the localized plasmon resonance of these embedded Ag nano-shells relative to the surface-covered nano-spheroids that leads to localized surface plasmon resonance around the fundamental light wavelength. Other factors including electric-field-induced SHG and the effects of stress or oxide thickness can be ruled out. This work suggests a novel approach to enhance second-order optical nonlinearity in Si through the formation of embedded metal nanostructures.

Nondestructive measurement of three-dimensional subsurface features remains one of the most difficult and unmet challenges faced during the fabrication of three-dimensional transistor architectures, especially nanosheet and nanowire based field effect transistors. The most critical fabrication step is the selective etching of silicon-germanium subsurface layers. The resulting shape and dimensions of the remaining Si(1 − x)Gex structure strongly impacts further processing steps and ultimately the electrical performance of gate-all-around transistors, thus creating the need for accurate inline metrology. In order to demonstrate the ability to characterize this etch, nanowire test structures made from Si(1 − x)Gex/Si/Si(1 − x)Gex/Si/Si(1 − x)Gex/Si multilayers have been characterized using Mueller matrix spectroscopic ellipsometry based scatterometry. Transmission electron microscopy images were used to corroborate the authors’ scatterometry measurements. Here, they successfully demonstrate the ability to measure the Si(1 − x)Gex etch, providing an industrially viable technique for inline three-dimensional metrology.

We developed an ion beam based processing scheme to synthesize Ag nanoparticles embedded within Si. Such embedded Ag nanostructures are expected to significantly enhance second harmonic generation thus the Pockel's effect in Si owing to the electric dipoles possessed by Ag nanostructures and the strong electric field effects associated with surface plasmon excitation of Ag nanostructures. Preliminary work in this direction has revealed an interesting correlation between the enhancement of second harmonic generation and the Ag nanostructure size/shape. Such nanosystems are capable of enhancing second harmonic generation from Si for on-chip silicon modulator fabrication.

In this paper, we report on Muller Matrix (MM) based scatterometry (aka. optical critical dimension or OCD) simulation strategies for two sub-7nm fin structures: one with a SixGe1-x/Si/SixGe1-x/Si/SixGe1-x/Si nanosheet structure and its comparison with a hypothetical Si-only fin structure of similar dimensions at sub-7nm semiconductor technology nodes. Si-fins are providing the performance improvements necessary for the transistors used in current generation integrated circuits. Development of sub-7nm technology nodes requires further performance improvements including advanced structures including new materials. This demand for improved performance has created the need for new fabrication processes such as extreme ultraviolet lithography, self-aligned quadruple patterning etc., along with new metrology challenges for adequately monitoring the semiconductor process control during fabrication of these advanced nanostructures.1 New materials and structures, such as, Si/Si1-xGex (0≤x≤1) stacked nanosheet structures have recently been developed as one of the potential replacement for Si-based FinFETs.2,3 We have simulated two fin structures: one with Si-fins and another with 3 alternating stacks of Si1-xGex/Si (x=0.3). We have used Rigorous Coupled Wave Approximation (RCWA) to simulate OCD spectra for 0° – 360° azimuthal angles in 10° steps by keeping the fin pitch fixed at 24nm while systematically changing (1) the fin critical dimension (CD) from 5.0–7.5nm in 0.5nm steps, (2) thickness of the Si and Si1-xGex (x=0.3) nanosheets (NST) from 8.0–1.5nm in 0.5nm steps, (3) the fin bending angle (FBA) from 0°–2.5° in 0.5° steps, and (4) the undercut angle (ED) of the Si1-xGex NSTs from 0°–10° in 2° steps. Difference in etch-rate of Si and Ge could give rise to non-zero ED during NST formation. Both the fin structures possess mirror symmetry about two orthogonal planes perpendicular to the substrate and with one of the planes along the fin long-axis. For angles 0°, 90°, 180°, and 270°, this mirror symmetry leads to absence of the cross-polarization terms in the simulated OCD spectra such that off-diagonal MM elements are zero over the simulated wavelength range. The broken mirror symmetry in other azimuthal angles leads to cross-polarization of the electrical field vectors which is seen in the off-diagonal MM elements becoming non-zero. Additionally, the off-diagonal MM elements show increased sensitivity and reduced correlation between the parameters under study which leads to a powerful metrology means for studying the critical fin-parameters for fast and reliable semiconductor process control in sub 7-nm technology nodes. All the non-zero MM-elements are found to be sensitive to changes in CD and NST with the off-diagonal elements showing greater sensitivity to the changes. At azimuthal angles

We observe that second-harmonic (SH) light generated by a femtosecond probe pulse from Si nanograting surfaces can be enhanced by a correlating pump pulse. Time-resolved anisotropy analysis shows that the enhancement arises from transient stimulation by the pump because it polarizes the periodically distributed charge from the probe photoinjection. In addition, dipole and quadrupole SH components are stimulated differently depending on the pump polarization. This effect reveals ultrafast SH dynamics in centrosymmetric materials and provides guidance for measuring nanoscale features.

As Si metal oxide semiconducting field effect transistors have continued to scale, SiO2-based gate dielectrics and polySi gates have beensuccessfullyreplacedbyHfO2-basedhigh-kdielectricsandmetal gates at the 45nm technology node and beyond. In order to continue scaling, improvements of key film properties of the high-k dielectric, such as k-value, equivalent oxide thickness (EOT) and leakage current, are needed. A reduction in EOT can be achieved by reducing the thickness of the gate dielectric with the associated drawback of increased gate leakage, or by increasing its effective dielectric constant (k-value). In this regard, the electrical properties of HfO2-based dielectrics may be enhanced by structural modifications, since the kvalue has been shown to be dependent on the crystalline phase (monoclinick =16,tetragonalk =70andcubic =29). 1 HfO2 filmstypically crystallize into the monoclinic phase, which is its most thermodynamically stable phase. 2,3 One method of stabilizing the metastable cubic

Recent studies have shown that when graphene is placed on a thin hexagonal boron nitride (h-BN) substrate, unlike when it is placed on a typical SiO2 surface, it can closely approach the ideal carrier mobility observed in suspended graphene samples. This study further examines the epitaxial relationship between graphene and h-BN substrate with high-resolution transmission electron microscopy simulation. Virtual monolayer and multilayer stacks of h-BN were produced with a monolayer of graphene on top, on bottom, and in between h-BN layers, in order to study this interface. Once the simulations were performed, the phase contrast image and Moiré pattern created by this heterostack were analyzed for local and global intensity minima and maxima. In addition, h-BN substrate thickness and rotations between h-BN and graphene were probed and analyzed. The simulated images produced in this work will be used to help understand subsequent transmission electron microscopy images and electron energy-loss studies.

As Si metal oxide semiconducting field effect transistors have continued to scale, SiO2-based gate dielectric and polySi gates have been successfully replaced by high-k dielectrics and metal gate at the 45nm technology node and beyond. In order to continue scaling, improvements of key film properties of the high-k dielectric, such as k-value and leakage current, are needed. The electrical properties of HfO2-based dielectrics may be enhanced by structural modifications, since the k-value is dependent on the crystalline phase (monoclinic k=16, tetragonal k=70 and cubic =29) [1]. HfO2 films typically crystallize into the monoclinic phase, which is its most thermodynamically stable phase [2,3]. Alloying HfO2 with other oxides such as ZrO2, TiO2, Al2O3offer a viable option towards engineering the crystalline phase. In this regards, we have deposited 40 cycles of Hf1-xAlxOy films by atomic layer deposition with Al/(Hf+Al)% ranging from 0 to 25%. A set of samples were annealed under N2 at temperatures ranging from 680 oC to 800oC and compared to the as deposited samples. To investigate the crystallinity of the films, we performed grazing incidence in-plane X-ray diffraction (GIIXRD) on the annealed films and in-situ XRD during an anneal process using synchrotron radiation was used to determine the crystallization temperature (Tc) for the unannealed films. The GIIXRD measurements revealed the presence of non-monoclinic peaks which was also confirmed by the in-situ anneal XRD measurements. The crystallization temperature of the non-monoclinic phase obtained from the in-situ anneal XRD is plotted in Fig.1, where it is shown that higher Al/(Hf+Al)% results in higher Tc. In order to resolve the non-monoclinic phase, extended X-ray absorption fine structure (EXAFS) at was utilized. The EXAFS measurement combined with GIIXRD showed the ALD Hf1-xAlxOy films crystallize into a mixture of the tetragonal and monoclinic phases. The electrical properties were investigated by MOS capacitors with ALD TiN as the metal gate. The electrical measurements show a reduction in EOT after post deposition anneal (PDA). In addition, the leakage current was also reduced by a factor of 10 while maintaining a flat-band voltage that is comparable to PDA HfO2 films under identical conditions. The C-V plots of the as deposited samples and annealed samples are shown in Fig. 2 and Fig.3 respectively. We also investigated the effect of different thermal budgets on the Hf1-xAlxOy films. A ~2Å EOT reduction with lower gate leakage was obtained for devices with post deposition anneal near the crystallization temperature of the Hf1-xAlxOyfilms. However, the electrical performance is degraded for devices with higher or lower post deposition anneal temperature than the films’ crystallization. In summary, we have successfully deposited ALD Hf1-xAlxOy. The crystal phase was confirmed to be a mixed phase of tetragonal with monoclinic. The data shows an enhancement in electrical properties near the crystallization temperature of the Hf1-xAlxOyfilms. Acknowledgements Diffraction measurements were carried out at NSLS (X20A and X20C), BNL, which is supported by the DOE, Division of Materials Sciences and Division of Chemical Sciences, under Contract No. DE-AC02-98CH10886. References [1] X. Zhao et al., Phys. Rev. B, 65, 233106 (2002). [2] E.P Gusev, V. Narayanan, M. M Frank, Phys. Status Solidi A, 201, 1443 (2004). [3] D. A Neumayer, E. Cartier, J. Appl. Phys., 90, 1801 (2001).

We find that optical second-harmonic generation (SHG) in reflection from a chemical-vapor-deposition graphene monolayer transferred onto a SiO2/Si(001) substrate is enhanced about 3 times by the flow of direct current electric current in graphene. Measurements of rotational-anisotropy SHG revealed that the current-induced SHG from the current-biased graphene/SiO2/Si(001) structure undergoes a phase inversion as the measurement location on graphene is shifted laterally along the current flow direction. The enhancement is due to current-associated charge trapping at the graphene/SiO2 interface, which introduces a vertical electric field across the SiO2/Si interface that produces electric field-induced SHG. The phase inversion is due to the positive-to-negative polarity switch in the current direction of the trapped charges at the current-biased graphene/SiO2 interface.

We find that the major and minor intensity lobes of a measured rotational-anisotropy pattern of optical second-harmonic generation (SHG) from a cleaved $\mathrm{B}{\mathrm{i}}_{2}\mathrm{S}{\mathrm{e}}_{3}$ (111) surface can gradually change with time and eventually switch their relative amplitudes. This switching provides a means for tracking the progress of surface oxidation inside a quintuple layer of $\mathrm{B}{\mathrm{i}}_{2}\mathrm{S}{\mathrm{e}}_{3}$. At different stages of oxidation, we perform pump-probe SHG experiments to study charge dynamics at the oxide/$\mathrm{B}{\mathrm{i}}_{2}\mathrm{S}{\mathrm{e}}_{3}$ interface and to detect spin polarization of photoexcited surface states in the $\mathrm{B}{\mathrm{i}}_{2}\mathrm{S}{\mathrm{e}}_{3}$ topological insulator.

Using rigorous coupled wave analysis (RCWA) and finite element method (FEM) simulations together, many interesting ellipsometric measurements can be investigated. This work specifically focuses on simulating copper grating structures that are plasmonically active. Looking at near-field images and Mueller matrix spectra, understanding of physical phenomena is possible. A general strategy for combatting convergence difficulties in RCWA simulations is proposed and applied. The example used is a copper cross-grating structure with known slow convergence.

Graphene's importance in post-CMOS device research drives the need for a variety of metrology methods for film characterization. Chemical Vapor Deposition (CVD) on metallic foils and the thermal decomposition of SiC have become two of the dominant fabrication methods of large area graphene due to their industrial scalability. The former method has required transfer of the graphene film to secondary substrates (i.e. SiO2/Si) for electrical and optical characterization, but is conducive to TEM imaging due to the fact that the film can be etched from the growth foil and directly transferred to support grids. The latter method does not require film transfer for optical or electrical characterization and can control layer number by selection of process parameters as well as Si-face vs. Cface growth. The work will present STEM imaging of CVD graphene performed at 60 kV with atomic resolution achieved through aberration correction. Single-crystal areas are identified as well as defect structures.

Visualization of voids and copper extrusion in copper-filled through-silicon vias (TSVs) under different annealing conditions is greatly enhanced using X-ray microscopy. In addition, the dimensions of the TSVs after Cu deposition can also be measured by 3D reconstruction. Surface inspection found mushroom defects on the top of TSVs after deposition of the etch stop layer, forming a small bump on top of the TSV. The ~50nm etch stop layer is part of the dielectric stack used before metal 1 is deposited on top of the TSVs. The TSVs are annealed, then undergo chemical mechanical polishing (CMP) before the etch stop layer is deposited at 350^oC. It is assumed that after CMP the etch stop layer on top of the TSVs is planar. However, cross-sectional scanning electron microscopy (XSEM) shows mushroom defects but no particles at the interface of the TSV and the etch stop layer. This study investigates the changes in copper extrusion and induced voiding that result from different annealing temperatures. Round TSVs [email protected] deep and [email protected] in diameter were filled with copper by electrochemical deposition (ECD), followed by chemical mechanical polishing and pre-annealing to 150^oC for one hour. Based upon the material properties of TSVs, the high density copper absorbs photon energy more strongly than silicon or air. This results in good contrast within the copper-filled vias when X-ray micrographs are taken and allows voids within the material to be seen. A lab-based X-ray microscope with 8Kev X-ray energy allows a penetration of [email protected] into the silicon. Consequently, sample preparation requires wafers to be backside polished from an initial thickness of [email protected] to

Hydrocarbon-based CVD on metallic substrates provides a means of scalable fabrication of graphene thin films. CVD graphene is known to have grain boundaries which impact carrier mobility and optical response. Here, we use spectroscopic Ellipsometry (SE) to characterize the complex refractive index of Chemical Vapor Deposition (CVD) graphene grown on copper (Cu) foils and transferred to glass substrates. Two ellipsometers, with respective wavelength ranges extending into the ultra-violet (UV) and infrared (IR), have been used to characterize the CVD graphene optical constants. Our data follows the same relation to the fine structure constant observed in IR region by Heinz, et. al. We also observe the exciton dominated absorption peak at ~4.5 eV previously reported for exfoliated graphene by . The optical constants of CVD graphene show some differences to published values for exfoliated graphene. A Monte Carlo fit analysis is subsequently used for uncertainty determination. Wafer maps of 300 mm silicon wafers show the capability of ellipsometry to provide process control during manufacturing.

Next generation CMOS devices use a high-κ dielectric layer (HfO 2 , HfSiO, HfSiON and La 2 O 3 ) grown on thin interfacial silicon dioxide as the gate dielectric. The higher dielectric constant of the Hf oxide based film stack allows a decrease in equivalent oxide thickness (EOT). Because the high-κ film stack has a greater physical thickness than an electrically equivalent SiO 2 film, the tunneling current decreases. It is a critical metrology requirement to measure the thickness of silicon dioxide and high-κ film stacks. Spectroscopic ellipsometry (SE) in the far UV wavelength region can be used to differentiate the high-κ films from silicon dioxide. This is due to the non-zero nature of the imaginary part of the dielectric function (beyond 6 eV) in the far UV region for high-κ films. There has been some conjecture that optical studies should be extended beyond 150 nm further into the VUV. This study addresses these concerns through determination of the dielectric function down to 130 nm. We show the fitted dielectric function of hafnium silicates and lanthanum oxide down to 130 nm. X-ray reflectivity (XRR) measurements were also performed on the high-κ films to complement the thickness measurements performed with SE.

Benzocyclobutene (BCB) used for bonding silicon wafers to enable 3D interconnect technology is characterized using spectroscopic ellipsometry (SE). SE is a non-destructive technique that has been used to characterize the thickness and dielectric properties of BCB. The infrared (IR) absorption spectrum was used to calculate the percentage of curing of BCB on 300 mm bare and bonded wafers. The percentage of curing in BCB is a key parameter that impacts the bond strength and bond quality. This study presents the potential application of IRSE for measurements on bonded wafers to characterize the chemical information, curing percentage, bond quality and thickness of the BCB bonding layer. One of the key issues in the process development and characterization of BCB bonding for 3D interconnects of 300 mm wafers is the presence of dendrites and voids between the bonded wafers. The presence of dendrites and voids was identified by using scanning acoustic microscopy (SAM) and imaged by scanning electron microscope (SEM).

Maturity of silicon nanoelectronics and the high quality of 300 mm epi-Si wafers make these substrates an ideal choice for the growth of high quality III-Nitride devices. The results of our substrate engineering technique, which involves implantation of nitrogen into Si through an AlN thin film, have shown to simultaneously and significantly reduce the dislocation density and macro-cracks in epitaxially grown 2 μm GaN films. In this study, high quality strain engineered GaN films were grown by metalorganic chemical vapor deposition (MOCVD) and spectroscopic ellipsometry was used to characterize the dielectric properties, thickness, and stress of the complex structure. The uniaxial, anisotropic dielectric functions of wurtzite GaN and AlN were determined for the processes used in this study, and using this information, the thickness of each layer was determined in the completed film stack. IR spectroscopic ellipsometry (IRSE) was used as the non-destructive characterization technique to identify the IR sensitive phonon modes in AlN. The stress evolution in the films was investigated as a function of the phonon frequency shift and the broadening of the phonon modes. The results obtained by IRSE were further complemented by high resolution X-ray diffraction (HRXRD) and Raman scattering measurements.

We have used spectroscopic ellipsometry (SE) to measure layer thicknesses of HfO 2 /La 2 O 3 and La 2 O 3 /HfO 2 stacks on SiO 2 /p-Si. Two approaches to extract layer thicknesses from a single SE measurement were shown to be inaccurate, possibly due to similarities in the optical dispersions of HfO 2 and La 2 O 3 . The approach where SE data was collected after deposition of each layer and only the thickness of the top layer was determined by modeling was found to be capable of accurately measuring the thickness of each layer. These conclusions are supported by angle resolved X-ray photoelectron spectroscopy (ARXPS), X-ray reflectivity (XRR) and Rutherford backscattering spectroscopy (RBS) measurements.

As integrated circuit designs are pushed to tighter dimensions, chip real-estate is becoming of increasing value. Much like the growth of a developing city, a common modern approach is to grow the circuits upwards, building one layer on top of another. In this 3D stacking approach, the common issue lies in how to connect the multiple layers, for which direct connections through the silicon substrates have been found to produce the smallest footprint. These through-silicon vias (TSVs) are currently the subject of heavy research and development (R&D) investigation and their efficiencies are, in part, directly related to the occurrence or absence of voids within the metal structures. 3D x-ray microscopy (XRM) has recently been pushed to unprecedented resolution levels and may fit the inspection needs of the TSV R&D community. Using a unique projection-based micro-CT imaging geometry, entire packages may be inspected with as high as 1 μm resolution. This technique delivers non-destructive metrology of the metal fills as well as the post-etch regions in 3D, without the need for physical cutting or sectioning. By employing x-ray optics, resolution as high as 50 nm is now routinely achievable, allowing the detection of far sub-micron voids within the post-metallization TSV structures. These results may be further analyzed for void sizes and void volume fractions per via. Post-etch samples are also well-visualized using this technique, which allows high-resolution inspection of the side walls as well as measurement of the critical dimensions using the same system as for the post-metallization structures.

The recent discovery that with certain dopants hafnium oxide can be crystallized in a form that exhibits ferroelectricity has opened up a range of device possibilities(1). We have chosen to work within the Hf/Zr system for our initial studies. The advantages of the Hf/Zr doping system include the similarity in precursors which can enable several running modes for the ALD process including a co-pulsing scenario, as well a cycle ratio scenario for controlling the Zr doping. Because Zr and Hf are so similar structurally as well as chemically, the isologous precursors we employ have essentially identical delivery characteristics, including vapor pressure, relative sticking coefficient and relative decomposition point. Thus we expect the process to be capable of maintaining a highly consistent composition over a broad range of topology. In addition, the relative range of doping for which a strong remnant polarization is observed is much broader for the Hf/Zr system than for other dopants such as Al, Si, etc. which means this system should be more tolerant of small changes in composition than the other doping schemes. Generally, the ferroelectric phase of doped Hf oxide is thought to be a non-centrosymmetric orthorhombic phase that is co-crystallized with some other observable phases. In our studies we have found a strong correlation between the polarizability we observe and signals attributed to a tetragonal phase by grazing incidence X-ray diffraction using synchrotron radiation(2). In terms of electrical performance, we have shown reasonable polarization characteristics for films as thin as 5nm, and demonstrated the feasibility of using these films for multiple potential applications. We have explored the possibility of incorporating these films as gate dielectrics for a ferroelectric memory and have also demonstrated that we can fabricate a transistor exhibiting a steep subthreshold slope ( References: T. S. Böescke, J. Müller, D. Bräuhaus, U. Schröder and U. Böttger, in Technical Digest of the International Electron Devices Meeting, p. 24.5.1 (2011). S. Dey, K. Tapily, S. Consiglio, R. D. Clark, C. S. Wajda, G. J. Leusink, A. R. Woll, P. Sharma, S. Datta and A. Diebold, in Frontiers of Characterization and Metrology for Nanoelectronics, E. M. Secula and D. G. Seiler Editors, p. 223, Monterey, CA (2017). P. Sharma, K. Tapily, A. K. Saha, J. Zhang, A. Shaughnessy, A. Aziz, G. L. Snider, S. Gupta, R. D. Clark and S. Datta, in 2017 Symposium on VLSI Technology, p. T154 (2017).

The use of optical scattering to measure feature shape and dimensions, scatterometry, is now routine during semiconductor manufacturing. Scatterometry iteratively improves an optical model structure using simulations that are compared to experimental data from an ellipsometer. These simulations are done using the rigorous coupled wave analysis for solving Maxwell’s equations. In this article, we describe the Mueller matrix spectroscopic ellipsometry based scatterometry. Next, the rigorous coupled wave analysis for Maxwell’s equations is presented. Following this, several example measurements are described as they apply to specific process steps in the fabrication of gate-all-around (GAA) transistor structures. First, simulations of measurement sensitivity for the inner spacer etch back step of horizontal GAA transistor processing are described. Next, the simulated metrology sensitivity for sacrificial (dummy) amorphous silicon etch back step of vertical GAA transistor processing is discussed. Finally, we present the application of plasmonically active test structures for improving the sensitivity of the measurement of metal linewidths.

The unusual electronic properties of graphene make it a prime candidate material for extending nanoelectronics and designing new types of switches. Graphene's unusual properties are a result of the unusual band structure associated with the hexagonal bonding pattern and the electron/hole transport through the pi orbitals. Graphene samples are frequently more than one layer, or few-layer graphene, and the change in electronic properties with each layer depends on the stacking configuration and the rotational misorientation between the layers. Transport measurements of single layer graphene (SLG) show that graphene exhibits the quantum Hall effect. In addition, Berry Phase corrections to carrier transport measurements are now widely recognized. Because graphene is a single layer of carbon atoms, it is difficult to find, manipulate, and measure. We review the status of physical and electrical characterization of graphene and discuss the remaining challenges. We discuss results from optical microscopy, transmission electron microscopy, low energy electron microscopy, nano-Raman, and several scanned probe methods. Issues such as determination of the number of layers of graphene and rotational stacking misorientation are emphasized.

This work investigates the capability of spectroscopic ellip-sometry to measure charge trapping centers in thin dielectric films. Specific interfacial electrostatic fields, induced by electrons injected into charge trapping states at the interface, have been identified that directly affect the underlying silicon substrate critical points. The effect of a field-induced change in the silicon fundamental absorption edge due to different processing conditions affecting the oxygen vacancy defects at the interface is presented. Measuring the field-induced change in the silicon dielectric function between a sample with a 2 nm HfO 2 film as-deposited and the same sample after a 1000 °C anneal in an N 2 ambient reveals that a stronger interfacial field is present for the as-deposited HfO 2 film. These results are consistent with the understanding that high temperature anneals work well to passivate oxygen vacancy defects at the silicon/HfO 2 interface. Finally, we compare our results with Second Harmonic Generation where specific resonant features are identifiable with electric field enhancements at the same interface.

Recently, the change in optical properties of ultra-thin silicon on insulator films was shown to be due to quantum confinement. The E 1 critical point shifted to higher energies with a 1/L 2 dependence, and the shift was observed room temperature. Yet, quantum confinement effects in thin metal have yet to be observed optically. This leads to a number of questions that we raise and for which we provide preliminary answers. Shifts less than kT in energy can be observed optically when the final state is spatially and temporally localized.

An analysis methodology for charge pumping (CP) measurements was developed and applied to extract spatial distributions of traps in SiO 2/HfO2 gate stacks. This analysis indicates that the traps accessible by CP measurements in the frequency range down to a few kilohertz are located primarily within the SiO2 layer and HfO2/SiO2 interface region. The trap density in the SiO2 layer increases closer to the high-kappa dielectric, while the trap spatial profile as a function of the distance from the high-kappa film was found to be dependent on high-kappa film characteristics. These results point to interactions with the high-kappa dielectric as a cause of trap generation in the interfacial SiO2 layer

Measurement and control of line edge roughness (LER) is one of the most challenging issues facing patterning technology. As the critical dimensions (CD) of patterned structures decrease, LER of only a few nanometers can negatively impact device performance. Here, Mueller matrix spectroscopic ellipsometry (MMSE) based scatterometry is used to determine LER in periodic line-space structures in 28 nm pitch Si fin samples fabricated by directed selfassembly (DSA) patterning. The optical response of the Mueller matrix (MM) elements is influenced by structural parameters like pitch, CD, height, and side-wall angle (SWA), as well as the optical properties of the materials. Evaluation and decoupling MM element response to LER from other structural parameters requires sensitivity analysis using simulations of optical models that include LER. Here, an approach is developed that quantifies Si fin LER by comparing the optical responses generated by systematically varying the grating shape and measurement conditions. Finally, the validity of this approach is established by comparing the results obtained from top down scanning electron microscope (SEM) images and cross-sectional TEM image of the 28 nm pitch Si fins.

Simulations of Mueller matrix spectroscopic ellipsometry (MMSE) based scatterometry are used to predict sensitivity to dimensional changes and defects in directed self-assembly (DSA) patterned contact hole structures fabricated with phase-separated polystyrene-b-polymethylmethacrylate (PS- b -PMMA) before and after etch. The optical signature of Mueller matrix (MM) elements has a complex dependence on the structure topography and orientation, depolarization, and optical properties of the materials associated with the surface and any underlying layers. Moreover, the symmetry properties associated with MM elements provide an excellent means of measuring and understanding the topography of periodic nanostructures. A forward problem approach to scatterometry or optical model based simulations is used to investigate MMSE sensitivity to various DSA based contact hole structures and its limits to characterize DSA induced defects such as hole placement inaccuracy, missing vias, profile inaccuracy of the PMMA cylinder, and process induced defects such as presence of residual PMMA after etching.

Traditional ellipsometric measurements of copper gratings are limited to Angstrom resolution and are rather insensitive to changes in the critical dimension (CD) or pitch of the structure. By adding another grating per- pendicular and with larger CD and pitch, sensitivity is greatly enhanced. The spectra of one dimensional grat- ings is largely featureless over a wide range of CDs while crossed-gratings exhibit large minima which shift with changing CDs of less than an Angstrom. This improvement is due to plasmonic activity in the crossed-grating, demonstrated in detail here. Mueller matrix element analysis under azimuthal rotation provides information about cross-polarization and plasmon coupling conditions.

The image quality in electron microscopy often suffers from lens aberration. As a result of lens aberrations, critical information appears distorted at the atomic scale in high-resolution transmission electron microscopy (HRTEM). In scanning TEM (STEM), the spatial resolution of images and the quality of spectroscopic data are greatly reduced. With the recent introduction of aberration-corrected lenses and monochromators, new and exciting images with sub-0.1-nm spatial resolution are now recorded routinely, and electron energy loss data has been used to determine the location of a single atom in an atomic column. As a result of the decreased focal depth of an aberration-corrected lens used in STEM, the dream of three-dimensional (3-D) atomic resolution is one step closer and for HRTEM it was shown that 3-D imaging with atomic resolution is feasible. However, understanding imaging and spectroscopy in HRTEM and STEM still requires refined modeling of the underlying electron scattering processes by multislice image simulation. Since research into the physics and technology of nanoelectronic devices has already moved into sub-10-nm transistor gate lengths, the need for well-understood imaging and spectroscopy at nanoscale dimensions is already upon us. Fortunately, nanowires and other nanotechnology materials serve as useful test samples as well as being potential materials for future nanoelectronics. This enables early development of microscopy methods that will be used to investigate future generations of integrated circuits