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Artificial intelligence and machine learning are growing computing paradigms, but current algorithms incur undesirable energy costs on conventional hardware platforms, thus motivating the exploration of more efficient neuromorphic architectures. Toward this end, we introduce here a memtransistor with gate-tunable dynamic learning behavior. By fabricating memtransistors from monolayer MoS2 grown on sapphire, the relative importance of the vertical field effect from the gate is enhanced, thereby heightening reconfigurability of the device response. Inspired by biological systems, gate pulses are used to modulate potentiation and depression, resulting in diverse learning curves and simplified spike-timing-dependent plasticity that facilitate unsupervised learning in simulated spiking neural networks. This capability also enables continuous learning, which is a previously underexplored cognitive concept in neuromorphic computing. Overall, this work demonstrates that the reconfigurability of memtransistors provides unique hardware accelerator opportunities for energy efficient artificial intelligence and machine learning.

The increasing complexity of deep learning systems has pushed conventional computing technologies to their limits. While the memristor is one of the prevailing technologies for deep learning acceleration, it is only suited for classical learning layers where only two operands, namely weights and inputs, are processed simultaneously. Meanwhile, to improve the computational efficiency of deep learning for emerging applications, a variety of non-traditional layers requiring concurrent processing of many operands are becoming popular. For example, hypernetworks improve their predictive robustness by simultaneously processing weights and inputs against the application context. Two-electrode memristor grids cannot directly map emerging layers’ higher-order multiplicative neural interactions. Addressing this unmet need, we present crossbar processing using dual-gated memtransistors based on two-dimensional semiconductor MoS2. Unlike the memristor, the resistance states of memtransistors can be persistently programmed and can be actively controlled by multiple gate electrodes. Thus, the discussed memtransistor crossbar enables several advanced inference architectures beyond a conventional passive crossbar. For example, we show that sneak paths can be effectively suppressed in memtransistor crossbars, whereas they limit size scalability in a passive memristor crossbar. Similarly, exploiting gate terminals to suppress crossbar weights dynamically reduces biasing power by ∼20% in memtransistor crossbars for a fully connected layer of AlexNet. On emerging layers such as hypernetworks, collocating multiple operations within the same crossbar cells reduces operating power by ∼15× on the considered network cases.

In this work, we discuss the mitigation of threshold voltage ( ${V}_{{TH}}$ ) variability in nanoscale FinFET by exploiting the interaction of oxygen vacancies (OV) against metal gate granularity (MGG). Deposition of a metal gate on high- $\kappa $ dielectric HfO2 is known to generate OV in the dielectric which induces variability in surface potential. A higher workfunction of metal grain increases the probability of OV formation. Interestingly, while a higher workfunction metal grain decreases the surface potential of the channel underneath, the positive charge of OV increases the potential. Therefore, the concentration of OV can be controlled to negate the surface potential variability induced by MGG. We discuss the law of mass action-based concentration models of OV under MGG to analyze this. We also present TCAD simulations supporting the above hypothesis. In our simulations, for 10-nm channel FinFET, MGG-induced $\sigma $ ( ${V}_{{TH}}$ ) can be reduced to ~20 mV from ~35 mV for four-sided planar grains with 8 nm average edge length under the optimal OV concentration.

Artificial intelligence and machine learning are growing computing paradigms, but current algorithms incur undesirable energy costs on conventional hardware platforms, thus motivating the exploration of more efficient neuromorphic architectures. Toward this end, we introduce here a memtransistor with gate-tunable dynamic learning behavior. By fabricating memtransistors from monolayer MoS