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Abstract This paper proposes a new DC–DC bipolar resonance converter that combines a dual‐active‐bridge and a multi‐port resonance Buck‐Boost converter. This structure uses a resonance network between the input and output ports, which has the following advantages: it creates a constant current supply in the open‐loop mode; it keeps the current phase of the output ports constant under different loads; and it allows reversing the power from any output port by adjusting the phase shift of its switches, if the converter is connected to a DC microgrid. In this way, power can be exchanged among each of the output ports and input ports. The advantages of this converter are bidirectional power exchange, power exchange between output ports, soft switching, high efficiency, integration of transformer parasitic elements, and the modular capability to connect multiple resources at the input. Furthermore, the proposed structure of the bipolar converter has been implemented for verification purposes, and its results are presented in three modes: open loop, voltage control, and current control. Additionally, the results of different modes of power sharing and their bidirectionally are shown.

This paper proposes a new DC–DC bipolar resonance converter that combines a dual‐active‐bridge and a multi‐port resonance Buck‐Boost converter. This structure uses a resonance network between the input and output ports, which has the following advantages: it creates a constant current supply in the open‐loop mode; it keeps the current phase of the output ports constant under different loads; and it allows reversing the power from any output port by adjusting the phase shift of its switches, if the converter is connected to a DC microgrid. In this way, power can be exchanged among each of the output ports and input ports. The advantages of this converter are bidirectional power exchange, power exchange between output ports, soft switching, high efficiency, integration of transformer parasitic elements, and the modular capability to connect multiple resources at the input. Furthermore, the proposed structure of the bipolar converter has been implemented for verification purposes, and its results are presented in three modes: open loop, voltage control, and current control. Additionally, the results of different modes of power sharing and their bidirectionally are shown. [ABSTRACT FROM AUTHOR]

Nanosilver paste has become a promising lead-free die-attach material for power electronic packaging. This development solves the challenges faced by power device manufacturers to replace the lead-based or lead-free solders for high-temperature applications. This paper proposes the reliability of a 1200-V/150-A multichip insulated-gate bipolar transistor (IGBT) module using pressureless sintering of nanosilver paste as die attachment. The degradation in harsh environment was compared between the proposed IGBT module using pressureless sintered nanosilver and the commercial one using Sn5Pb92.5Ag2.5 solder by power cycling with two different test conditions. The device junction-to-case thermal resistance, I–V characteristics, and switching performance were measured at various numbers of cycles. The results show that the pressureless sintered nanosilver, which was used as the die attachment of the multichip phase-leg IGBT modules, has superior reliability rather than the commercial one. [ABSTRACT FROM AUTHOR]

6.5 kV level IGBT (Insulated Gate Bipolar Transistor) modules are widely applied in megawatt locomotive (MCUs) traction converters, to achieve an upper 3.5 kV DC link, which is beneficial for decreasing power losses and increasing the power density. Reverse Conducting IGBT (RC-IGBT) constructs the conventional IGBT function and freewheel diode function in a single chip, which has a greater flow ability in the same package volume. In the same cooling conditions, RC-IGBT allows for a higher operating temperature. In this paper, a mathematic model is developed, referring to the datasheets and measurement data, to study the 6.5 kV/1000 A RC-IGBT switching features. The relationship among the gate desaturated pulse, conducting losses, and recovery losses is discussed. Simulations and tests were carried out to consider the influence of total losses on the different amplitudes and durations of the desaturated pulse. The RC-IGBT traction converter system with gate pulse desaturated control is built, and the simulation and measurements show that the total losses of RC-IGBT with desaturated control decreased comparing to the RC-IGBT without desaturated control or conventional IGBT. Finally, a proportional small power platform is developed, and the test results prove the correction of the theory analysis. [ABSTRACT FROM AUTHOR]

The present study analyzed the characteristics of switching overvoltage, and discussed in detail the main influencing factors and worst-case conditions of switching overvoltage in the \pm 1100-kV ultra-high-voltage direct-current (UHVDC) converter station. The results showed that ac bus overvoltage was produced by oscillation, and would not be a threat to the equipment in the converter station. The results also showed there were two cases for overvoltage on related valves. In the first case, the valve overvoltage was on converter valves in the upper three-pulse group of the 12-pulse converter, and was caused by the voltage difference between the dc line and ac bus at the valve side under a specific fault. In the second case, the overvoltage was on other valves, and was caused by a phase-to-phase switching surge that penetrated into the valve hall. Other results were that overvoltage on the dc bus was mainly caused by the full reflection of the wave, and overvoltage on the neutral bus was caused by high-voltage sources, such as the dc source creating stress on the neutral bus under specific faults, or the freewheeling current of the metal return line and the smoothing reactors. [ABSTRACT FROM AUTHOR]

The compact model of an injection enhanced insulated gate bipolar transistors based on the exponential solution of the ambipolar diffusion equation is presented in this paper. To model plasma carrier distribution, an exponential shape function is used, and in steady-state forward bias operation, the plasma carrier concentration has a distribution of catenary form with just two exponential basis functions, while in transient operation, more complex profiles can be approximated using a number of exponential basis functions with a range of decay length parameters, shorter than the steady state ones. The device model developed has been implemented in Saber circuit simulator and successfully tested against complete set of high current, high voltage experimental results. [ABSTRACT FROM AUTHOR]

Two phosphorescent iridium complexes with bipolar transporting ability, namely FPPCA (500 nm) and BZQPG (600 nm), are synthesized and employed as an ideal host-guest system for phosphorescent organic light emitting diodes (PHOLEDs).The devices give very high-efficiency orange-red emission from BZQPG with maximum external quantum efficiency (EQE or ηext) of >27% and maximum power efficiency (PE or ηp) of >75 lm/W, and maintain high levels of 26% and 55 lm/W, 25% and 40 lm/W at high luminance of 1000 and 5000 cd m−2, respectively, within a range of 8-15 wt% of BZQPG. The realization of such high and stable EL performance results from the coexistence of two parallel paths: i) effective energy transfer from host (FPPCA) to guest (BZQPG) and ii) direct exciton formation on the BZQPG emitter, which can alternately dominate the electrophosphorescent emission. This all-phosphor doping system removes the charge-injection barrier from the charge-transport process to the emissive layer (EML) due to the inherent narrow Eg of both phosphors. Therefore, this ideal host-guest system represents a new design to produce PHOLEDs with high efficiency and low efficiency roll-off using a simple device configuration. [ABSTRACT FROM AUTHOR]

The buried oxide (BOX) layer in silicon on insulator (SOI) was replaced by a compound buried layer (CBL) containing layers of SiO2 , polycrystalline silicon (polysilicon), and SiO2 . The undoped polysilicon in the CBL acted as a dielectric with a higher thermal conductivity than SiO2 . CBL provides a reduced thermal resistance with the same equivalent oxide thickness as a standard SiO2 buried layer. Thermal resistance was further reduced by lateral heat flow through the polysilicon. Reduction in thermal resistance by up to 68% was observed, dependent on polysilicon thickness. CBL SOI substrates were designed and manufactured to achieve a 40% reduction in thermal resistance compared with an 1.0- \mum~SiO2 BOX. Power bipolar transistors with an active silicon layer thickness of 13.5 \mum manufactured on CBL SOI substrates showed a 5%–17% reduction in thermal resistance compared with the standard SOI. This reduction was dependent on transistor layout geometry. Between 65% and 90% of the heat flow from these power transistors is laterally through the thick active silicon layer. Analysis confirmed that CBL SOI provided a 40% reduction in the vertical path thermal resistance. Devices employing thinner active silicon layers will achieve the greater benefit from reduction in vertical path thermal resistance offered by CBL SOI. [ABSTRACT FROM AUTHOR]

This paper describes issues related to parallel connection of SiC bipolar junction transistors (BJTs) in discrete packages. The devices are applied in a high-frequency dc/dc boost converter where the switching losses significantly exceed the conduction losses. The design and construction of the converter is discussed with special emphasis on successful parallel-operation of the discrete BJTs. All considerations are experimentally illustrated by a 6-kW, 250-kHz boost converter (300 V/600 V). A special solution for the base-drive unit, based on the dual-source driver concept, is also shown in this paper. The performance of this driver and the current sharing of the BJTs are both presented. The power losses and thermal performance of the parallel-connected transistors have been determined experimentally for different powers and switching frequencies. An efficiency of 98.23% (±0.02%) was measured using a calorimetric setup, while the maximum temperature difference among the four devices is 12 °C. [ABSTRACT FROM AUTHOR]

An original design of 4H polytype of silicon carbide (4H-SiC) bipolar-mode field-effect transistors (BMFETs), which combines the on-state operation of silicon version with the off-state behavior of SiC-VJFETs (vertical junction field-effect transistor), is analyzed by numerical simulations. Using the physical parameters extracted from the previous experimental analysis, this paper shows the feasibility of 4H-SiC BMFETs to manage drain current densities as high as 500 A/cm 2 with a current gain of 50 and to sustain blocking voltage of 2.1 kV. Comparisons with the existing 4H-SiC power transistors, like bipolar junction transistors (BJTs), VJFETs, and double-diffusive metal-oxide-semiconductor FETs, show that, besides a thermal stability in the examined range 300-523 K, BMFET exhibits the low on-resistance of BJTs and can operate at the high frequencies of power FETs. [ABSTRACT FROM AUTHOR]

Silicon carbide (SiC) bipolar junction transistors (BJTs) require a continuous base current in the on-state. This base current is usually made constant and is corresponding to the maximum collector current and maximum junction temperature that is foreseen in a certain application. In this paper, a discretized proportional base driver is proposed which will reduce, for the right application, the steady-state power consumption of the base driver. The operation of the proposed base driver has been verified experimentally, driving a 1200-V/40-A SiC BJT in a dc-dc boost converter. In order to determine the potential reduction of the power consumption of the base driver, a case with a dc-dc converter in an ideal electric vehicle driving the new European drive cycle has been investigated. It is found that the steady-state power consumption of the base driver can be reduced by approximately 60%. The total reduction of the driver consumption is 3459 J during the drive cycle, which is slightly more than the total on-state losses for the SiC BJTs used in the converter. [ABSTRACT FROM AUTHOR]

The design of a 200-A, all-SiC power-module-based on bipolar junction transistor devices is described, and the impact of the module is assessed on the performance of a 50-kW dc-dc converter for electric vehicle applications, particularly the overall weight and efficiency. Using a hard-switching dual-interleaved topology, which has proven high efficiency and high-power density capability, the operation of a 50-kW, 75-kHz all-SiC converter is compared with that of an insulated-gate bipolar transistor-based silicon converter, switching at 25 kHz, each providing 600-V output. The results show that the total losses are reduced by almost 40%, whilst the overall weight is reduced by 27%, achieving a power density of 10.5 kW/kg. Experimental results of the SiC converter operating at 220-600 V, 52.8 kW are provided, showing an efficiency of 97%. [ABSTRACT FROM AUTHOR]

Highlights: [•] A bipolar-power-transistor-(BPT)-based limiter is presented. [•] BPT-based limiter exhibit relatively good performances at high frequency operation. [•] The BPT-based limiter is good choice for high frequency ultrasound systems. [ABSTRACT FROM AUTHOR]

The asymmetric underlap device for a floating body cell is proposed without any extra process or photomask during fabrication. The electric fleld in the gate-drain underlap region is quietly relaxed. It is found that memory operation would fail in bipolar-based floating body cells because band-to-band tunneling significantly alters the body potential. Measurements show the proposed structure could indeed suppress the undesirable band-to-band tunneling greatly so that the bistable state via the parasitic bipolar junction transistor is ensured in .scaled floating body cells. The parasitic capacitances in both word line and bit line are also reduced. [ABSTRACT FROM AUTHOR]

Plasmas in saline solution driven by a repetitive bipolar pulsed power source are studied. We use a negative pulse to generate electrolytic gas with a controllable amount, followed by a positive pulse to ignite the plasma. With an increase in the negative voltage pulse amplitude from 0 to −80 V, we observed an increase in the amount of electrolytic gas (hydrogen) formation, resulting in a reduced time delay, from 65 to 6 μs, required to ignite the plasma upon the onset of the positive pulse. A decrease, from 1.75 to 1.0 A, in the peak currents within the positive voltage pulse is also observed. Optical emission spectroscopy shows that the intensity ratio of the H (656 nm) to Na (588 nm) emission lines increases from zero to 0.0035. These observations can be well explained by the increase in the gas coverage on the electrode surface and the change in the gas composition within which the plasma is ignited with the application of the negative pulse. [ABSTRACT FROM AUTHOR]

The insulated gate bipolar transistor (IGBT) physical models are studied in details. The difference between low-voltage IGBT (LVIGBT) and high-voltage IGBT (HVIGBT) is analyzed and the shortage of the LVIGBT model used for HVIGBT is discussed. The physical model considering the effect of carrier concentrate on excess carrier lifetime is established for HVIGBT. The HVIGBT transient model is presented with different excess carrier lifetime in the base. The new description of steady-state U-I characteristics is also obtained with numerical method. The test experiment was performed in a Buck converter using 6500 V HVIGBT with different bus voltage and load current. The accuracy of the transient model of HVIGBT is verified by experiment and simulation results. The verification of some key parameters to describe the external characteristics is also given in the paper. [ABSTRACT FROM AUTHOR]

This paper evaluates the technique used to improve the latching characteristics of the 200 V n-type superjunction (SJ) lateral insulated-gate bipolar transistor (LIGBT) on a partial silicon-on-insulator. SJ IGBT devices are more prone to latch-up than standard IGBTs due to the presence of a strong pnp transistor with the p layer serving as an effective collector of holes. The initial SJ LIGBT design latches at about 23 V with a gate voltage of 5 V with a forward voltage drop (VON) of 2 V at 300 A/cm^2. The latch-up current density is 1100 A/cm^2. The latest SJ LIGBT design shows an increase in latch-up voltage close to 100 V without a significant penalty in VON. The latest design shows a latch-up current density of 1195 A/cm^2. The enhanced robustness against static latch-up leads to a better forward bias safe operating area. [ABSTRACT FROM PUBLISHER]

This paper presents a physics-based model of a silicon carbide bipolar junction transistor and verification of its validity through experimental testing. The Fourier series solution is used to solve the ambipolar diffusion equation in the transistor collector region. The model is realized using MATLAB and Simulink. The experimental results of static operation and also the simulated and experimental results of switching waveforms are given. [ABSTRACT FROM PUBLISHER]

In this paper, the short-circuit performance of a conventional 3.3-kV clustered insulated gate bipolar transistor (CIGBT) in field-stop (FS) technology is evaluated through extensive 2-D numerical simulations. For comparison, an equivalent 3.3-kV FS IGBT is considered. The conventional CIGBT shows superior performance of lower on-state voltage drop and saturation current densities in comparison to an equivalent IGBT. Further improvements to the CIGBT performance can be obtained without sacrificing on-state voltage drop by using a PMOS trench gate. The charge balance and electric field distribution with the varying n-buffer thickness at short-circuit condition are analyzed in detail. [ABSTRACT FROM AUTHOR]

A new concept of high-voltage dc-dc power conversion is presented in this paper. Its distinctive feature lies in distributing the high input voltage asymmetrically between two primary-side series-connected switch pairs. This allows using switches of optimal ratings in their respective class: the low-voltage switch pair implemented with MOSFETs only, and the high-voltage switch pair implemented with insulated gate bipolar transistors (IGBTs) only. As the switches in a switch pair are of the same type and voltage rating, they are maximally utilized. With an active snubber on the secondary side of the isolation transformer, a hybrid zero-voltage-switching-zero-current-switching (ZCS) scheme, which is different from the zero-voltage and zero-current-switching technique, is realized and makes all IGBTs be zero-current-switched and all MOSFETs be zero-voltage-switched from very light load to full load condition with minimal circulating energy. The ZCS snubber energy is completely released to the load, leading also to a duty-cycle gain. The operating principles, dc analysis, and design guidelines will be given. A 2-kW, 1500/48-V experimental prototype has been built and evaluated. The measured efficiency of the converter is found to be 92.4% at the rated condition. [ABSTRACT FROM AUTHOR]

This paper deals with a theoretical study of the hot-spot onset (HSO) in cellular bipolar power transistors. This well-known phenomenon consists of a current crowding within few cells occurring for high power conditions, which significantly decreases the forward safe operating area (FSOA) of the device. The study was performed on a virtual sample by means of a fast, fully analytical electrothermal simulator operating in the steady state regime and under the condition of imposed input base current. The purpose was to study the dependence of the phenomenon on several thermal and geometrical factors and to test suitable countermeasures able to impinge this phenomenon at higher biases or to completely e!iminate it. The power threshold of HSO and its localization within the silicon die were observed as a function of the electrical bias conditions as for instance the collector voltage, the equivalent thermal resistance of the assembling structure underlying the silicon die, the value of the ballasting resistances purposely added in the emitter metal interconnections, and the thickness of the copper heat spreader placed on the die top just to the aim of making more uniform the temperature of the silicon surface. [ABSTRACT FROM AUTHOR]

Both reduction in device sizes and enhanced increase in current densities lead to concern about the impact of the self-heating effect on device electrical characteristics. Moreover, in power transistors applications, devices are connected in parallel, so thermal interaction between devices also has to be considered. In this paper, a nodal model is proposed in order to take into account temperature variation due to self-heating and thermal coupling. This model associated with the HICUM Level 2 version 2.21 compact model is validated thanks to measurements made on specific test structures. [ABSTRACT FROM AUTHOR]

This paper establishes for the first time closed-form analytical limits from first-principle on the specific on-resistance, venus breakdown voltage with mobility compensation for all the currently known high-voltage device topologies: vertical DMOS, RESURF, super-junction, and thin-film silicon-on-insulator. The rigorous analytic treatment results in equations purely based on materials constants (relative dielectric constant), well-established fitting parameters (mobility, ionization coefficient), and natural constants (elementary charge, dielectric constant). The results are equally applicable to high-voltage diodes, bipolar devices and junction-FET, but the emphasis is on DMOS structures, which are the device of choice in many applications. Conduction-modulation devices (SCR, TRIAC, LGBT) are not considered here, as the inherent forward diode voltage renders those devices nonlinear at low anode-cathode voltage, making the term "on-resistance (Ron)" meaningless. The theory has been extended by many degrading mechanisms and real-life limitations and excellent agreement with reported results was obtained. [ABSTRACT FROM AUTHOR]

A large-signal heterojunction bipolar transistor (HBT) model has been developed which includes self-heating, collector transit-time, and RF-breakdown effects. The model has a compact form which is based on a compromise between accuracy and utility. As such, the model can be readily extracted and verified with the aid of RF waveform measurements. Using the model in simulations, it was found that RF breakdown was dependent on base biasing and loading conditions. Therefore, with proper circuit design, the maximum output power of the HBT can significantly exceed the limit of open-base breakdown voltage. [ABSTRACT FROM AUTHOR]

Large-area Si/Si/sub 1-x/Ge/sub x/ heterojunction bipolar transistors (HBTs) have been demonstrated with record output power at S-Band. Under pulsed conditions in class C operation, a saturated power in excess of 230 W was achieved at 2.8 GHz. At 200 W the devices exhibited a collector efficiency of 46% and a power gain of 6.9 dB. Devices with implanted Si bases had comparable gain, but only 35% efficiency at 150 W, and saturated at 180 W. In class A operation, 13.5 dB gain was demonstrated at 3.1 GHz on smaller devices. For high f/sub max/, a self-aligned silicided polysilicon-emitter structure was used in conjunction with a graded Si/sub 1-x/Ge/sub x/ base. Variable temperature dc tests and accelerated life tests have indicated no reliability problems. The results indicate for the first time that Si/SiGe HBTs are suitable for high-power, high-frequency applications. [ABSTRACT FROM AUTHOR]

A novel SiGe heterojunction bipolar transistor power cell for wireless LAN IEEE 802.11a power amplifier (PA) applications is proposed. The subcells with different emitter stripe widths have been compared. Besides, the layout of a novel power cell is designed and optimized to alleviate nonideal effects for better performance. Compared with the performance of power cells, it is demonstrated that this novel power cell is superior to other power cells for the design of the PA [ABSTRACT FROM PUBLISHER]

A simple method is proposed to derive the junction temperature and the bias- and temperature-dependent thermal resistance of heterojunction bipolar transistors (HBTs) using a radio frequency (RF) signal. The method exploits the thermal dependence of the current gain of a transistor whose dissipated power is modified by applying an RF signal. The new method is used to derive the junction temperature and thermal resistance of a power HBT. The results are compared with state-of-the-art techniques. [ABSTRACT FROM PUBLISHER]

InP single heterojunction bipolar transistors have previously demonstrated 5-10 dB lower third-order intermodulation products (IM3) compared to GaAs heterojunction bipolar transistors (HBTs) under low voltage (2 V) operation. This paper reports excellent single-tone and two-tone X-band operation, including high two-tone power-added efficiency (PAE), on linear InP double heterojunction bipolar transistors (DHBTs) operated at Vce=4 V. The InP DHBT demonstrated a 30 dB carrier to third-order intermodulation product (C/IM3) output power ratio simultaneously with 48% two-tone PAE. This is the highest known efficiency of an X-band device under linear (30 dB C/IM3) operation. This is especially significant for microwave power amplifiers for satellite communication transmitters, where lower intermodulation distortion is normally accomplished by backing off in RF drive and output power, thus sacrificing PAE performance [ABSTRACT FROM PUBLISHER]

A 0.35 μm BiCMOS current generator suitable for optical quantum random number generators is presented. The time dependence of the current pulses is of the form T/(T - t). The design uses the bipolar junction transistor translinear loop with two inputs supplied by a DC and one input supplied by a sawtooth current. The relative error of the measured waveform at 20 MHz is <3% in 97.5% of the time interval in which the current pulses have a rising slope. The current pulses can be generated up to a frequency of 100 MHz. [ABSTRACT FROM AUTHOR]