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The thermal stabilities of the atomic layer deposited HfO2 films were investigated on HF-cleaned InP substrates with and without additional (NH4)2S cleaning. An abrupt interface without any interfacial layer between the HfO2 film and InP substrate was maintained during annealing at up to 600°C for both samples. The S-passivation resulting from the (NH4)2S cleaning reduced the interface defect density, thereby decreasing the frequency dispersion and low-field leakage current. The increase of the capacitance equivalent SiO2 thickness after the thermal annealing was also delayed by the S-passivation, which was possibly attributed to the retardation of substrate materials diffusion into the HfO2 film. [ABSTRACT FROM AUTHOR]

This study examined the effects of the Zn ratio on the microstructure of InGaZnO (IGZO) films and the device performance of their transistors. IGZO films with various Zn ratios were produced by co-sputtering InGaO and ZnO at different ZnO powers. The combination of transmission electron microscopy (TEM) and X-ray diffraction (XRD) analyses elucidated that as the Zn ratio increased from 0 to 0.69, the microstructure changed from amorphous IGZO to nanocrystalline IGZO and then to columnar ZnO. The dynamic transitions of the microstructure, in turn, profoundly affected the electrical properties including the mobility and carrier concentration. The sample with a mixing ratio of 0.25:0.2:0.55 (In:Ga:Zn) exhibited the best performance with a mobility of nearly 30 cm2/V·s. [ABSTRACT FROM AUTHOR]

This study presents an examination of the interfacial and electrical properties of HfO2 films grown by plasma-enhanced atomic layer deposition with tetrakis(diethylmethylamino) hafnium and O2 precursors on GaAs substrates cleaned with HF and then (NH4)2S cleaning for three different dipping times. Systematic X-ray photoelectron spectroscopy analyses both before and after the HfO2 deposition revealed that the optimal cleaning time in terms of the removal of the As- and Ga-oxides was significantly reduced by the partial "self-cleaning" process that occurred at a substantially lower deposition temperature of only 200°C, possibly due to the plasma effect. The frequency dispersion characteristics were strongly dependent on the cleaning method, however, the hysteresis characteristics were not. [ABSTRACT FROM AUTHOR]

ZrO2 films doped with Y, Gd, Dy, and Ce at a concentration of ~13 cation atom % were deposited by a sol-gel technique, and the early-stage dopant effect on the stabilization of the high temperature phase and dielectric properties was systematically compared after a low-temperature annealing process (400°C). The high temperature phase formation of the ZrO2 films was hindered by the Y, Gd, and Dy doping, thereby reducing the dielectric constant. In addition, the hysteresis was significantly increased via electron trapping, which was attributed to the increase in the number of oxygen vacancies possibly due to the difference in the valence number of the dopants with that of the substituted Zr atoms. However, the dielectric constant of the ZrO2 film doped with tetravalent Ce atoms increased without retarding the stabilization of the high temperature phase and degrading the hysteresis characteristics. [ABSTRACT FROM AUTHOR]

In this study, we synthesized ZnO nanowires using Au catalytic particles formed on a ZnO seed layer. We modulated the microstructure of the ZnO seed layer by changing the sputtering power to investigate how the underlying ZnO film microstructure affects the distribution of ZnO nanowires. Examining the samples after each of the three key steps of the growth process (ZnO seed layer deposition, Au catalytic particle formation, and nanowire growth) using various characterization methods such as scanning electron microscopy, transmission electron microscopy, and x-ray diffraction helped us illuminate the profound impacts of the grain size of the seed layer on the nanowire density. [ABSTRACT FROM AUTHOR]

A bilayered cathode interfacial structure consisting of lithium fluoride (LiF) and pyromellitic dianhydride (PMDA) was used between Al and tris-(8-hydroxyquinoline) aluminum (Alq3) in the organic light-emitting diode (OLED), and a better performance enhancement compared to the OLED with a single LiF interfacial layer was achieved by using an optimal thickness combination of the bilayered interfacial structure (0.3 nm LiF/0.7 nm PMDA). The bilayered interfacial stucture with an optimum thickness combination decreased the parallel bulk resistance and lowered the electron injection barrier height between Al and Alq3 according to the impedance and in situ ultraviolet photoelectron spectroscopy measurements, respectively. [ABSTRACT FROM AUTHOR]

The microstructural and electrical properties of sol-gel deposited ultrathin Zr1-xCexO2 films with different Ce contents (x = 0, 0.1, 0.3, and 0.5) were studied using various characterization tools. Ce doping reduced the crystallization (densification) temperature and increased the dielectric constant of the Zr1-xCexO2 film. There was no degradation of the hysteresis characteristics, and a systematic negative shift in the fiatband voltage was observed by incorporating Ce atoms. Leakage current measurements showed no detrimental effects of Ce doping up to x = 0.5, and the conduction mechanism analyses revealed that the Zri1-xCexO2 films follow a Poole-Frenkel (PF) conduction, exhibiting a systematic increase in the linear slope of the PF plot possibly due to the decrease in dielectric trap sites with increasing Ce content. [ABSTRACT FROM AUTHOR]

SiO2/Si3N4/SiO2 tunnel barriers with a residual Si3N4 layer of different thicknesses were fabricated by thermally oxidizing Si3N4/SiO2 film. According to leakage current measurements, the effective barrier height was significantly lowered because the Si3N4 middle layer has a lower bandgap than SiO2, which is beneficial in increasing the erasing/programming speed in flash memory devices. However, detrimental effects, such as the increased hysteresis in capacitance-voltage characteristics and the degraded breakdown distribution, were observed due to the significant amount of the charge trapping induced by the increased Si3N4 thickness. For the sample with a distinctive Si3N4 layer, trap-assisted tunneling and Fowler-Nordheim tunneling were the dominant conduction mechanisms at low and high electric field, respectively. However, the accumulation of N at the SiO2/Si interface for the fully oxidized sample resulted in an asymmetric conduction mechanism behavior, which was explained by the band diagram analysis. [ABSTRACT FROM AUTHOR]

The formation and morphological evolution of the germanides formed in the Ni1-xTax/Ge (x=0 and 0.1) systems were examined using ex situ and in situ annealing experiments. It was observed that the Ni-germanide in the Ni0.9Ta0.1/Ge system remained stable at temperatures up to 550 °C whereas the Ni-germanide in the Ni/Ge system agglomerated and was unstable. Microstructural and chemical analyses of the Ni0.9Ta0.1/Ge system during and after in situ annealing in a transmission electron microscope confirmed that the Ta-rich layer was formed by the accumulation of Ta atoms on the interface between the Ni0.9Ta0.1 alloy film and the Ge substrate during the diffusion reaction, and a small amount of residual Ta was found in the Ni-germanide grains. Ultimately, the Ta-rich layer helps reduce the level of agglomeration in the Ni-germanide film and improves the thermal stability of Ni-germanide. [ABSTRACT FROM AUTHOR]

We investigated the dielectric characteristics of Hf-silicate films which were grown on Si(100) substrates by atomic layer deposition. The X-ray photoelectron spectroscopy results indicated that the atomic concentrations of HfO2 and SiO2 in the Hf-silicate films were similar to the cycle ratio between the number of HfO2 deposition cycles and that of SiO2 deposition cycles. The flatband voltage of Hf-silicate films increased as the compositional deviation from the stoichiometric compound HfSiO4 increased. For Hf-rich silicate films, the flatband voltages were lowered due to the increase of the positive fixed charge in SiO2 with the increase of SiO2 content. In addition, the crystallization temperatures were below 900°C after postannealing for 1 min in N2 ambient and accompanied the phase-separation process as the Si content increased. However, in the case of Si-rich Hf-silicate films, the increase of the effective metal work function dominated and increased the flatband voltages as the Si composition increased. The crystallization and phase separation of Hf-silicate films were not observed even after annealing at 900°C. [ABSTRACT FROM AUTHOR]

In this paper, atomic layer deposition (ALD) and ultraviolet ozone oxidation (UVO) of zirconium and hafnium oxides are investigated for high-κ dielectric preparation in Ge MOS devices from the perspectives of thermodynamic stability and electrical characteristics. Prior to performing these deposition processes, various Ge surface preparation schemes have been examined to investigate their effects on the resulting electrical performance of the Ge MOS capacitors. Interfacial layer-free ALD high-κ growth on Ge could be obtained; yet, insertion of a stable interfacial layer greatly enhanced the electrical characteristics but with a compromise for equivalent dielectric thickness scalability. On the other hand, interfacial layer-free UVO high-κ growth on Ge was demonstrated with minimal capacitance-voltage hysteresis and sub-l.0-nm capacitance equivalent thickness. Finally, the leakage conduction and scalability of these nanoscale Ge MOS dielectrics are discussed and are shown to outperform their Si counterparts. [ABSTRACT FROM AUTHOR]

This letter reports the utility of using the sol-gel process for exploring the library of multicomponent ZnO-based oxides as an active layer of thin film transistors. We chose InGaZnO as a starting material and modulated the Ga content to examine the potential of this material. Increasing the Ga ratio from 0.1 to 1 brought about a dynamic shift in the electrical behavior from conductor to semiconductor. This exploratory work critically helped us fabricate a device with robust device performance (a mobility of 1∼2 cm2 V-1 s-1 for the 400 °C-sintered samples and 0.2 cm2 V-1 s-1 for the 300 °C-sintered samples). [ABSTRACT FROM AUTHOR]

Ultrathin HfO2 and HfLaOx films with La/(Hf+La) ratios of 42%, 57%, and 64% were synthesized with an atomic layer deposition process. By measuring the leakage current at different temperatures, the conduction mechanism of HfO2 and HfLaOx films was shown to follow the Poole–Frenkel emission model under a gate injection condition. Based on the temperature and field-dependence measurements, the intrinsic trap energy levels were found to be 1.42, 1.34, 1.03, and 0.98 eV for the HfLaOx samples with La/(Hf+La) ratios of 0%, 42%, 57%, and 64%, respectively, showing a decreasing behavior as the La content increased. [ABSTRACT FROM AUTHOR]

HfO2 films were grown by atomic layer deposition using two different precursor chemistries—HfCl4 and tetrakis(diethylamido)hafnium (TDEAH) with H2O as the oxidant. Electrical measurements on capacitor structures fabricated using the films showed a 0.4 V positive shift in the flatband voltage for the chloride-HfO2 with respect to the amide-derived HfO2, indicating a considerable negative fixed charge in the dielectric. Secondary ion mass spectrometry depth profiles of the gate stack showed that Cl segregated preferentially at the HfO2/SiO2 interface for chloride-derived HfO2. In situ vacuum anneals of the HfCl4-derived films at 500 °C did not affect the profile, indicating that Cl is stably bonded at that interface. A similar analysis of the TDEAH-derived HfO2 showed very low concentrations of C, N, and H impurities. A positive fixed charge of +4.5 × 1011/cm² was extracted for the amide-HfO2 whereas a negative fixed charge of -1.86 × 1012/cm² was estimated for the chloride-HfO². Thus, Cl incorporation can significantly alter both the magnitude and sign of the fixed charge in the HfO2/SiO2/Si gate stacks. [ABSTRACT FROM AUTHOR]

A chemically selective process to achieve high-resolution area-selective atomic layer deposition (ALD) of HfO2 is introduced in this letter. By utilizing the intrinsically selective absorption behavior of self-assembled monolayers (SAMs) on different surfaces, SAMs are used to deactivate the oxide regions on a patterned silicon substrate while leaving areas of hydride-terminated silicon intact. Subsequently, a HfO2 thin film is selectively deposited onto the hydride-terminated silicon regions by ALD. The result by several analytical methods indicates that the process presented here has excellent area selectivity and forms HfO2 patterns with high spatial resolution. [ABSTRACT FROM AUTHOR]

As high-permittivity dielectrics approach use in metal-oxide-semiconductor field-effect transistor production, an atomic level understanding of their dielectric properties and the capacitance of structures made from them is being rigorously pursued. We and others have shown that crystal structure of ZrO2 films have considerable effects on permittivity as well as band gap. The as-deposited films reported here appear amorphous below a critical thickness (∼5.4 nm) and transform to a predominantly tetragonal phase upon annealing. At much higher thickness the stable monoclinic phase will be favored. These phase changes may have a significant effect on channel mobility. [ABSTRACT FROM AUTHOR]

In this letter, we demonstrate that formation of a Zr-silicate interfacial layer between ZrO2 and Si substrate can be controlled by the solid state reaction between Zr and an underlying SiO2/Si substrate through in situ vacuum anneals and subsequent UV oxidation. By investigating the chemical shifts of Si 2p, Zr 3d, and O 1s features using x-ray photoelectron spectroscopy, the formation of a Zr-silicide phase after in situ vacuum anneals of the Zr/chemical SiO2/Si gate stack at 200 °C was confirmed. The Zr-silicide was oxidized to form a Zr-silicate phase in the subsequent UV-ozone oxidation treatment. According to spectroscopic analyses, Zr-silicate bonding occurred in the interfacial layer for the in situ vacuum annealed samples. Vacuum annealed samples containing the silicate interface layer exhibited excellent dielectric characteristics, such as negligible capacitance–voltage hysteresis (∼10 mV), lower fixed charge density, and reduced equivalent oxide thickness compared to unannealed samples. [ABSTRACT FROM AUTHOR]

A molecular layer resist for HfO2 and ZrO2 atomic layer deposition (ALD) was demonstrated by using self-assembled monolayers (SAMs). X-ray photoelectron spectroscopy and transmission electron microscopy indicated that silicon samples terminated with octadecyltrichlorosilane (ODTS) were deactivated with respect to subsequent ALD of metal oxide gate dielectrics, under conditions in which standard chemical oxide passivated substrates are highly effective templates for ALD film growth. A time-dependent investigation of SAM formation showed that the efficiency of deactivation depends strongly on the quality of the SAMs, with a high-quality, closely packed ODTS film crucial for achieving complete blocking of the HfO2 and ZrO2 ALD process. [ABSTRACT FROM AUTHOR]

In this letter, we present the use of atomic layer deposition (ALD) for high-κ gate dielectric formation in Ge MOS devices. Different Ge surface cleaning methods prior to high-κ ALD have been evaluated together with the effects on inserting a Ge oxynitride (GeOxNy) interlayer between the high-κ layer and the Ge substrate. By incorporating a thin GeOxNy interlayer, we have demonstrated excellent MOS capacitors with very small capacitance-voltage hysteresis and low gate leakage. Physical characterization has also been done to further investigate the quality of the oxynitride interlayer. [ABSTRACT FROM AUTHOR]

High-k dielectric deposition processes for gate dielectric preparation on Si surfaces usually result in the unavoidable and uncontrolled formation of a thin interfacial oxide layer. Atomic layer deposition of ∼55-Å ZrO[sub 2] film on a Ge (100) substrate using ZrCl[sub 4] and H[sub 2]O at 300 °C was found to produce local epitaxial growth [(001) Ge//(001) ZrO[sub 2] and [100] Ge//[100] ZrO[sub 2]] without a distinct interfacial layer, unlike the situation observed when ZrO[sub 2] is deposited using the same method on Si. Relatively large lattice mismatch (∼10%) between ZrO[sub 2] and Ge produced a high areal density of interfacial misfit dislocations. Large hysteresis (>200 mV) and high frequency dispersion were observed in capacitance–voltage measurements due to the high density of interface states. However, a low leakage current density, comparable to values obtained on Si substrates, was observed with the same capacitance density regardless of the high defect density. © 2003 American Institute of Physics. [ABSTRACT FROM AUTHOR]

Single-crystal Ge nanowires are synthesized by a low-temperature (275 °C) chemical vapor deposition (CVD) method. Boron doped p-type GeNW field-effect transistors (FETs) with back-gates and thin SiO[sub 2] (10 nm) gate insulators are constructed. Hole mobility higher than 600 cm2/V s is observed in these devices, suggesting high quality and excellent electrical properties of as-grown Ge wires. In addition, integration of high-κ HfO[sub 2] (12 nm) gate dielectric into nanowire FETs with top-gates is accomplished with promising device characteristics obtained. The nanowire synthesis and device fabrication steps are all performed below 400 °C, opening a possibility of building three-dimensional electronics with CVD-derived Ge nanowires. © 2003 American Institute of Physics. [ABSTRACT FROM AUTHOR]

For sequential stacking of an Al2O3 passivation layer and a main HfO2 gate dielectric layer on In0.53Ga0.47As, we used single- and dual-temperature atomic-layer deposition processes, and systematically compared their effects on the dielectric-related electrical properties. When the deposition of Al2O3 passivation layer (approximately 0.7−0.8 nm) took place at relatively low temperatures of 100 °C, an increase in the subsequent deposition temperature for HfO2 (from 100 to 300 °C) assisted in decreasing both capacitance-equivalent oxide thickness and the number of bulk-related traps. However, the valuable reduction in both near-interface defect density and leakage current through the low-temperature Al2O3 passivation approach was monotonically lessened with an increase in the process temperature for the subsequent HfO2 deposition, which suggests the need for a careful optimization of a thermal budget for the dual-temperature process. [ABSTRACT FROM AUTHOR]

The relative activation energy () derived from a pulsed laser-induced crystallization of phase change materials (PCMs) was suggested as a useful quantitative parameter to represent the practical switching speed, energy consumption, and storage reliability of phase change random access memory (PRAM). We employed the time-for-constant-fraction technique using the reflectivity change of PCMs and the irradiated laser power/pulse width. Using the suggested method, the values for the Ge2Sb2Te5 (GST), Bi-doped GST (5.9 at%), and Sn-doped GST (17.7 at%) films were determined to be 6.34 × 10−9, 4.56 × 10−9, and 3.77 × 10−9 J, respectively, which reflected their expected device performances of PRAM. [ABSTRACT FROM AUTHOR]

The number of atomic layer deposition (ALD) cycles for ZnO treatment was changed to study its merits and demerits as a passivation layer prior to the deposition of a HfO2 film on a p-type In0.53Ga0.47As substrate. Even a few cycles of ZnO ALD treatment was effective in improving the capacitance–voltage (C–V) characteristics by suppressing strong Fermi-level pinning, which occurred because of a high interface state density near the lower half of the In0.53Ga0.47As band gap. Increases in the number of ZnO ALD cycles induced an increase in the minimum capacitance and response of minority carriers at higher frequencies in the inversion region of the C–V characteristics. According to various temperature- and frequency-dependent C–V analyses, these changes were explained by the shallow p-type doping effect of Zn atoms in the In0.53Ga0.47As substrate. As a disadvantage, ZnO ALD treatment caused a slight increase in the dielectric leakage current. [ABSTRACT FROM AUTHOR]

The effectiveness of trimethylaluminum (TMA) and tetrakis(dimethylamido)titanium (TDMAT) pretreatments on GaSb substrates were compared by examining the interfacial and capacitance–voltage (C–V) characteristics of Al2O3/p-type GaSb capacitors. In addition, for sample preparation, the temperature-dependent surface reactivity of GaSb was confirmed by examining the impact of the atomic layer deposition (ALD) loading temperature (stand-by temperature in air). An increase in the loading temperature from 65 to 150 °C in air ambient degraded the interfacial and C–V properties, which confirms the importance of the processing temperature for GaSb-based devices. Both in situ TMA and TDMAT pretreatments at 65 °C prior to the ALD of Al2O3 (150 °C) were effective in decreasing the amount of the interface oxide and the interface state density. While a similar degree of frequency dispersion in the C–V accumulation region was observed in the ALD-Al2O3/GaSb capacitor samples with and without TMA pretreatment, it largely increased for the TDMAT-pretreated sample, probably due to the formation of a Ti-oxide interlayer. [ABSTRACT FROM AUTHOR]

We explored the transfer of a single-layered graphene membrane assisted by substrate adhesion. A relatively larger adhesion force was measured on the SiO2 substrate compared with its van der Waals contribution, which is expected to result from the additional contribution of the chemical bonding force. Density functional theory calculations verified that the strong adhesion force was indeed accompanied by chemical bonding. The transfer of single-layered graphene and subsequent deposition of the dielectric layer were best performed on the SiO2 substrate exhibiting a larger adhesion force. This study suggests the selection and/or modification of the underlying substrate for proper transfer of graphene as well as other 2D materials similar to graphene. [ABSTRACT FROM AUTHOR]

Atomic layer deposition is used to convert an (NH4)2S cleaned p-In0.53Ga0.47As with diethylzinc (DEZ) and water, resulting in the formation of a ZnO/ZnS interfacial passivation layer (IPL). The process is studied using in-situ X-ray photoelectron spectroscopy. DEZ reacts with sulfur and oxygen present on the surface, chemically reducing arsenic 3+ and gallium 3+ to lower oxidation states. The sulfur concentration remains constant during the deposition process while the oxygen concentration on the surface remains small, confirming that the IPL is composed of both ZnO and ZnS. Measurements of metal–oxide–semiconductor capacitors with HfO2 for the dielectric show that the ZnO/ZnS IPL can nearly eliminate frequency dispersion (<1% per frequency decade) in accumulation and results in small hysteresis (<60 mV) with a Dit in the 1011 eV−1 cm−2 range in the midgap. Frequency dispersion is observed in the depletion region and is attributed to minority carrier generation from the ZnO present in the IPL. [ABSTRACT FROM AUTHOR]

In this study, benzenethiol ligands were applied to the surface of CdSe@ZnS core@shell quantum dots (QDs) and their effect on the performance of quantum dot light-emitting diodes (QD-LEDs) was investigated. Conventional long-chained oleic acid (OA) and trioctylphosphine (TOP) capping ligands were partially replaced by short-chained benzenethiol ligands in order to increase the stability of QDs during purification and also improve the electroluminescence performance of QD-LEDs. The quantum yield of the QD solution was increased from 41% to 84% by the benzenethiol ligand exchange. The mobility of the QD films with benzenethiol ligands approximately doubled to 2.42 × 10−5 cm2 V−1 s−1 from 1.19 × 10−5 cm2 V−1 s−1 compared to the device consisting of OA/TOP-capped QDs, and an approximately 1.8-fold improvement was achieved over QD-LEDs fabricated with bezenethiol ligand-exchanged QDs with respect to the maximum luminance and current efficiency. The turn-on voltage decreased by about −0.6 V through shifting the energy level of the QDs with benzenethiol ligands compared to conventional OA and TOP ligands. [ABSTRACT FROM AUTHOR]

Amorphous Ti1−xAlxOy films in the Ti-oxide-rich regime (x  <  0.5) were deposited on p-type GaAs via atomic layer deposition with titanium isopropoxide, trimethylaluminum, and H2O precursor chemistry. The electrical properties and energy band alignments were examined for the resulting materials with their underlying substrates, and significant frequency dispersion was observed in the accumulation region of the Ti-oxide-rich Ti1−xAlxOy films. Although a further reduction in the frequency dispersion and leakage current (under gate electron injection) could be somewhat achieved through a greater addition of Al-oxide in the Ti1−xAlxOy film, the simultaneous decrease in the dielectric constant proved problematic in finding an optimal composition for application as a gate dielectric on GaAs. The spectroscopic band alignment measurements of the Ti-oxide-rich Ti1−xAlxOy films indicated that the band gaps had a rather slow increase with the addition of Al-oxide, which was primarily compensated for by an increase in the valance band offset, while a nearly-constant conduction band offset with a negative electron barrier height was maintained. [ABSTRACT FROM AUTHOR]

We report the effect of indium (In) doping on the electrical performance of a ZnO nanocrystal-based field-effect transistor of side-gate structure, which was fabricated incorporating a high-capacitance ion gel gate dielectric. Undoped and In-doped ZnO channel layers were formed by spin-coating solutions of dispersed ZnO nanocrystals that included different amounts of In-containing precursor solution. Continuous increase in the amount of In doping solution induced close packing of ZnO nanocrystals with suppressed grain growth and increased carrier concentration, which resulted in the improvement of transistor performance. However, after the optimal In doping level was reached, a slight decrease in channel conductivity was observed, probably due to In-induced scattering and/or the generation of microcracks. [ABSTRACT FROM AUTHOR]

This study examined the performance of poly(3-hexylthiophene-2,5-diyl)(P3HT)- and [6,6]-phenyl C61 butyric acid methyl ester (PCBM)-based organic solar cells (OSCs) with a pyromellitic dianhydride (PMDA) cathode interfacial layer between the active layer and cathode. The effect of inserting the cathode interfacial layer with different thicknesses was investigated. For the OSC samples with a 0.5 nm thick PMDA layer, the power conversion efficiency (PCE) was approximately 2.77% under 100 mW/cm2 (AM1.5) simulated illumination. It was suggested that the PMDA cathode interfacial layer acts as an exciton blocking layer, leading to an enhancement of the OSC performance. [ABSTRACT FROM AUTHOR]

This study examined the degradation of the device performance of InGaZnO4 (IGZO)-based thin-film transistors after annealing at high temperatures in air ambient. Using various characterization methods including scanning electron microscopy, x-ray diffraction, and transmission electron microscopy, we were able to disclose the details of a two-stage phase transformation that led to the device performance degradation. The Mo electrodes first succumbed to oxidation at moderate temperatures (400~500 °C) and then the Mo oxide further reacted with IGZO to produce an In-Mo-O compound with some Ga at higher temperatures (600~700 °C). We analyzed our results based on the thermodynamics and kinetics data available in the literature and confirmed that our findings are in agreement with the experimental results. [ABSTRACT FROM AUTHOR]

Rapid thermal annealing (RTA) processing under N2 and O2 ambient is suggested and characterized in this work for improvement of SiCOH ultra-low-k (k = 2.4) film properties. Low-k film was deposited by plasma-enhanced chemical vapor deposition (PECVD) with decamethylcyclopentasiloxane and cyclohexane precursors. The PECVD films were treated by RTA processing in N2 and O2 environments at 550 °C for 5 min, and k values of 1.85 and 2.15 were achieved in N2 and O2 environments, respectively. Changes in the k value were correlated with the chemical composition of C-Hx and Si-O related groups determined from the Fourier transform infrared (FTIR) analysis. As the treatment temperature was increased from 300 to 550 °C, the signal intensities of both the CHx and Si-CH3 peaks were markedly decreased. The hardness and modulus of the film processed by RTA have been determined as 0.44 and 3.95 GPa, respectively. Hardness and modulus of RTA-treated films were correlated with D-group [O2Si-(CH3) 2] and T-group [O3Si-(CH3)] fractions determined from the FTIR Si-CH3 bending peak. The hardness and modulus improvement in this work is attributed to the increase of oxygen content in (O)x-Si-(CH3)y by rearrangement. [ABSTRACT FROM AUTHOR]