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253. High performance gate first HfSiON dielectric satisfying 45nm node requirements

268. Experimental Study of Etched Back Thermal Oxide for Optimization of the Si/High-k Interface

270. A mechanically enhanced storage node for virtually unlimited height (MESH) capacitor aiming at sub 70nm DRAMs

281. W/HfO2 gate stacks with Tinv~1.2nm and low charge trapping

282. High performance CMOS devices on SOI for 90 nm technology enhanced by RSD (raised source/drain) and thermal cycle/spacer engineering

284. Strained Si MOSFETs on SiGe-on-Insulator (SGOI) for High Performance CMOS Technology

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