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The effect of carboxymethyl cellulose (CMC) swelling on the stability and chemical properties of a natural graphite suspension in an aqueous medium was investigated. Suspensions prepared at different pH were characterized according to swelling behavior, rheology, green microstructural observation, and measurement of the pore size. A correlation was found between dispersion stability and electrochemical performance. It was found that the swelling of CMC was a critical factor influencing the stability of graphite suspensions. This was evidenced by observations of the green microstructures and changes noted in sedimentation behaviors. Electrochemical experiments using a Li/organic electrolyte/natural graphite anode half-cell and 750 mAh-class lithium ion cells exhibited an initial discharge capacity above 340 mAh g−1 and an improved charge-discharge efficiency.

We have revealed a strain relaxation mechanism for strained Si grown on a relaxed SiGe-on-insulator structure fabricated by the bonding, dislocation sink, or condensation method. Strain relaxation for both the bonding and dislocation sink methods was achieved by grading the Ge concentration; in contrast, the relaxation for the condensation method was achieved through Ge atom condensation during oxidation. In addition, we estimated the surface roughness and threading-dislocation pit density for relaxed SiGe layer fabricated by the bonding, dislocation sink, or condensation method. The surface roughness and threading-dislocation pit density for the bonding, dislocation sink, and condensation methods were 2.45, 0.46, and 0.40 nm and 5.0 × 103, 9 × 103, and 0, respectively. In terms of quality and cost-effectiveness, the condensation method was superior to the bonding and dislocation sink methods for forming strained Si on a relaxed SiGe-on-insulator structure.

We investigated the gettering efficiency of iron and nickel in Czochralski (CZ) silicon wafers depending on crystalline nature such as interstitial-silicon-dominant or vacancy-dominant crystal growth. After a typical heat treatment for dynamic random access memories (DRAMs), the density of silicon oxide precipitates in the vacancy-dominant crystal regions was approximately two orders higher than interstitial-silicon-dominant crystal regions. After a DRAM heat treatment, irons were preferably gathered at vacancy-dominant crystal region while nickels were selectively at only an interstitial-silicon-dominant crystal region. Silicon wafers designed with extreme gettering ability via rapid thermal annealing (RTA) at 1150 °C for 10 s using NH 3 and Ar gas mixture produced the “M” shape of oxygen precipitates in which the peak density of the precipitates was in the range of ∼3 × 10 10 cm −3 while the bulk density was in the range of ∼2 × 10 9 cm −3 . The RTA silicon wafer completely eliminated irons and nickels from the wafer surface that are gathered at oxygen precipitates in silicon bulk during a DRAM heat treatment.

The effect of the calcination process for cerium carbonate, a precursor of ceria, on the degree of synthesis and colloidal properties of ceria particles in aqueous media, which greatly influence shallow trench isolation (STI) chemical mechanical planarization (CMP) performance, was investigated. A two-step calcination process, consisting of decarbonation and crystal growth, resulted in a higher degree of synthesis for the same crystal size, a narrower particle size distribution, and better dispersion of the ceria particles, than conventional one-step calcination. These properties enhanced certain aspects of STI CMP performance, leading to a higher oxide removal rate, a better selectivity between oxide and nitride, and fewer defects, including remaining particles.

The dependencies of the non-Prestonian behavior of ceria slurry with anionic surfactant on the size and concentration of abrasive particles were investigated by performing chemical mechanical polishing (CMP) experiments using blanket wafers. We found that not only the abrasive size but also the abrasive concentration with surfactant addition influences the non-Prestonian behavior. Such behavior is clearly exhibited with small abrasive sizes and a higher concentrations of abrasives with surfactant addition, because the abrasive particles can locally contact the film surface more effectively with applied pressure. We introduce a factor to quantify these relations with the non-Prestonian behavior of a slurry. For ceria slurry, this non-Prestonian factor, βNP, was determined to be almost independent of the abrasive concentration for a larger size and a smaller weight conentration of abrasive particles, but it increased with the surfactant concentration for a smaller size and a higher concentration of abrasives with surfactant addition.

The influence of the molecular weight of poly(acrylic acid) (PAA) on chemical mechanical planarization (CMP) for shallow trench isolation (STI) was investigated. The adsorption behaviors of PAA as a function of molecular weight on deposited plasma-enhanced tetraethylorthosilicate and chemical vapor deposition Si3N4 films were analyzed by the force measurement using atomic force microscopy (AFM). The AFM results revealed that the affinity of PAA with the nitride film is higher than the affinity with the oxide film, and thus a denser adsorption layer on the nitride film is formed with higher molecular weight of PAA, which leads to higher selectivity in STI CMP. Additionally, to determine the correlation between the dispersion stability of the CeO2 resulting from the presence of PAA with different molecular weight and CMP performance, the colloidal properties of the slurry as a function of the molecular weight of PAA were examined.

The current challenging issues for terra-bit-level perpendicular STT-MRAM cells have been reviewed in the view of four critical parameters such as TMR ratio, Δ, J ex , and α. The TMR ratio of p-MTJ spin-valves are reaching to 350°C. A single MgO based p- MTJ spin-valve could not satisfy Δ of > 74, proposing a double MgO based p-MTJ spin-valve. J ex in SyAF layer adequately met > 0.7erg/cm2 at BEOL of > 350°C. A Co 2 Fe 6 B 2 based p-MTJ spin-valve limits to a of 0.005, necessary to develop a low α material such as full Heusler half-metal. Thus, an essential challenge in the future is to satisfy four critical parameters simultaneously at > 350°C and 300-mm TiN electrode wafers.

The reverse selectivity of nanosized ceria slurry for the damascene gate chemical mechanical planarization (CMP) process has been investigated. The relationship between the electrokinetic behaviors of abrasive ceria particles and the plasma-enhanced tetraethylorthosilicate (PETEOS), and CVD Si3N4 films in an aqueous medium were observed to determine the reverse selectivity performance in the CMP process. The surface potentials of abrasive and PETEOS/CVD Si3N4 films were found to have different surface charges in certain pH regions and these differences were found to be key parameters in the selective removal performance of damascene gate CMP process. The ceria slurry with polymeric additives showed reverse selectivity with a low PETEOS removal rate and a high CVD Si3N4 film removal rate.

By considering the physical characteristics of ceria particles, the factors affecting the chemical mechanical planarization (CMP) performance for shallow trench isolation (STI) were investigated. Ceria powders were synthesized by calcination at temperatures of 400, 600, 700, 800, and 900°C. The influence of the calcination temperature on the physical characteristics, such as the crystallinity, grain size, porosity, morphology and high-resolution lattice images of the ceria particles, were investigated, and a correlation between the physical characteristics and the electrokinetic behaviors of the ceria particles in aqueous suspending media was also investigated to identify the relationship with CMP performance. Grain size increased with calcination temperature, as did the removal rate of plasma-enhanced tetraethylorthosilicate (PETEOS) film with slurries including these particles. The results indicate that the grain size of ceria particles is one of the key parameters controlling the removal rate and uniformity of PETEOS film.

The interactions between buried defects and impurities formed by MeV-level nitrogen ion implantation in silicon have been investigated. The interactions between the oxygen atoms in a CZ Si wafer and the defects introduced during annealing after implantation are discussed in terms of the amount, nature, morphology, and depth distribution of the defects. Oxygen atoms are found to be gettered in two different regions in the implanted layers. A shallow oxygen peak appears in regions near the surface (between 0.5 and 1.5 µm). A deep oxygen peak is also observed at locations with secondary defects, which mainly consist of elongated dislocation loops and dislocation networks. In this case, the gettered oxygen content is not especially influenced by the amount or nature of the generated defects. Rather, there is a good correlation between the gettered oxygen amount and the mismatch stress induced by the atomic radius difference.

Surface defects and bulk defects on SOI wafers are studied. Two new metrologies have been proposed to characterize surface and bulk defects in epitaxial layer transfer (ELTRAN) wafers. They included the following: i) laser scattering particle counter and coordinated atomic force microscopy (AFM) and Cu-decoration for defect isolation and ii) cross-sectional transmission electron microscope (TEM) foil preparation using focused ion beam (FIB) and TEM investigation for defect morphology observation. The size of defect is 7.29 urn by AFM analysis, the density of defect is 0.36 /cm at as-direct surface oxide defect (DSOD), 2.52 /cm at ox-DSOD. A hole was formed locally without either the silicon or the buried oxide layer (Square Defect) in surface defect. Most of surface defects in ELTRAN wafers originate from particle on the porous silicon.

The nanotopography of the surface of silicon wafers has become an important issue in ULSI device manufacturing, as it affects the post–chemical mechanical polishing (post-CMP) uniformity of the thickness deviation of dielectric films. A spectral method is proposed to examine quantitatively how the nanotopography impacts the film thickness deviation during CMP. The nanotopography impact was investigated in terms of its dependence on the characteristics of consumables, such as the polishing pad hardness and the wafer manufacturing method. In addition, the effects of the surfactant and the abrasive size in ceria slurry on nanotopography impact were investigated. It was found that the magnitude of the post-CMP oxide thickness deviation due to nanotopography increased with the surfactant concentration in the case of smaller abrasives but was almost independent of the concentration in the case of larger abrasives. These results demonstrate that the nanotopography impact can be controlled by manipulating the slurry characteristics.

In a ceria slurry with an ionic surfactant, the grain size and particle size of the poly-crystalline abrasives were controlled independently by changing the calcination temperature and the mechanical milling time, respectively, during abrasive synthesis. A chemical mechanical polishing (CMP) experiment using the slurry showed that the oxide removal rate increased with both the grain size and the abrasive particle size, while the nitride removal rate was independent of both. On the other hand, examination of the nanotopography impact showed that the planarization efficiency increased with decreasing abrasive size but was independent of the grain size.

We investigated the nanotopography impact on the post-chemical mechanical polishing (post-CMP) oxide thickness deviation (OTD) and the non-Prestonian behavior of ceria slurry with a surfactant. Not only the surfactant but also the slurry abrasive size influenced the non-Prestonian behavior and the nanotopography impact. We created a one-dimensional numerical simulation of the nanotopography impact by taking account of the non-Prestonian behavior of the slurry, and good agreement with the experimental results was obtained. After examining the mechanism of oxide surface planarization during CMP, an index to relate the non-Prestonian behavior of the slurry to the nanotopography impact was developed.

We used a blank chemical mechanical polishing (CMP) test to examine the dependence of nanotopography impact on surfactant concentration in three ceria slurries differing in abrasive size. We found that the magnitude of film thickness variation after CMP increased with the surfactant concentration in case of the smaller abrasives but for the case of larger abrasive was almost independent of the surfactant concentration. This result was explained with a model based on the passivation layer of the surfactant adsorbed on the oxide film surfaces during polishing.

Through a chemical mechanical polishing (CMP) test using oxide and nitride blanket film wafers, we investigated the effect of adding an anionic surfactant to a ceria slurry, especially at very dilute concentrations (less than 0.2 wt%). The removal rate trend, which decreases with increasing surfactant concentration, was compared with the variation in the electrokinetic behavior of the ceria abrasives dispersed in the slurry. The removal rate transition did not coincide with the changes in the zeta potential or the secondary particle size distribution of the abrasives. This suggests that the electrostatic effect is not the dominant factor in the removal rate with ceria slurry. It is also found that abrasive size influences removal rate trend versus surfactant concentration, and that oxide removal follows Preston's law but nitride removal shows non-Prestonian behavior. To explain the result qualitatively, we have proposed a hydrodynamic model in which a particle travels through the viscous fluid and approaches the film surface.

The effects of the electrokinetic behavior of abrasive ceria particles suspended in an aqueous medium and the deposited plasma-enhanced tetraethylorthosilicate (PETEOS) and chemical vapor deposition (CVD) Si3N4 films on chemical mechanical planarization (CMP) for shallow trench isolation were investigated. The colloidal characteristics of ceria slurries, such as their stability and surface potential, in acidic, neutral, and alkaline suspensions were examined to determine the correlation between the colloidal properties of ceria slurry and CMP performance. The surface potentials of the ceria particles and the PETEOS and CVD Si3N4 films in an aqueous suspending medium were dependent on the pH of the suspending medium. The differences in surface charges of ceria particles and the PETEOS and CVD Si3N4 films have a profound effect on the removal rate and oxide-to-nitride selectivity of CMP performance.

The gettering efficiency of both iron and nickel in a Czochralski silicon wafer strongly depends on the crystal nature, i.e. an interstitial silicon dominant crystal or a vacancy dominant crystal. After heat treatment of dynamic random access memory, iron is mainly precipitated in the vacancy dominant crystal region rather than the interstitial silicon dominant crystal region, since the density of silicon oxide precipitate in the vacancy dominant crystal region is approximately two orders higher than that in the interstitial silicon dominant crystal region. This indicates that the mechanism of iron gettering is associated with relaxation gettering by silicon oxide precipitates. Otherwise, nickel silicides at the wafer surface are dominantly produced in the interstitial silicon crystal region, while nickel is chiefly precipitated at silicon oxide precipitates in the vacancy dominant crystal region. Also, this result demonstrates that the mechanism of nickel gettering is associated with relaxation gettering by silicon oxide precipitates, since silicon oxide precipitates are virtually not produced in the interstitial silicon dominant crystal region. A super silicon wafer designed for proximity gettering by silicon oxide precipitates shows a superior gettering efficiency for iron and nickel via the elimination of the memorized crystal nature.

Ceria powders were synthesized by two different methods, solid-state displacement reaction and wet chemical precipitation, and the influence of the physical characteristics of cerium oxide on the removal rate of plasma-enhanced tetraethylorthosilicate (PETEOS) and chemical vapor deposition (CVD) nitride films in chemical mechanical planarization (CMP) was investigated. The fundamental physicochemical property and electrokinetic behavior of ceria particles in aqueous suspending media were investigated to identify the correlation between the colloidal property of ceria and the CMP performance. The surface potentials of two different ceria particles are found to have different isoelectric point (pHiep) values and differences in physical properties of ceria particles such as porosity and density were found to be the key parameters in CMP of PETEOS films. Ceria powders synthesized by the solid-state displacement reaction method yielded a higher removal rate of PETEOS and higher selectivity than powders synthesized by the wet chemical precipitation method.

To reveal the mechanism behind the high oxide-to-nitride removal selectivity of ceria slurry in shallow trench isolation (STI) chemical mechanical polishing (CMP), we examined the effects of the abrasive morphology and the concentration of surfactant added to control the selectivity. A slurry with small abrasives showed a more drastic drop in the oxide removal rate as the surfactant concentration increased, compared to a slurry with large abrasives. For the nitride removal rate, however, both slurries showed the same trend. These results can be qualitatively explained from the movement of abrasives though the layer of surfactant adsorbed on the film surface.

Single-side-polished (SSP) wafers prepared using six different methods were examined following unpatterned oxide chemical mechanical polishing (CMP). We found a clear and positive correlation between the standard deviation of the nanotopography profile and that of the film thickness variation after unpatterned oxide CMP. Our power spectral density (PSD) analysis of the profiles quantitatively demonstrated how the nanotopography of the different wafers affected the film thickness variation. We also confirmed that the wafers prepared with an improved SSP technique showed small film thickness variation after unpatterned oxide CMP, indicating that the nanotopography had less impact on the film thickness.

Recently, perpendicular-spin-transfer torque magnetic random access memory (p-STT MRAM) has received considerable attention as the next-generation memory referred from its pre-eminent characteristics. It has high speed writing and reading property like dynamic random access memory (DRAM) with an additional property of non-volatility. Furthermore, it also has stable endurance (> 1014), less electric energy consumption to maintain its data (~1 pJ/bit) and high scalability. Because of these properties, p-STT MRAM has been considered to be the universal memory that can replace other memories in the market. However, it is difficult to be commercialized due to many critical issues of device parameters i.e., the tunneling magnetoresistance (TMR) ratio, thermal stability (Δ), and switching current density (JC). In particular, theses three device parameters should be achieved at 400oC temperature of the back-end of line (BEOL) to be manufactured into the market. To gain a reputation as a non-volatile memory at the market, p-STT MRAM needed low switching current density for low-power operating device. In our research, we investigated new MTJ structure using single MgO based double Co2Fe6B2free layers separated by a W spacer layer (See Fig.1) for low current switching. Samples were made by utilizing 12-inch multi-chamber magnetron sputtering system and magnetic vacuum oven. After sputtering process, samples were ex-situ annealed at 350 or 400oC under a perpendicular magnetic field of 3T for 30 minutes. Figure 2 shows the switching voltage of anti-parallel state to parallel state (AP-P) and parallel state to anti-parallel state (P-AP) on I-V measurement. The switching voltage of AP-P and P-AP at newly double free layer decreased about 3.8 and 5.2% respectively, compared with the conventional free layer. This means that upper Co2Fe6B2 free layer had an influence for the lower Co2Fe6B2 free layer, therefor the lower Co2Fe6B2free-layer easily switched to perpendicular direction by in-plane magnetic anisotropy (IMA) magnetic resonance coupling. In our presentation, we will present the switching property of Co2Fe6B2 double free layer for p-MTJs and review the switching mechanism for IMA magnetic resonance coupling by using IV measurement. In addition, we review the magnetic properties, atomic composition and TMR ratio, by using vibrating-sampling-magnetometer (VSM), Secondary-Ion-Mass-Spectrometry (SIMS), current-in–plane-tunneling (CIPT) measurement respectively. * This work was supported by a Basic Science Research Program grant from the National Research Foundation of Korea (NRF) funded by the Korean government (MSIP) (No. 2014R1A2A1A01006474) and the Brain Korea 21 PLUS Program in 2014. Figure 1

In recent years, free-standing gallium nitride (FS-GaN) wafers were researched due to high demand for power device, high brightness LED (HB-LED) and laser diode (LD). The GaN wafers grown by hydride vapor phase epitaxy (HVPE) have been used for the substrate of power device, HB-LED and LD because they demonstrated lower dislocation density (DD) than that of GaN wafers grown by metal-organic chemical vapor deposition (MOCVD). However, they still have residual stress and wafer bow, which lower the device productivity in mass production. To overcome these issues, the control of crystallographic quality and wafer bow are the key technologies. The crystallographic quality of the GaN wafer is mostly determined at the growth process. The bow of the wafer is determined by the difference in thermal expansion coefficient (TEC) between sapphire substrate and GaN, and it can be controlled at the wafering process. In this study, therefore, we investigated how the bow of the FS-GaN wafer is changed during wafering process. In particular, the effect of the abrasive size on the damaged layer thickness during lapping process was investigated and residual stress was calculated theoretically. Two inch GaN wafers were fabricated on (0001) sapphire substrates by HVPE and separated by the laser lift-off (LLO) process. The bow of as-grown GaN wafer after LLO process was ranged from -300 to -100 um, which was determined by the residual thermal stress. The GaN wafer bow is changed during the wafering process, especially the lapping process. From the Stoney’s formula, it is notable that the thickness of substrate (tS) and sub-surface damaged layer (tSSD) can change the wafer bow. Fig. 1 shows the wafer bow (black triangle), residual stress (blue square) of experimented GaN wafer and wafer bow calculated by the Stoney’s formula (red triangle). It was confirmed that the wafer bow was reduced as the thickness of GaN wafer reduced. In particular, the bow was inverted from concave to convex at the thickness of around 180 um. As the lapping process progressed, tS is reduced and tSSD is generated, which led to the change of bow to convex. Fig. 2 shows the sub-surface damaged layer of the GaN wafer after lapping with 2-um diamond abrasives. It exhibits that the crystalline GaN layer was damaged by the diamond abrasives and changed to polycrystalline phase at the top surface. In addition, it indicates that the microcracks propagated into the wafer under the polycrystalline layer. Total thickness of polycrystalline layer and microcracks, tSSD, was around 1.09 um. Thus, the tSSD should be removed for achieving the damage-free GaN wafer. In our presentation, we report how we achieved zero-bow FS-GaN wafer shown in Fig. 3, and how to control residual stress and optimize wafering process. * This work was financially supported by the Brain Korea 21 Plus Program in 2017. Figure 1

Resistive random access memories (ReRAMs) have been researched to replace current NAND flash memory due to non-volatile memory characteristics, low power consumption, high operation speed, and minimum 4F2 memory cell size[1]. However, to achieve high density of tera-bit level cells, it is needed to operate ReRAM cells with cross-point array structure which required selection device to limit the sneak current path in high-density ReRAM cells. Therefore, recently bi-directional selection devices with two-terminal structure such as ovonic threshold switching (OTS)[2], p-n-p type (PNP)[3], and mixed ionic electronic conduction (MIEC)[4] have been researched to suppress the sneak current path. In this work, we investigated the electrical features of the selection device with Cu-doped chalcogenide material to attain high non-linearity(>105), high on-state current(Ion )(>10 MA/cm2) and low off-state current(Ioff )(2) because Cu ions moved well by E-field and generated interstitials/vacancies acting as dopants. We fabricated the selection device of the structure of W / Cu-doped chalcogenide material / Pt by varying the pattern size of ranging 34 to 1,921 nm as shown in Fig.1. The device performance of Ion , Ioff , threshold voltage(VT ), and non-linearity(Ion @Von/Ioff @1/2Von ) was characterized. The Cu-doped chalcogenide material layer was deposited by RF magnetron co-sputtering on W bottom electrode patterned by photo lithography process. Then, Pt top electrode was deposited by DC magnetron sputtering. The selection device with Cu-doped chalcogenide material demonstrated threshold voltage of ~1.0 V, low Ioff of < 3.66 mA/cm2, Ion of > 1.82 A/cm2, and non-linearity of > 500 as shown in Fig.2. Finally, we present how the device performance is affected by varying the film thickness, annealing temperature, device size and stack-layer structure. In addition, the uniformity and the reliability of the selection device such as endurance cycling and retention time were investigated. In particular, the mechanism on operating behavior of the selection device will be presented by analyzing the composition and crystallinity of Cu-doped chalcogenide film by using Auger, energy-dispersive X-ray spectroscopy (EDS), cross sectional transmission electron microscopy (TEM) and X-ray diffraction (XRD). *This work was financially supported by the Ministry of Trade, Industry & Energy(MOTIE, Korea) under Industrial Technology Innovation Program (10068055), the Brain Korea 21 Plus 2016, Republic of Korea and Hanyang University-Samsung Electronics selector research project. Reference [1] Choi, B. J et al., Advanced Materials 23, 3847-3852 (2011). [2] S. Kim et al., VLSI, T240 (2013) [3] S. Jo et al., IEDM, 6.7.1 (2014) [4] G. Burr et al., VLSI, p41 (2012) Figure 1

Recently, the semiconductor memory device has faced the difficulties of scaling down, low power consumption and high retention time. In particular, dynamic random access memory (DRAM) has been struggling with scaling limit because of reducing capacitor area. In addition, alternative memories have been studied intensively to replace DRAM. Among them, perpendicular spin transfer torque magnetic random access memory (STT-MRAM) is considered as a strong candidate because of the small scaling down, low power consumption, high read and write speed and non-volatility. STT-MRAM has the structure of 1 transistor and 1 resistance (1T-1R) called magnetic tunnel junction (MTJ). Resistance difference between parallel and antiparallel states in MTJ indicates memory sensing margin. The large difference of tunneling magneto-resistance (TMR) is required for a good memory operation. To obtain the high TMR ratio, not only perfect switching of the free layer but also hard pinning of the pinned layer is required. It is known that pinning the pinned layer is due to the exchange coupling induced by a synthetic anti-ferro-magnetic (SyAF) layer based on Ruderman Kittel Kasuya Yosida (RKKY) interaction. In our study, therefore, we investigated how to optimize the SyAF layer structure for the proper exchange coupling. MgO tunnel barrier should be b.c.c (100) crystallinity because it acts as an electrons filter which determined whether spin direction between free and pinned layers is aligned parallel or not. In particular, we propose double MgO based perpendicular magnetic-tunnel-junction spin-valve without upper synthetic-anti-ferromagnetic Multi-layers in order to obtain high TMR ratio. In addition, we investigated the different characteristics of the p-MTJ spin-valve with and without upper SyAF multi-layers. For the experiment, two structures, double MgO based p-MTJ spin-valve with and without upper SyAF multi-layers, were fabricated on a 12-inch-diameter wafer deposited with SiO2/W/TiN films in a 12-inch multi-chamber sputtering system under a high vacuum of less than 1ⅹ10-8 torr (without breaking the vacuum; see Figs. 1a and b). The thicknesses of the tungsten (W) were varied ranging from 0.18 to 0.48 nm. All samples were subject to ex-situ annealing at 350oC for 30 min under a perpendicular magnetic field of 3 Tesla. The dependence of the TMR ratio on the thickness of W bridge layer was estimated by using current-in-plane tunneling (CIPT) at room temperature as shown in Fig.1c. It shows that a TMR ratio of p-MTJ spin-valve with upper SyAF multi-layers slightly increases at the bridge layer thickness, t w up to around 0.3 nm. Then it abruptly decreases when the thickness was increased from 0.36 to 0.5 nm. On the other hand, the TMR ratio of p-MTJ spin-valve without upper SyAF multi-layer increases at the t w up to around 0.24 m. Then, the TMR ratio abruptly decreases when the thickness was increased from 0.36 to 0.4 nm. And maximum TMR ratio of p-MTJ spin-valve with upper SyAF multi-layers is 156 % while, that of p-MTJ spin-valve without upper SyAF multi-layers is 180 %. Obviously, the TMR ratio of p-MTJ spin-valve without upper SyAF multi-layers is higher 24 % than p-MTJ spin-valve wih upper SyAF multi-layers. In our presentation, we report the different characteristics of the p-MTJ spin-valve with and without upper SyAF multi-layers by examining the static magnetization behavior, MgO crystallinity, and I-V characteristic curve. In addition, we present how these properties influence the TMR ratio and mechanism of p-MTJ spin-valve. * This work was supported by a Basic Science Research Program grant from the National Research Foundation of Korea (NRF) funded by the Korean government (MSIP) (No. 2014R1A2A1A01006474) and the Brain Korea 21 PLUS Program in 2014. Figure 1

Resistive random access memory (ReRAM) is one of the candidates to alternate NAND flash memory due to its potential scalability, fast switching speed and low operating power [1]. However, for ReRAM in general, high-voltage forming process is needed to initiate the switching, which normally lead to high power consumption and operational complexity [2]. Therefore, the forming-free operation of ReRAM has been researched globally. In this work, to overcome this high voltage forming operation, the effect of Cu-doping on switching layer of amorphous carbon-oxide ReRAM was studied. ReRAM was fabricated with the structure of tungsten (W) / Cu-doped amorphous carbon oxide / hafnium oxide (HfO2) / platinum (Pt). The buffer layer, hafnium oxide, was inserted to decrease the current level increased excessively due to Cu-doping. It was confirmed that Cu-doping decreased forming voltage and increased memory margin. As comparing the characteristics of the ReRAM with and without Cu-doping at 34-nm pattern size, the forming voltage of Cu-doped ReRAM decreased from 2.7 to 1.95 V and also set voltage of that decreased a little from 1.8 to 1.65 V. From I-V characteristic graph, Cu-doped ReRAM demonstrated that the forming voltage was similar to the set voltage, indicating for the possibility of forming free operation. In addition, the memory margin of that was enlarged from 1.62×102 to 2.64×103. Besides, both of the devices had 106AC endurance cycles, which were excellent performance compared with other ReRAM devices. In our presentation, we report the effect of Cu-doping on electrical characteristics and the switching mechanism by using various analysis tools such as transmission electron microscopy (TEM). * This material is based upon work supported by the Ministry of Trade, Industry & Energy (MOTIE, Korea) under Industrial Technology Innovation Program (10068055). [1] Li Ji; Integrated one diode-one resister architecture in nanopillar SiOxresistive switching memory by nanosphere lithography. Nano Lett. 2014, 14, 813-818 [2] Ruomeng Huang; Forming-free resistive switching of tunable ZnO films grown by atomic layer deposition. Microelectron. Eng. 2016, 161, 7-12 Figure 1

The conventional silicon based photo diodes have high photoelectric conversion efficiency and photosensitivity. However, inorganic based photo diodes have a low visible-wavelength sensitivity due to their infrared-wavelength absorption. Recently, organic based photo diodes (OPDs) have been greatly attracted due to their flexibility, a low production cost, and a high photosensitivity in visible wavelength ranges.[1, 2] In this work, we investigated the effect of inserting inorganic interlayer between metal electrode and organic layers in order to enhance photosensitivity of OPDs. The device structure was consist of vertically stacted bottom indium-tin-oxide (ITO) electrode/bottom inorganic interlayer (NiOx)/organic layer (DMQA:Me-PTC)/top inorganic interlayer (MoOx)/top aluminum electrode on a glass substrate. The bottom NiOx inorganic interlayer was inserted between bottom ITO electrode and DMQA:Me-PTC photo-organic layer and its thickness was varied from 1 to 5 nm. It was found that the highest photocurrent/dark current ratio of OPDs was 1.34 x 104 at 4-nm-thick NiOx. In addition, the top MoOx:Al (1:1) inorganic interlayer was inserted between top aluminum electorde and DMQA:Me-PTC photo-organic layer and its thickness was varied from 1 to 3 nm. It was also observed that the highest photocurrent/dark current ratio was 4.51 x 104 at 2-nm-thick MoOx:Al. In our presentation, we will present the mechanism by which the photosensitivity is enhanced by varying inserted inorganic interlayer (NiOx or MoOx) via investigating the dependency of energy band gap on the inserted inorganic interlayer thickness and that of the chemical composition profiles of OPDs. * This work was financially supported by LG Electronics Inc. and Brain Korea 21 Plus Program in 2017. [1] Baeg, K.-J., Binda, M., Natali, D., Caironi, M. & Noh, Y.-Y. Organic light detectors: photodiodes and phototransistors. Adv. Mater. 25, 4267–4295 (2013). [2] Yao, Y. et al. Plastic near-infrared photodetectors utilizing low band gap polymer. Adv. Mater. 19, 3979–3983 (2007) Figure 1

Resistive random access memories (ReRAM) are highly promising as one of next-generation memories due to high current density, high speed, simple structure, and low power consumption [1]. Recently, amorphous carbon oxide based ReRAM has been researched due to its strong advantages over typical ReRAM chacacteristics such as large memory margin (Ion/Ioff > 100), high switching speed (20~50ns) and CMOS compatible process. In this work, we present the electrical features of amorphous carbon oxide, working as a resistive switching layer [2], where tunsten (W) / amorphous carbon oxide / platinum (Pt) configuration with the pattern size of ranging 34 to 1,921 nm. The thickness of carbon oxide, O2 flow rate of RF magnetron sputter, and N2-annealing temperature were varied with the device cell size to optimize the device performance. The device of amorphous carbon oxide based ReRAM demonstrated typical electrical characteristics, i.e., the set voltage of 1.8 V, the reset voltage of –2.0 V, high resistance state current of 4.6×10-11 A at 0.1 V, and low resistance state current of 7.5×10-9 A at 0.1 V. Moreover, stable endurance and retention were observed at 10 nm-thick amorphous carbon oxide after N2-annealing at 400 oC, which were the endurance of 1.0×106 cycles with a margin (Ion/Ioff ) of 3.5×101 and retention of 105 sec with a margin of 6.2×101. In particular, we present the mechanism and memory characteristics on operating behavior of the amorphous carbon-oxide based ReRAM via investigating the effect of amorphous carbon-oxide thickness, O2 flow rate of RF magnetron sputter, and N2-annealing temperature on the electrical characteristics by using auger electron spectroscopy(AES), energy-dispersive X-ray spectroscopy (EDS), cross sectional transmission electron microscopy (TEM) and X-ray diffraction (XRD). * This material is based upon work supported by the Ministry of Trade, Industry & Energy(MOTIE, Korea) under Industrial Technology Innovation Program (10068055). [1] Daniele Ielmini, Semicond. Sci. Technol. 31 (2016) 063002 [2] Claudia A. Santini et al, NAT COMMUN, 6:8600 (2015) Figure 1

Intrinsic gettering is usually used to improve wafer quality which is an important factor for reliable ultralarge scale integration devices. The two-step annealing method was adopted to investigate the oxygen precipitates and secondary defects in the aspect of various nucleations and growths for 1.5 MeV, 1×1015 As/cm2 implanted wafers. After two-step annealing, the wafers were cleaved and etched with Wright etchant. Oxygen precipitation density observed by optical microscope in lightly boron doped samples was very low. However, in heavily boron doped samples, the density of oxygen precipitation was the largest at 600 °C in the first annealing, and decreased abruptly until 800 °C. But it increased slightly from 800 to 1000 °C and was independent with the implantation. The location and type of secondary defects were inspected by high resolution transmission electron microscopy. The aligned dislocation was located in the vicinity of the amorphous/crystalline interface in the case of the first annealing tempe...

The integration of ZnO nanowire-based energy harvesting devices into flexible polyesters or clothes would have a significant effect on the energy harvesting building block for harvesting the mechanical energy from human motions. Moreover, the demonstration of high output power via a doping process opens an important method for enhancing the output power. Here, we report solution-based synthesis of Ag-doped ZnO nanowires on flexible polyester substrates without using any high temperature annealing processes. Along with the structural and optical characteristics of the Ag-doped ZnO nanowires, we demonstrate the efficient features of Ag-doped nanogenerators through the measurement of a sound-driven piezoelectric energy device with an output power of 0.5 μW, which is nearly 2.9 times that of a nanogenerator with un-doped ZnO NWs. This finding could provide the possibility of high output nanogenerators for practical applications in future portable/wearable personal displays and motion sensors.

A tunneling magneto-resistance (TMR) ratio of ∼163% at an annealing temperature of 400 °C was achieved in a single MgO-based perpendicular-magnetic-tunneling-junction (p-MTJ) spin valve with a tungsten (W)/tantalum (Ta) seed and W capping layer instead of with a Ta seed and capping layer. This was done by improving the interface perpendicular magnetic anisotropy (i-PMA) characteristic of the Co2Fe6B2 free layer and face-centered-cubic (f.c.c.) crystallinity of the MgO tunneling barrier. In particular, a TMR ratio of ∼141% at an annealing temperature of 400 °C and a thermal stability at room temperature of ∼61 were achieved in a double MgO-based p-MTJ spin valve with W/Ta seed, W spacer, and W capping layers by doubling the i-PMA magnetic moment and increasing slightly magnetic anisotropy field (Hk).

According to the international technology roadmap for semiconductor (ITRS), the development of MOSFETs based on the strain technology is necessary for the next generation technology beyond 10-nm C-MOSFETs. By being applied the strain in the channel of MOSFET, the electron mobility can be enhanced results in the higher current in MOS channel at the fixed gate voltage and oxide thickness. However, due to the lattice mismatch of 4.2 % between Si and Ge, many threading dislocations are generated during the epitaxial growth, resulted in increasing the leakage current of the C-MOSFETs. Currently, the threading dislocation density of 3-µm-thick X-at% (>30-at%) graded Si1-xGex layer is higher than 105 cm-2, which is too high level to be applied in mass production because of degrading the productivity and the performance of the C-MOSFETs. In this study, for that reason, to reduce threading dislocations in the strain-relaxed Si1-xGex layer, we investigated how the hydrogen ion implantation annihilated the threading dislocations in strain-relaxed Si1-xGex layer/Si (100) substrate. First, a relaxed Si1-xGex layer was grown on a Si (100) substrate by epitaxial growth. Second, hydrogen ions were implanted onto the interface between the strain-relaxed Si1-xGex layer and the Si substrate. After ion implantation, the sample was annealed at 800oC for 30 min in a nitrogen ambient. For the case of hydrogen ion implantation with a dose of 5ⅹ1015 cm-2, it was confirmed that the cross-hatch pattern density and the surface roughness was decreased and threading dislocations near the interface were not observed in hydrogen ion-implanted Si1-xGex/Si wafer as shown in Fig. 1. In addition, as shown in Fig. 2, by using in-situ real-time high-resolution TEM, it was confirmed that a threading dislocation in hydrogen ion-implanted Si0.7Ge0.3 layer/Si substrate was annihilated with hydrogen-related defect while the TEM specimen was being annealed at 600oC for 30 min in the heating holder. Therefore, we present the formation mechanism of threading dislocations in a strain-relaxed Si1-xGex layer/Si (100) substrate and the annihilation mechanism of how the threading dislocations are annihilated by hydrogen ion implantation. * This work was financially supported by the Brain Korea 21 Plus Program in 2016 and SiWEDS (Silicon Wafer Engineering and Defect Science). Reference [1] J. G. Park et al., Mat. Sci. Eng. B 134 142-153 (2006) [2] S. Takagi, Strained-Si CMOS Technology in Advanced Gate Stacks for High-Mobility Semiconductors, Springer Berlin Heidelberg 1 (2007) Figure 1

Perpendicular spin-transfer-torque magnetic-random-access-memory (p-STT MRAM) has intensively been researched as a promising memory cell to overcome a physical scaling limit of less than 20 nm in current dynamic-random-access-memory (DRAM) because of its fast write time (~10 ns), non-volatile memory operation, and extremely low power consumption. For realizing terra-bit-level integration of p-STT-MRAM cells fabricated with a selective transistor and a perpendicular-magnetic-tunnel-junction (p-MTJ) spin-valve, the p-MTJ spin-valves with a bottom CoFeB free layer using a Ta bridging and capping layer have been generally and widely researched. They need to achieve a high tunneling-magneto-resistance (TMR) ratio (>150%), thermal stability (Δ) (>74), and switching current (Jc) (~1x102 MA/cm2) at the back end of line (BEOL) temperature of 400oC. It has been reported that a Ta bridging and capping layer would be a good absorption layer for Boron (B) to enhance i-PMA characteristic but Ta atoms easily diffuse into the MgO tunneling barrier during ex- situ annealing temperature (or a thermal budget at BEOL)1,2. Thus, the p-MTJ spin-valves with a bottom CoFeB free layer using a tantalum (Ta: body-centered-cubic structure) bridging and capping layer have extreme difficulty achieving the TMR ratio of > 100% at the BEOL of 400 oC since the TMR ratio decreases rapidly as ex- situ annealing temperature (or a BEOL temperature) increases. Recently, the p-MTJ spin-valves with a top CoFeB free layer using a Ta bridging and capping layer have been intensively studied to obtain a higher TMR ratio at a higher ex- situ annealing temperature (or a BEOL temperature) since it would minimize the diffusion of platinum (Pt) atoms into the MgO tunneling barrier3-5. However, they confront a significant diffusion of Ta atoms into the MgO tunneling barrier at ex- situ annealing (or BEOL) of 400oC, so the b.c.c crystallinity of the MgO tunneling barrier is abruptly degraded, thereby rapidly decreasing the TMR ratio of the p-MTJ spin-valves. An innovative solution proposed in this paper is a new design of a p-MTJ spin-valve with a top Co2Fe6B2 free layer using a W bridging with sub-nanoscale thickness (~0.24 nm) and a tungsten (W: body-centered-cubic structure) capping layer with nanoscale thickness (~4.0 nm). The proposed design demonstrated no diffusion of Ta atoms into the MgO tunneling barrier and minimized the diffusion of Fe atoms at both Co2Fe6B2 free and pinned layer at an ex-situ annealing of 400oC. Therefore, b.c.c crystallinity degradation of the MgO tunneling barrier could be prevented, and high PMA magnetic moments at both Co2Fe6B2 free and pinned layers could be achieved. Thus, the p-MTJ spin-valve with a Co2Fe6B2 free layer using a W bridging and capping layer with nanoscale thickness (~4.0 nm) achieved the TMR ratio of ~143% at ex- situ annealing of 400oC, as shown Fig. 1. Furthermore, as a way to achieve a TMR ratio of >150% at 400°C, in this paper, we present the design of a new double MgO-based p-MTJ spin-valve with a top Co2Fe6B2 free layer by inserting a nanoscale Fe diffusion barrier (~0.30 nm: only two Fe atomic layers thick) between the W capping layer (~ 4.0 nm in thickness) and MgO capping layer (~1.0 nm in thickness). This new p-MTJ spin-valve had a TMR ratio of ~154% and Δ of 90 in ex-situ magnetic annealing at 400°C, as shown Fig. 2. * This work was supported by a Basic Science Research Program grant from the National Research Foundation of Korea (NRF) funded by the Korean government (MSIP) (No. 2014R1A2A1A01006474) and the Brain Korea 21 PLUS Program in 2014. Reference [1] J. Appl. Phys. 2009, 106, 023920 [2] Acta Materialia 2015, 87, 259 [3] IEDM 2015, pp. 26. 2 [4] IEDM 2015, pp. 26. 3 [5] IEDM 2015, pp. 26. 4 Fig. 1. (a) p-MTJ spin-valve structure using a Ta bridging and capping layer, (b) p-MTJ spin-valve structure using a W bridging and capping layer, and (c) dependency of the TMR ratio on bridging and capping layer thickness for both p-MTJ spin-valves using Ta and W bridging and capping layers. Fig. 2. Dependence of TMR ratio on nanoscale thickness of Fe diffusion barrier for double MgO-based p-MTJ spin-valves with a top Co2Fe6B2 free layer. Figure 1

Recently, many researchers have studied circulating-cancer-stem-cell (CCSC) to pre-recognize the presence of a cancer. Since, it has been that cancer cells include negative or positive charges, several electronic sensors have been attractively proposed. In our study, we designed an In-Ga-Zn-oxide (IGZO) based FET implemented with Au nano-particles on IGZO channel, as shown in Fig. 1(a). The average size and density of the Au nano-particles on the channel were 12.05 nm and 2.66×1011 cm-2, respectively. In particular, this FET has a unique time-dependent current characteristic such as depressing at a positive gate bias or facilitating at a negative bias, which determines whether or not the cancers present a fixed charge or mobile charges. In our experiment, breast-cancer-stem-cell (BCSC) connected with the cancer-anti-body (CD44) was dropped on the IGZO FET with Au nano-particles where a linker (8-Mercaptooctanoic acid) was attached on Au nano-particles, as shown in Fig. 1(b). The linkers were well uniformly absorbed and attached on Au nano-particles, confirmed by FT-IR, as shown in Fig. 2. First of all, we investigated the dependency of threshold voltage on the presence of Au nano-particles, linkers, and breast-cancer-stem-cells with anti-bodies shown in Fig.3. The threshold voltage of the IGZO FET without Au nano-particles was +2.4 V. The implementation of Au-nano-particles on the IGZO channel increased from +2.4 to +12.0 V because of the presence of positive fixed charges at the interface between the IGZO channel and Au nano-particles. The attachment of the linker on Au nano-particles decreased the threshold voltage from +12.0 V to +6.9 V since the functional group of the linker was carboxyl. Two kinds of breast-cancer-stem-cells were dropped on the linker connected with Au-nano-particles; i.e., the cells without or with anti-body. The cells without anti-body did not shift threshold while the cells with anti-body reduced -4.3 V where the concentration of BCSC was 8000ea/10ul. The threshold-voltage shift amount was well correlated with the concentration of BCSC, as shown in Fig. 4. The threshold-voltage shift amount increased linearly with the concentration of BCSC, having the slope of the threshold-voltage shift amount of 0.44V/(kea/ul). In addition, we confirmed that BCSC showed a negative fixed charge rather than mobile charge by testing time dependent drain-current characteristic. In our presentation, we will review the detailed mechanism by which BCSCs shift threshold voltage and show a negative fixed charge characteristic. Reference [1] F. Alibart et al. Adv. Funct. Mater. 20 330. (2010) [2] K.-C. Kwon et al. Appl. Phys. Exp. 6, 067001 (2013). [3] XiuHua Zhang et al. Sensors, 3, 61-68 (2003) Acknowledgment This research was supported by the Converging Research Center Program funded by the Ministry of Science, ICT & Future Planning (Project No. 2015054348) and supported by Brain Korea 21 PLUS Program in 2014 Figure 1

In recent study, silicon solar cell performance has been greatly progressed due to mature understanding about silicon material properties and fabrication process optimization. However, the power-conversion-efficiency (PCE) of silicon solar cells has increased slowly for last 10 years. In order to overcome the current limitation of the PCE of silicon solar-cells, our group has introduced the silicon-solar-cells implemented with core/shell quantum dots for energy conversion. According to our previous work on enhancing the efficiency of silicon solar cells via energy-down-shift using undoped CdSe/ZnS and Cd0.5Zn0.5S/ZnS core/shell QDs1-3, the Stockes’s shift was relatively small (52 – 127 nm) and that led probably to partial self-reabsorption between core/shell QDs. For that reason, we employed the doping QDs systems in this work in order to increase the Stocks’s shift to be higher than 200 nm, called energy-down-shift using energy-tuning-effect. It is known that Mn2+ doped QDs usually have large Stokes’s shift and that will help to limit the self-quenching and self-reabsorption phenomenon and, hence, increase the quantum yield of QDs4. We investigated the enhanced PCE effect of Mn2+-doped Cd0.5Zn0.5S/ZnS core/shell QD via energy-down-shift using energy-tuning-effect. The Mn2+ doped Cd0.5Zn0.5S/ZnS core/shell QDs layer was deposited on the textured pyramid-like SiNX film of p-type silicon solar-cells, as shown in the schematic view of Fig. 1(a), and it was confirmed that the as-synthesized Mn doped Cd0.5Zn0.5S/ZnS core/shell QDs had a Mn doped Cd0.5Zn0.5S core diameter of 6.83 nm and ZnS shell thickness of 2.40 nm, as shown in Fig. 1(b). It was also confirmed that the Mn2+ doped Cd0.5Zn0.5S/ZnS core/shell QDs, absorbed UV-visible region (250–450 nm in wavelength) and emitted yellow-orange visible region (583 nm in wavelength). For p−type silicon solar−cells coated with the QDs layer, in particular, it was observed that the p-type silicon solar-cells coated with 0.064M Mn2+ doped Cd0.5Zn0.5S/ZnS core/shell QDs demonstrated better photovoltaic performance. The JSC increased abruptly from 35.34 to 36.76 mA/cm2 at 0.3-wt% QDs concentration, and which was a 4.02% increase compared to the reference without the QDs layer. Finally, the PCE of 0.55 % in the solar-cell coated with Mn2+ doped QDs layer were achieved at the 0.3-wt% of core–shell QDs doped with 0.064 M, compared with those of solar-cells with uncoated QDs layers. These results indicate that the coating of Mn doped Cd0.5Zn0.5S/ZnS core/shell QDs on the SiNX film textured surface for p−type silicon solar−cells affect JSCdue to the energy−down−shift using energy-tuning-effect of the QDs. * This work was financially supported by the Brain Korea 21 plus Project in 2016, Korea. Reference [1] Baek, S W. et al., Journal of Materials Chemistry A2014. [2] Baek, S W. et al., Phys. Chem. Chem. Phys.2014, 16, 18205-18210. [3] Baek, S. W.; Shim, J. H.; Seung, H. M.; Lee, G. S.; Hong, J. P.; Lee, K. S.; Park, J. G. Nanoscale 2014. [4]. Zeng, R.; Rutherford, M.; Xie, R.; Zou, B.; Peng, X. Chem. Mater. 2010, (22), 2107-2113. Figure 1

Perpendicular spin-transfer-torque magnetic random access memory (p-STT MRAM) has been intensively researched because of the possibility of it overcoming the scaling limitations of current dynamic random access memory (DRAM) below the 10-nm design rule1. p-STT MRAM cells consist of a selective device and a perpendicular magnetic tunneling junction (p-MTJ) spin-valve. Moreover, a lot of research has gone into improving three device parameters of these devices, i.e., the tunneling magnetoresistance (TMR) ratio, thermal stability (Δ), and switching current (JC ), at the back end of line (BEOL) temperature of 400oC3. Note that the BEOL temperature of 400oC is required in order to integrate memory cells3. Tantalum (Ta) has been used as a bridge and spacer material to ferro-couple two ferro-magnetic layers. However, so far, it has proven extremely difficult achieve a high TMR ratio in a MgO based p-MTJ spin-valve using a thickness Ta spacer at the BEOL temperature of 400oC4. In our experiment, we tried a new spacer material with a body-centered-cubic (bcc) crystal structure (i.e., tungsten). We investigated the dependency of the TMR ratio on the thickness and type of material (tantalum or tungsten) of spacers in double MgO-based p-MTJ spin-valves with a top free Co2Fe6B2 layer. Two types of double MgO based p-MTJ spin-valves with a [Co/Pt]n-based SyAF layer were fabricated on a 12-inch-diameter wafer deposited with SiO2/W/TiN films in a 12-inch multi-chamber sputtering system under a high vacuum of less than 1×10−8 torr (without breaking the vacuum; see Figs. 1a and b). The thicknesses of the Ta and W spacers were varied between 0.2 and 0.7 nm. All samples were subject to ex-situ annealing at 400oC for 30 min under a perpendicular magnetic field of 3 Tesla. The dependence of the TMR ratio on the thickness and type of material of the spacer was estimated by using current-in-plane tunneling (CIPT) at room temperature, as shown in Fig. 1c. For the Ta spacers, the TMR ratio significantly increased from ~38 to ~95% as the spacer thickness was increased from 0.20 to 0.35 nm. It remained about 98% for spacer thicknesses ranging from 0.40 to 0.53 nm. It decreased from ~90 to ~42% as the spacer thickness was further increased from 0.58 to 0.70 nm. Thus, the TMR ratio (~98%) peaked in a certain spacer thickness region (0.40~0.53 nm) for Ta. Next, regarding the samples made with W spacers, the TMR ratio significantly increased from ~85 to ~131% as the spacer thickness was increased from 0.20 to 0.30 nm. It remained at ~134% as the spacer thickness was further increased from 0.40 to 0.53 nm. The ratio slightly decreased from ~134 to ~111% for larger thicknesses ranging from 0.58 to 0.70 nm. Thus, the TMR ratio (~134.0%) also peaked in a specific spacer thickness region (0.40~0.53 nm) for W. Comparing the TMR ratios in the cases of the Ta spacer and the W spacer obviously indicates that the use of 0.20 and 0.70 nm-thick W spacers resulted in least 35% higher TMR ratios in the comparison with the use of Ta spacers. In particular, both the thinnest (0.20 nm) and thickest (0.70 nm) W spacers yielded much higher TMR ratios (~85 and ~111%) in comparison with the corresponding Ta spacers (~38 and ~42%). In our presentation, we will report the mechanism by which thickness and material of the spacer influence the TMR ratio was revealed by examining the static magnetization behavior, (100) bcc crystallinity, and depth profile of the atomic composition of the spin-valves. In addition, we will present the result of effects on W bridge/cap-layer compare with Ta bridge/cap-layer in Double MgO based p-MTJ spin-valve. * This work was supported by a Basic Science Research Program grant from the National Research Foundation of Korea (NRF) funded by the Korean government (MSIP) (No. 2014R1A2A1A01006474) and the Brain Korea 21 PLUS Program in 2014. Reference [1] K. C. Chun et al., IEEE J. Solid-st. Circ. 48, 598 (2013) [2] K. Yamane et al., IEEE T. Magn. 49, 4335 (2013). [3] L. Thomas et al., J. Appl. Phys. 115, 172615 (2014) [4] J. Swerts et al., Appl. Phys. Lett. 106, 262407 (2015) Figure 1

NAND flash is currently facing physical limitations for 10nm technology because as NAND flash cells have been getting smaller, cell to cell interference significantly increase. To overcome these challenge, new memories have been developed. Conductive Bridge Random Access Memory (CBRAM) is a one of the most promising new memories due to its simple structure, low power consumption, high scaling potential, large on/off margin and high speed. It has been reported that resistivity switching of CBRAM is induced by filament formation and rupture due to metal cation movement in the solid electrolyte. In the previous our research work, we studied CuO based CBRAM using CuTe top electrode. But CuO is not a fab-friendly material. In this work, instead of CuO based material, TiO2 are used for solid electrolyte because TiO2 is fab-friendly material and it has a good compatibility with a conventional CMOS process. TiO2 exist in three phases in atmospheric pressure, i.e. anatase, rutile and brookite, which phase of TiO2 presents different physical properties. In this work, we compared switching characteristics of amorphous with anatase phases TiO2 CBRAM. XRD confirmed amorphous-anatase phase transition at annealing temperature of 400 oC, as shown in Fig.1. Based on the crystallinity of TiO2 thin film, two different samples were prepared, amorphous (W/O annealing) and anatase phase TiO2 CBRAM (400 oC annealing). The CBRAM was fabricated on plug type TiN bottom electrode patterned wafer. The size of the bottom electrode was 34nm to 1921nm. TiO2 layer was deposited by RF magnetron sputter. And CuTe electrode was deposited by DC magnetron sputter. The structure of the device was shown in Fig.2 (a). On/Off ratio of TiO2 based CBRAM with amorphous phase was greater than that with anatase phase TiO2 CBRAM because HRS (High Resistive State) of the amorphous phase TiO2 CBRAM was lower than that of anatase phase TiO2 CBRAM. The amorphous and anatase phase TiO2 based CBRAMs demonstrated the endurance cycles of 105 and 2X106 respectively. We will report the memory characteristic of two phases TiO2based CBRAMs and explained why they showed the different memory characteristic. * This work was financially supported by the Industrial Strategic Technology Development Program (10039191, The Next Generation MLC PRAM, 3D ReRAM, Device, Materials and Micro Fabrication Technology Development) funded by the Ministry of Trade, Industry and Energy (MOTIE), Republic of Korea and the Brain Korea 21 Plus, Republic of Korea. Figure 1

Recently, memory industry has demanded terabit-level memory cell of high density to have bit cost-competition. However, current memory technology such as DRAM and NAND flash memory has a physical limit due to their charge-storage system. Conductive bridging random access memory (CBRAM) is considering as one of the promising candidate for next generation non-volatile memory (NVM) because it has many advantages such as low power consumption, and large on/off ratio. In particular, CBRAM has a possibility of terra-bit-level nonvolatile memory as a post flash memory due to their 4F2simple structure of a top reactive electrode, electrolyte, and bottom inert electrode, and they showed a bipolar switching memory characteristic.[1] We have developed a nanoscale CBRAM cell with a structure of TiN/CuO/Ag/TiN. It showed good nonvolatile memory performance such as as a ~1.23 X 102 memory margin (Ion/Ioff), ~3 X 106 AC set/reset endurance cycles by with 100-μs AC pulse width by sustaining a 1.31 X 102 memory margin, ~6.63-years retention time at 85 °C by sustaining a 3.63 X 102 memory margin, 100 ns program speed, and multi-level (four level) cell operation.[2] However, for achieving commercial-level non-volatile memory cell, the CBRAM cell with Ag or Cu electrode has some problem such as poor stability and reliability due to undesired diffusion of Ag and Cu ions in solid-electrolyte. Thus, the undesired diffusion of Ag and Cu ions leads to the formation of multiple and thick filaments resulting in degradation of write/erase endurance cycles. To solve this issue, we applied Cu-Te alloy electrode for CuO solid-electrolyte-based CBRAM cell. Also, to enhance the nonvolatile memory characteristics of the CBRAM cell, Au nano-crystals (NCs) were intentionally inserted between the CuO solid electrolyte and TiN bottom electrode, where the Au NCs were created by depositing Au thin-film via thermal evaporation. Thus, the Au NCs inserted in CBRAM cell made intensive fields be formed on Au NCs and then localized Cu-ion bridging filaments could be formed on Au NCs deposited in solid electrolyte earlier than on TiN bottom electrode. Since it was well-known that the CBRAM was operated by metal-filaments formed in solid electrolyte, well-controlled metal-filaments could be a key factor of nonvolatile memory characteristics. Therefore, inserting the Au NCs in the CBRAM cell could enhance the nonvolatile memory characteristics and reduce the forming voltage of CBRAM cell due to controlling the random position and orientation of Cu-ion bridging filaments. The CBRAM cell embedded with proper Au NCs exhibited the enhanced nonvolatile memory characteristics such as AC set/reset endurance cycles of 1.0 X 107, read endurance cycles of 1.0 X 1010, and retention time at 85 oC of ~16 years. Moreover, the multi-level cell operation of the CBRAM cell embedded with proper Au NCs also was obtained with improved AC set/reset endurance cycles of 1.0 X 105, and retention time of 1.0 X 105sec. * This work was financially supported by the Industrial Strategic Technology Development Program (10039191, The Next Generation MLC PRAM, 3D ReRAM, Device, Materials and Micro Fabrication Technology Development) funded by the Ministry of Trade, Industry and Energy (MOTIE), Republic of Korea and the Brain Korea 21 Plus, Republic of Korea. Figure 1

Recently, perpendicular spin-transfer-torque magnetic-random-access-memory (p-STT MRAM) has intensively been researched as a promising memory cell of overcoming the physical scaling limit of less than 10 nm in current dynamic-random-access-memory (DRAM) because of its fast write time (~10 ns), non-volatile memory operation, and low power consumption. A p-STT MRAM cell consists of a selective device and a perpendicular-magnetic-tunneling-junction (p-MTJ) spin-valve. CoFeB/MgO based p-MTJ spin-valves have been widely researched. In particular, for tera-bit-level integration, they require a high tunneling-magneto-resistance (TMR) ratio (> 150%) for a sufficient write/erase margin, high thermal stability (Δ) (> 74) for a 10-year data retention-time, and a low switching current (J c) (~1x102 MA/cm2) for low power consumption at the back end of line (BEOL) temperature of 400oC for p-STT-MRAM cells1. Recently, a Ta based double MgO-based p-MTJ spin-valve structure has been attractively proposed to achieve simultaneously a high TMR ratio and high thermal stability2. However, it has been extremely difficult to achieve a TMR ratio of >100% at 400oC (BEOL) because of Ta diffusion into the MgO tunneling barrier degrading the (100) crystallinity3. Thus, in this study, we designed a novel double MgO-based p-MTJ spin-valve with a top CoFeB free layer using W as a nanoscale-thick capping layer, spacer layer, and bridging layer by inserting a nanoscale-thick b.c.c. crystallized Fe diffusion-barrier between the W capping layer and the MgO capping layer, as shown in Fig. 1(a). First, we investigated the effect of this Fe diffusion barrier on the TMR ratio in a double MgO-based p-MTJ spin-valve with a top Co2F6B2 free layer ex-situ annealed at 400oC. Then, we examined the mechanism by which the Fe diffusion barrier enhances the TMR ratio by using current-in-plane tunneling (CIPT) at room temperature, the anisotropy energy density and thermal stability calculation by estimating the PMA magnetic moment. The TMR ratio was strongly dependent on the Fe diffusion-barrier thickness; i.e., it rapidly increased from ~131% to ~154% when the thickness increased from 0 to ~0.30 nm and it considerably decreased from ~154% to ~134% when the thickness increased from ~0.30 nm to ~0.66 nm. Thus, the TMR ratio peaked at a specific nanoscale Fe diffusion-barrier thickness, i.e., ~154% at ~0.30 nm, as shown in Fig. 1(b). Two kinds of the PMA structure, i.e., the PMA structure without a Fe diffusion barrier and with 0.30-nm thick Fe diffusion-barrier, were prepared to estimate the anisotropy energy and thermal stability. The anisotropy energy density (~0.31 erg/cm2) peaked at a specific effective thickness of the upper Co2Fe6B2 free layer (~0.67 nm) for the PMA structure without a Fe diffusion barrier; otherwise, it (~0.35 erg/cm2) peaked at a specific effective thickness of the upper Co2Fe6B2 free layer (~0.83 nm) for the PMA structure with 0.30-nm thick Fe diffusion barrier, as shown in Fig. 1(c). These result indicate that the insertion of a 0.30-nm-thick Fe diffusion barrier between the W and MgO capping layer could enhance the anisotropy energy density at a higher effective thickness of the upper Co2Fe6B2 free layer. Furthermore, thermal stability (Δ) was calculated. The Δ (33.8)peaked at a specific effective thickness of the upper Co2Fe6B2 free layer (~0.67 nm) for the PMA structure without a Fe diffusion barrier; otherwise, it (38.0) peaked at a specific effective thickness of the upper Co2Fe6B2 free layer (~0.83 nm) for the PMA structure with 0.30-nm thick Fe diffusion barrier, as shown in Fig. 3(b). These result indicate that the insertion of a 0.30-nm-thick Fe diffusion barrier between the W and MgO capping layer would increase the of the upper Co2Fe6B2 free layer approximately 15% since the ~0.30-nm thick Fe diffusion-barrier plays an excellent a role of the diffusion barrier of the W atoms ex-situ annealing at 400oC. In our presentation, we will report the mechanism by which thickness of the Fe diffusion barrier influence the TMR ratio was revealed by examining the static magnetization behavior, (100) bcc crystallinity, depth profile of the atomic composition of the spin-valves, the dead-layer thickness and thermal stability calculation, and the strain at the interface between the W capping and MgO tunneling barrier layer by theoretical calculation. * This work was supported by a Basic Science Research Program grant from the National Research Foundation of Korea (NRF) funded by the Korean government (MSIP) (No. 2014R1A2A1A01006474) and the Brain Korea 21 PLUS Program in 2014. Reference [1] H. Honjo et al., Symp. VLSI Tech. T160-161 (2015) [2] Y. Tomczak et al., Appl. Phys. Lett. 108, 042402 (2016) [3] Y. Takemura et al., Nanotecknology. 26, 195702 (2015) Figure 1

For wide-ranging applications in nanoscale optoelectronic and piezoelectric energy harvesting devices, one-dimensional ZnO nano-architecture and single crystalline doped ZnO having n-/p-type conduction are essential. Herein, catalyst-free ZnO sheet-like nanorods (SLNR) p-n homojunction in which the Lithium (Li) served as p-dopants and intrinsically n-type ZnO, respectively, have been synthesized by a controlled in-situ doping process via hydrothermal synthesis for fabricating efficient ultraviolet UV detectable photonic devices. In addition, a comprehensive investigation was carried out on Li-doped ZnO SLNRs to control the amphoteric electrical behavior of Li in ZnO host lattice. In such cases, Li occupies octahedral sites (Lii O) in the empty cages of the ZnO wurtzite structure and subsequently acts a donor because of the low formation energy, thereby, maintaining or improving the initial n-type behavior of the material. In contrast, the p-type doping by Li atoms occupying Zn site (LiZn) along the growth direction has been achieved by proper thermal activation energy. Further, to obtain n-/p- ZnO nanorods architecture and their vertically stacked p-n homojunctions, the nanorod diameters and morphologies of the ZnO SLNRs were adjusted dramatically by manipulating precursor concentration and growth kinetics. The well-aligned and clean interface between n-/p-ZnO SLNRs could enhance the electron-hole pair generation, transport, separation, thus improved the performance of the homojunction devices. The ZnO p-n homojunction structures have been successfully attained by continuous multi-step solution growth, representing the well-faceted hexagonal SLNR end planes of ZnO segments. The Li-doping effects which are occupied in interstitial site (Lii) or substitutional site (LiZn) in single crystalline ZnO SLNRs were carefully examined through the lattice spacing differences of lattice fringes in high-resolution transmission electron microscopy. An extensive analysis of the luminescence features was carried out in order to identify conduction type conversion from n-type to p-type in the Li-doped ZnO SLNRs. The appearance of acceptor-bound exciton emission, extremely enhancement of near-band-edge emission and the longer carrier life-time indicate that the Li dopants act as desirable shallow acceptor in the ZnO SLNRs. In addition, the SLNR-based p–n homojunctions exhibited distinct electrical features for their potential use as light emitting diodes and UV photovoltaics, thereby spurring progress in the development of practical optoelectronics. Figure 1

The effect of surfactant in a ceria slurry on the impact of nanotopography on post-CMP oxide thickness deviation (OTD) was investigated in a blanket wafer study. The ceria slurry was prepared using the solid-state displacement reaction method and an anionic organic surfactant was added with the concentration from 0 to 0.8 wt%. Under the condition of a fixed removal depth, the magnitude of post-CMP OTD due to nanotopography increased with the surfactant concentration in the slurry, demonstrating that the impact of nanotopography can be controlled using the slurry characteristics.

Selected-area electron diffraction pattern (SADP) results showed two sets of {1/2 1/2 1/2} superstructure reflections with symmetrical intensities along the [110] axis, and the corresponding high-resolution transmission electron microscopy images indicated a doublet periodicity in the contrast of the {111} lattice planes. Photoluminescence spectra from highly strained CdxZn1−xTe/GaAs heterostructures showed that the valence-band splitting into the heavy hole and the light hole bands occurred as the Cd mole fraction was increased. The valence-band splitting is strongly correlated to the CuPtB-type ordered structure in highly strained heterostructures.

Two variants of CuPtB-type orderings in strained CdxZn1 2 xTe epilayers were investigated by using transmission electron microscopy (TEM) and selected area diffraction pattern (SADP) measurements. The TEM images on the Cd0.15Zn0.85Te epilayers depicted strong contrast modulations along the [110] direction, and the SADP images showed superstructure reflection spots corresponding to a CuPtB-type ordering. Possible crystal structures for the two variants of CuPtB-type ordering in the CdxZn1 2 xTe epilayers, which were determined from the SADP images, are presented. q 2003 Elsevier Science Ltd. All rights reserved.

In the current study, we fabricated polymer (poly(3-hexylthiophene-2,5-diyl) (P3HT) and [6,6]-phenyl-C(61) butyric-acid methyl-ester (PCBM) blend) photovoltaic (PV) cells embedded with p-type single walled carbon nanotubes (SWCNTs) with tangled hair morphology. The power conversion efficiency (PCE) rapidly increased with SWCNT concentration of up to 6.83% coverage, and then decreased and saturated with increasing SWCNT concentration; i.e., the PCE peaks at 5.379%. This tendency is mainly associated with hole transport efficiency toward the transparent electrode (indium-tin-oxide (ITO)) via SWCNTs, directly determining the series resistance and shunt resistance of the polymer PV cells embedded with SWCNTs: the PV cell is increasing shunt resistance and decreasing series resistance.

The polishing pad dependency of nanotopography impact on oxide chemical mechanical polishing (CMP) was analyzed using a spectral method. Oxide films on wafers were polished using two types of polishing pads having different compressibility (soft pad and hard pad). The power spectral density (PSD) of the film thickness variations got closer to that of nanotopography after CMP. A transfer function was proposed as the ratio of PSD of the film thickness variation to that of nanotopography. The calculated transfer function quantitatively showed that the nanotopography impact on film thickness variation is apparent up to the longer wavelengths when using the hard pad.

A multi-level capacitor-less memory cell was fabricated with a fully depleted n-metal–oxide–semiconductor field-effect transistor on a nano-scale strained silicon channel on insulator (FD sSOI n-MOSFET). The 0.73% biaxial tensile strain in the silicon channel of the FD sSOI n-MOSFET enhanced the effective electron mobility to ~ 1.7 times that with an unstrained silicon channel. This thereby enables both front- and back-gate cell operations, demonstrating eight-level volatile memory-cell operation with a 1 ms retention time and 12 µA memory margin. This is a step toward achieving a terabit volatile memory cell.