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Schematics are a visual language used to describe the relationships between components in an electronic circuit and present accessibility challenges for blind, low vision, and tactile learners. Creating discernible tactile schematics using low-cost microcapsule fusers (which create raised surfaces on paper) is non-trivial as circuit diagrams contain small elements, complex relationships, and must follow industry standards. We conducted iterative design activities with tactile graphic experts, blind and low vision students wanting to learn schematics, graphic designers, and physical computing instructors to create an improved set of tactile schematic symbols and nine guidelines for novices to create readable tactile graphics for schematics.

We introduce a novel prototyping method using a metal leaf and laser printer. Proposed metal leaf circuit is capable of producing circuits on normal paper that can be printed by a laser printer. The metal leaf is adhered to paper using a toner used in a laser printer. When the metal leaf is placed on the printed circuit pattern and pressed with an iron, the metal leaf adheres to the circuit pattern. Removal of the excess metal leaf completes the metal leaf circuit diagram on the paper. In addition, by using the change of temperature of toner, we can easily cut and repair the circuit. We made a metal leaf circuit on the cloth with the masu sake cup, and evaluated it.

State-of-the-art techniques allow researchers to record large numbers of spike trains in parallel for many hours. With enough such data, we should be able to infer the connectivity among neurons. Here we develop a method for reconstructing neuronal circuitry by applying a generalized linear model (GLM) to spike cross-correlations. Our method estimates connections between neurons in units of postsynaptic potentials and the amount of spike recordings needed to verify connections. The performance of inference is optimized by counting the estimation errors using synthetic data. This method is superior to other established methods in correctly estimating connectivity. By applying our method to rat hippocampal data, we show that the types of estimated connections match the results inferred from other physiological cues. Thus our method provides the means to build a circuit diagram from recorded spike trains, thereby providing a basis for elucidating the differences in information processing in different brain regions., Current techniques have enabled the simultaneous collection of spike train data from large numbers of neurons. Here, the authors report a method to infer the underlying neural circuit connectivity diagram based on a generalized linear model applied to spike cross-correlations between neurons.

This paper proposes a reduction of DC-link voltage fluctuation for hydraulic turbine generation (HTG) systems using back-to-back (BTB) converters. In HTG systems, a BTB converters with two-level topology have been mainly used. Because of its strong points of being intuitive in circuit diagram and easy to maintain. A switch-open-fault in the grid-stage converter of the BTB converter causes the fluctuation of DC-link voltage in the BTB converters. It reduces the reliability of the HTG systems. To improve the performance of the HTG systems generally, supplementary circuits or components and tolerant control methods are required. Therefore, this paper proposed method to reduce the fluctuation of DC-link voltage when switch-open-fault is happened in the grid-stage converter. The validity of the proposed method to reduce the fluctuation of DC-link voltage is substantiated by simulation results.

An electronic module based on the ATmega32 microcontroller as a security system for cars that integrated into the engine immobilizer has been created. Three main things in this study, namely programming and verification tests, making an initial security system with a minimalist structure, and validation tests. Programming for the microcontroller system through algorithm determination and syntax writing, while the verification test is done through uploading the program syntax to the Proteus application and implementing the simulation. Determining the algorithms and writing the syntax through a number of steps, namely pin configuration, variable declarations, constant declarations, initialization, main programs, retrieve and send data, and output. The simulation assisted by the Proteus application is in the form of giving two kinds of commands/inputs to the sensor, namely one input data in the form of human existence or human motion to the passive infrared receiver sensor and one input of human fingerprint initialization data to the fingerprint sensor. The simulation results according to the order of the fingerprint sensor and passive infrared receiver in the form of a display on the Virtual Terminal. The minimalist structure of the system is composed of circuit diagrams, physical forms, and integrated wiring on the ATmega32 microcontroller system. The performance of the security system is shown, that the results of monitoring when the sensor is given input "human existence (motion)", the fingerprint sensor blinks (on) and when the fingerprint sensor blinks which means ready to receive input data in the form of "Human Initialization (fingerprint)" for activating actuators and starter system on the car. Giving input commands to the sensor passive infrared receiver and fingerprint has functioned for the appointment of performance, that the initial security system has been integrated with the main security systemand attached to the car.

In power electronics, wide band gap materials enable faster transients and higher switching frequencies. Therefore, more efficient power electronic systems can be realized, but also greater EMC problems in magnitude and frequency arise. Heat sinks, which are often necessary for cooling power semiconductors, are a well known source of EMC issues. In this paper, crucial sources of conducted interference from capacitive coupling via the heat sink are determined and approaches to reduce this conducted interference are discussed. For the investigations, a combined approach using simulation as well as circuit diagram analysis was used. Three different topologies were investigated to obtain general recommendations to reduce interference caused by heat sink capacitive coupling.

The DC regulated power supply is required to power various microcontroller boards and different sensory devices. Microcontrollers are widely getting used in upcoming new electronic gadgets. This paper describes the circuit diagram, PCB design, and footprints of the components used. The circuit simulation provides the output with respect to input in circuit, which helps in validation of circuit. The 3D virtual simulation helps the researcher to analyze the component placement along with the 3D view of PCB in simulation environment. The TINA software used as simulation software to analyze the circuit.

Logic encryption for combinational circuits are proposed in this paper. Logic encryption is achieved by using key gate transistors in the circuit schematic of subtractors and adders. In this work, two logic encrypted full adder and subtractor circuits and half adder and half subtractor circuits using logic encrypted gates are designed and proposed. Of the two proposed circuits for adders and subtractors, one is strong logic encrypted than the other. All the encrypted adders and subtractors are compared with conventional adders and subtractors for logic encryption level and various other parameters like area and power. The results show improvement in area and power. The proposed half adder has 42% more area and 26.02% more power and half subtractor has 50% more area and 24.4% more power than the existing circuits. The proposed full adder has 25% less area (transistor count) and 33% less power consumption and the proposed full subtractor is also better in terms of area and power consumption with 30% and 24% lesser. Even strong logic encrypted full adder and full subtractor are proposed in this work. Full adder and subtractor have 22% increase in area each and on an average 2.3% increase in power each respectively.

A physical model representing an underdamped free oscillation of a cantilever beam is constructed. The model is incorporated into a pSPICE Analog Behavioral Model (ABM) in order to construct a circuit schematic that generates a model-based waveform representing that of the experiment. A strain gage is employed to sense the change in strain in the oscillating cantilever beam. The frequency and damping ratio of oscillation of the cantilever are determined by means of curve fitting. Experiment and pSPICE ABM results show an excellent agreement.

Electroporation is a process that uses a high voltage pulsed electric field to permeate the cell membrane for drug infusion into the cell. Changing the voltage level, pulse period or pulse width modifies the effect of the treatment to the cell. In this paper, we describe a miniaturized high-power pulsed electric field generator that reduces the system to a single chip. The proposed chip allows various customizations in terms of frequency or duty cycle of the applied pulse. The circuit is designed in 1 μm silicon-on-insulator CMOS process, named XDH, from X-FAB. The circuit schematic simulation showed a duty cycle variation from 12.5% to 34.9% and can generate 465 kHz, 500 V square wave.

Haptic feedback displays are an emerging technology that have the potential to enhance how children and their parents interact with and learn about science concepts. Yet, we know little about how to design haptic feedback applications for science learning or how children and their parents make use of these interactive features. This paper presents the design and evaluation of TCircuit, an application for a variable friction touch-screen display (i.e., Tanvas Tablet) that enables parent-child dyads to feel electric current flowing through a circuit diagram by touching the display. We describe results from a formative design study with 10 parent-child dyads that reveal which texture patterns and mappings are most appropriate for representing the concept of electrical current through haptic feedback. We also report results of a comparative study with 40 parent-child dyads in a museum setting. Our analysis shows that dyads in the haptic condition performed slightly better when predicting their answers to learning tasks. However, we found that haptic feedback introduced new complexities for how dyads perceived and discussed the exhibit content. We discuss the potential for haptic feedback displays to support science learning, particularly in collaborative settings, and design considerations for future systems.

CISPR 32[1]specifies several types of asymmetric artificial network (AAN) for conducted emission measurement on unscreened balanced pair cables. The AAN circuit diagram shown in Figure G.3 of CISPR 32[1]is an example of a transformer-type-AAN, thought to be suitable for measurement on single, two, three and four unscreened balanced pairs even though EUT port of the AAN is a balanced four-pair connector. In this paper, we explain how we experimentally verified the suitability of this transformer-type-AAN by measuring common mode termination impedance and voltage division factor (VDF) while changing the balanced pairs to be measured. The results show that deviations among the measured values were sufficiently small and all measured values were met the requirements of CISPR 16-1-2[2]. We concluded that this transformer-type-AAN is suitable for conducted emission measurement on any unscreened balanced pairs.

This paper presents a method for finding the optimum load resistance that maximizes the power efficiency of a tuned-resonant inductive power transfer (IPT) system. In this method, the equivalent AC circuit of the IPT system is transformed to match the topology of a reference ladder prototype. This simplifies the design problem, because the ladder prototype offers intuitive and accurate closed-form approximations for the optimum load resistance and maximum power efficiency. The process is graphical in the sense that manipulations and transformations are made directly on the circuit diagram. Compared to traditional circuit analysis, the ladder prototype approach does not entail complicated systems of equations or matrix manipulations. We show the utility of our method by designing a practical IPT system.

This paper improves the traditional algorithm for circuit diagram image recognition, which identifies each component as well as the topological relationship over an entire circuit diagram. This paper uses generalized nodes as the basis for analysis of the circuit connection relationship, and compares recognition speed and accuracy of the proposed method against the traditional recognition algorithm for image recognition of printed and handdrawn circuit diagrams. The comparison results show that the algorithm proposed in this paper is superior to the traditional algorithm.

Magnetic-coupled wireless power transfer technology is widely used in wireless charging for electric vehicles (EVs). In this paper, we establish a circuit diagram and a simulation model of WPT charging system for EVs. The magnetic fields from different sights and the E-field strength when the wireless power transmission system is working are simulated and judged by comparing with International Committee on Non-Ionizing Radiation Protection (ICNIRP) guidelines. The current and the voltage of the transmitter coil and receiver coil are given in this paper. Power grid harmonic is also evaluated as the working frequency is offset.

Constructing a complex functional gene circuit composed of different modular biological parts to achieve the desired performance remains challenging without a proper understanding of how the individual module behaves. To address this, mathematical models serve as an important tool toward better interpretation by quantifying the performance of the overall gene circuit, providing insights, and guiding the experimental designs. As different gene circuits might require exclusively different mathematical representations in the form of ordinary differential equations to capture their transient dynamic behaviors, a recurring challenge in model development is the selection of the appropriate model. Here, we developed an automated biomodel selection system (BMSS) which includes a library of pre-established models with intuitive or unintuitive features derived from a vast array of expression profiles. Selection of models is built upon the Akaike information criteria (AIC). We tested the automated platform using characterization data of routinely used inducible systems, constitutive expression systems, and several different logic gate systems (NOT, AND, and OR gates). The BMSS achieved a good agreement for all the different characterization data sets and managed to select the most appropriate model accordingly. To enable exchange and reproducibility of gene circuit design models, the BMSS platform also generates Synthetic Biology Open Language (SBOL)-compliant gene circuit diagrams and Systems Biology Markup Language (SBML) output files. All aspects of the algorithm were programmed in a modular manner to ease the efforts on model extensions or customizations by users. Taken together, the BMSS which is implemented in Python supports users in deriving the best mathematical model candidate in a fast, efficient, and automated way using part/circuit characterization data.

In the IoT for multi-sensor node application [1], there are demanded both high-performance for computation in an active mode, and an ultra-low standby power in a sleep mode for longtime buttery life in the energy efficient system. Ultra-low standby MCU with embedded NVM using 90 nm CMOS technology is also reported [2], but its SRAM cache is not sufficient for applying imaging processing which requires large memory capacity with imaging sensors in edge computing. Embedded SRAMs can be achieved fast read/write access within a few nanoseconds, but consume standby leakage power for data retention, being dominant power in the sleep mode. To reduce the standby leakage power of embedded SRAMs, the source bias design technique with power-gating is introduced on a bulk CMOS device [3]. In the resume standby (RS) mode, the VSS source bias control for SRAM array is demonstrated as an effective SRAM leakage power reduction. Besides, once the large SRAM array are into the resume standby mode, it takes long time to wake-up again. It is not applicable for high-speed CPU operation. Then, a fast resume standby mode (FRS) for cache memories is proposed to wake-up as much as fast. In that FRS mode, the power supply for SRAM peripheral is cutoff but SRAM array is keeping with a VDD supply. Each standby mode and its circuit diagram are summarized in Fig. 1. Meanwhile, dopant-less channel fully-depleted (FD) silicon-on-insulator (SOI) device is proposed [4]–[6] to improve the performance, power, and area (PPA) of embedded SRAMs. FD-SOI enables to control the back-bias (BB) dynamically under the buried-oxide (BOX) to reduce leakage current and/or to improve performance by applying reverse or forward bias, respectively. Fig. 2 presents the block diagram of BB control scheme for voltage scaling in IoT application with FD-SOI structure [7]–[9]. BBs for NMOS (VBN) and PMOS (VBP) can be applied individually by VBB generator (VBB Gen.) circuit. Four operation modes for smart IoT applications are considered. High-performance, normal, low-power operating modes are introduced, along with the required loads in the system. The sleep mode with SRAM data retention for long-term waiting in the sensor nodes is also proposed. Each supply voltage and BB is also shown in Fig. 2. The comparison of embedded SRAM leakage power is shown in Fig. 3.

DC-AC conversion with three phase single ended primary inductance inverter and boost converter is a advanced design when comparing with conventional topologies .Here only used four-switches and three-phase SEPIC inverter .This pro- posed inverter is designed to reduce the fare, difficulty and switching losses .Converter offer a design for the inverter with the combination of single-ended primary-inductance with DC- DC converter which can be upgrade the phase voltage than traditional FSTP single ended primary inductance inverter . For boost up the output voltage inserting a boost converter (DC-DC) between input side and the four switch three phase single-ended primary-inductance inverter . Constant current control strategy is used with the proposed topology . Working principle , circuit diagram and simulation diagrams also introducing in this paper .

Circuitry solution has been developed to create a prototype of the system for the registration of the high frequency human skin temperature oscillations. As they connected with blood circulation, such method allowing in the future to provide the registration of the pulse wave signal, for measuring heart rate in portable devices like smart watches and fitness bracelets. The miniature semiconductor chip diodes sensor has been used. The electronic system for the calibration of the device has been designed. For providing operation of the system in a full voltage range using the automatic set has been used for the maintenance of the operating point and of the necessary slope of the conversion factor (Volts / °C). The structural and circuit diagram has been developed. They consisted of two parts: the remoted preamplifier with the temperature sensor and the main block including all the other digital and analog parts. The developed system has following technical characteristics: the temperature resolution to be 0.01 °C and the thermal time constant of the sensor 0.05 s. The registration system testing has been performed in two ways: in a thermostat and on the human skin surface. Device contains plethysmo- and ECG-channels for obtaining data on the phases of cardiac cycles and synchronous analysis of physiological processes. The cross correlation coefficient between the temperature oscillations and the pulse wave signals laid in the diapason from 0.53 to 0.65.

The article covers a study of dynamic behavior of a vibration protection system with a controlled stiffener represented by a linear DC motor (LDCM). It also considers a dual-mass oscillation system with parallel layout of stiffeners and viscous friction elements (Kelvin circuit diagram). With due regard to the assumptions made, the authors have obtained mathematical models represented by transfer functions. In the disturbances channel, the models obtained for the input and output variables were represented by the mount acceleration, and the protected object acceleration, respectively; in the control channel, the models obtained for the input and output variables were represented by the extended force impact coming from the LDCM, and the protected object acceleration, respectively. A design of a closed-loop vibration protection system aimed at vibrational acceleration of the protected object was developed. Based on a simulation model complying with the obtained mathematical models, the authors have analyzed the efficiency of the developed system with integral and proportional plus integral control law controllers. Using the obtained data on system efficiency, the authors have defined recommendations for use of the said controllers in a vibration protection system with LDCM.

The structure and organization of the data transmission system for a distributed real-time information-control system are considered in this paper. The fault-tolerant structures of the local network combining packets switching and channels switching methods are proposed. Original circuit diagrams of transceivers based on a current loop with using feedback for error detection are developed.

This paper covers the design of a complementary metal oxide semiconductor (CMOS) pixel readout circuit with a built-in frequency conversion feature. The pixel contains a CMOS photo sensor along with all signal-to-frequency conversion circuitry. An 8×8 array of these pixels is also designed. Current imaging arrays often use analog-to-digital conversion (ADC) and digital signal processing (DSP) techniques that are off-chip1. The frequency modulation technique investigated in this paper is preferred over other ADC techniques due to its smaller size, and the possibility of a higher dynamic range. Careful considerations are made regarding the size of the components of the pixel, as various characteristics of CMOS devices are limited by decreasing the scale of the components2. The methodology used was the CMOS design cycle for integrated circuit design. All components of the pixel were designed from first principles to meet necessary requirements of a small pixel size (30×30 μm2) and an output resolution greater than that of an 8-bit ADC. For the photodetector, an n+-p+/p-substrate diode was designed with a parasitic capacitance of 3 fF. The analog front-end stage was designed around a Schmitt trigger circuit. The photo current is integrated on an integration capacitor of 200 fF, which is reset when the Schmitt trigger output voltage exceeds a preset threshold. The circuit schematic and layout were designed using Cadence Virtuoso and the process used was the AMS CMOS 350 nm process using a power supply of 5V. The simulation results were confirmed to comply with specifications, and the layout passed all verification checks. The dynamic range achieved is 58.828 dB per pixel, with the output frequencies ranging from 12.341kHz to 10.783 MHz. It is also confirmed that the output frequency has a linear relationship to the photocurrent generated by the photodiode.

The original version of this Article contained an error in Fig. 4. In the lower part of the three gene circuit diagrams in panel b, the flat-headed arrow linking lambdaCI to the tetR promoter incorrectly pointed to the tetR gene body. This has now been corrected in the HTML and PDF versions of this Article.

Sign language translator device is an assistive device that helps hearing impaired and normal people communicate with each other. The device can be either a camera vision-based or wearable glove-based system that translates hand gestures into text or voice. However, vision-based devices are susceptible to low light conditions and expensive. In contrast, glove-based devices are popular and low cost, but many designs utilized cable system that limits hand motions. The main focus of this work is to develop a wireless wearable sign language translator device, so that free-hand motions can be achieved. An Android-based smartphone application (app) has been developed to receive and display translated gestures from the wearable device in text form. The usage of smartphone app significantly reduces development cost, simplifies the design and improves the ease-of-use for hearing impaired communities. In this article, the developed hardware, circuit diagrams, app development as well as experimental results are presented.

The Systems Biology Graphical Notation (SBGN) is an international community effort that aims to standardise the visualisation of pathways and networks for readers with diverse scientific backgrounds as well as to support an efficient and accurate exchange of biological knowledge between disparate research communities, industry, and other players in systems biology. SBGN comprises the three languages Entity Relationship, Activity Flow, and Process Description (PD) to cover biological and biochemical systems at distinct levels of detail. PD is closest to metabolic and regulatory pathways found in biological literature and textbooks. Its well-defined semantics offer a superior precision in expressing biological knowledge. PD represents mechanistic and temporal dependencies of biological interactions and transformations as a graph. Its different types of nodes include entity pools (e.g. metabolites, proteins, genes and complexes) and processes (e.g. reactions, associations and influences). The edges describe relationships between the nodes (e.g. consumption, production, stimulation and inhibition). This document details Level 1 Version 2.0 of the PD specification, including several improvements, in particular: 1) the addition of the equivalence operator, subunit, and annotation glyphs, 2) modification to the usage of submaps, and 3) updates to clarify the use of various glyphs (i.e. multimer, empty set, and state variable).

Представленная статья содержит краткий анализ вихревых теплогенерирующих установок (ВТУ), обзор актуальности темы исследования, патентноинформационное обоснование, а также проанализированы современные научнообоснованные факты и результаты, как теоретических, так и экспериментальных работ. Исследованы основные основополагающие (физико-химические, технологические процессы, технико-экономические и законодательные обоснования), а также и другие актуальные вопросы касательно ВТУ. The presented article contains a brief analysis of vortex heat-generating plants, an overview of the relevance of the research topic, patent information justification, and also analyzes modern scientifically-based facts and results of both theoretical and experimental work. The basic fundamental (physicochemical, technological processes, feasibility and legislative justifications), as well as other relevant issues regarding vortex heat-generating installations are investigated.

The Systems Biology Graphical Notation (SBGN) is an international community effort that aims to standardise the visualisation of pathways and networks for readers with diverse scientific backgrounds as well as to support an efficient and accurate exchange of biological knowledge between disparate research communities, industry, and other players in systems biology. SBGN comprises the three languages Entity Relationship, Activity Flow, and Process Description (PD) to cover biological and biochemical systems at distinct levels of detail. PD is closest to metabolic and regulatory pathways found in biological literature and textbooks. Its well-defined semantics offer a superior precision in expressing biological knowledge. PD represents mechanistic and temporal dependencies of biological interactions and transformations as a graph. Its different types of nodes include entity pools (e.g. metabolites, proteins, genes and complexes) and processes (e.g. reactions, associations and influences). The edges describe relationships between the nodes (e.g. consumption, production, stimulation and inhibition). This document details Level 1 Version 2.0 of the PD specification, including several improvements, in particular: 1) the addition of the equivalence operator, subunit, and annotation glyphs, 2) modification to the usage of submaps, and 3) updates to clarify the use of various glyphs (i.e. multimer, empty set, and state variable). © 2019, Adrien Rougny et al., published by Walter de Gruyter GmbH, Berlin/Boston.This work is licensed under the Creative Commons Attribution 4.0 Public License.

A high-precision data sampling AC load analysis system is designed based on the core of ARM cortex M3 microcontroller named NXP LPC1500. The hardware composition, circuit design of each hardware part and the software design of the system are discussed in detail. The voltage, frequency, energy (W-h), harmonic current and current curve are also added into the analysis system. The circuit diagram of the functional part of the main circuit is provide, and the flow chart of the software design for the microcontroller are given. The experimental data show that the system works stably and reliably in actual application.

This paper mainly studies the effect of binary algorithm and truth table on digital circuit, and analyzes its logic circuit (from 0 to 9). Binary algorithm is used to make its truth table, draw the circuit diagram and make its PCB template.

In many states, electric fences are used to prevent animals from leaving a designated area, for example for grazing. They are quite well known by most students and can therefore serve as daily-life examples of electric circuits. Besides helping to grasp the ideas of Kirchhoff’s laws for voltages and currents in circuits according to loop and junction rules, they can also serve as introduction to the topic of conduction of electricity by humans and respective effects (in contrast to electric fences, the latter can also be studied experimentally in the classroom). Here we provide background information on the circuit diagrams of electrical fences that also explains the so-called Brainiac YouTube videos on the topic. While electric fences are designed not to be dangerous to humans or animals due to the short duration of the electrical pulses, students and teachers are strongly discouraged from attempting to replicate the scenes enacted in the video.

To achieve high-voltage reactive power compensation, a 5.6kV 17-level STATCOM under SVG Condition is presented. In this paper, we use a cascaded H-bridge multilevel star-connection converter whose system structure and circuit schematic are described. Then by using the phase-shifted carrier modulation strategy and the active-reactive current decoupling method, the STATCOM performs quite well. Moreover modulation strategy of the 17-level STATCOM based on the active disturbance rejection control (ADRC) is presented and the analytical formulas are described. For implementation, control strategy for DC bus voltage balance in cascaded H-bridge multilevel converters, time average distribution method and extreme value offset method are applied in our design. Finally, simulation results demonstrate that the proposed 17-level STATCOM is capable of reactive power compensation, simultaneous controlling and balancing the DC side voltages during the work and verify that high-voltage reactive power can be accurately and effectively compensated., Za postizanje kompenzacije jalove snage uz visoki napon, predstavljen je STATCOM s 5.6 kV i 17-razina uz SVG uvjet. U ovom radu koristimo kaskadni višerazinski H-mosni pretvarač u zvijezda spoju uz opisane strukturu i shemu spoja. Zatim korištenjem strategije modulacije s fazno-pomaknutim signalom nosioca i metode rasprezanja radno-jalove struje, STATCOM pokazuje prilično dobro vladanje. Uz to, prikazana je strategija modulacije 17-razinskog STATCOM-a zasnovana na upravljanju s aktivnim odbacivanjem smetnji (ADRC) te su opisane analitičke formule. Za implementaciju, u naš dizajn primjenjene su upravljačka strategija balansiranja napona DC sabirnice u kaskadnom višerazinskom H-mosnom pretvaraču te metoda vremenskog uprosječavanja razdiobe i metoda ekstremne vrijednosti pomaka. Konačno, simulacijski rezultati pokazuju da je predloženi 17-razinski STATCOM sposoban za kompenzaciju jalove snage, istovremeno upravljanje i balansiranje napona DC strane u radu te potvrđuju da je jalovu snagu uz visoki napon moguće točno i djelotvorno kompenzirati.

A prototype system for programmed distraction with electrical stimulation of the osteotylus formation is presented. The basic circuit diagram of the system is described. The system implements a method for distraction force measurement using an inductive sensor. A software application for remote control of the limb lengthening procedure and visualization of the curve of bone tissue tension vs. distraction period is described.

In view of the universality of the parallel connection of solar cells and their mismatch problem, in the present paper, we select two shunt solar cells (connected in parallel) as our research object, and use the equivalent one-diode circuit of the solar cell and the analysis of the two-body model. At first, the equations of current and voltage are deduced from the related electrical laws and the circuit diagram of the two solar cells connected in parallel. Then, according to the experimentally measured data of typical single-crystalline silicon solar cells (125 mm×125 mm), we select the appropriate simulation parameters. Following this, by using the photo-generated current, the shunt resistance, and the serial resistance of one of the shunt solar cells and the load resistance as independent variables, in turn, the changing characteristics of each branch current in the two shunt solar cells are numerically discussed and analyzed for these four cases for the first time. At the same time, we provide a simple physical explanation for the modeling results. Our analyses show that these parameters have different impacts on the internal currents of solar cells connected in parallel. These results provide a reference to solve the problem of connecting solar cells and to develop higher efficiency solar cells and systems. Meanwhile, the results will contribute to a better comprehension of the reasons for efficiency loss of solar cells and systems, and deepen the understanding of the electrical of solar cells behavior for high performance photovoltaic applications.

The article analyzes the elements of the magnetorheological drive systems. It is examining the way of the regulating of discharge in the control flow path by means of magnetorheological control device and is provided the method of workflow automation for magnetorheological control device. It describes the ways to implement the transmission of control signals and reverse communication by pressure. It presents the method for the calculation of control signal by microcontroller and the example of one control algorithm. The text covers the electrical schematic circuit diagram for workflow of magnetorheological control device; this allows the use of the magnetorheological control devices in the actuators of automatic and mechatronic systems. It describes the way to implement the workflow of magnetorheological control devices by means of differential pressure gauge. It also describes a functional scheme the operation of the differential pressure gauge. The authors offer the hydraulic schematic circuit diagram to include the magnetorheological control device in the control magnetorheological flow path with the thermostatic system which allows the temperature regulation of the rheological properties of magnetorheological fluid. It presents the method to implement the temperature control of working fluid in the magnetorheological systems. It is discussed the features of thermostatic control systems which is established on the basis of thermoelectric semiconductor elements. It describes the advantages of the using of proposed system. It shows the static characteristics of the magnetorheological control devices in automatic mode of fixed flow characteristics. It is analyzed the results of field experiment and made a comparison with the results of numerical modeling of workflow for magnetorheological control devices. The effectiveness of a method of workflow automation of the magnetorheological control device is confirmed with calculations and experiments.

This paper addresses the issue of sorting rough errors of remote measurements. Available programs for processing and evaluation of incoming telemetry data do not provide a full capacity to identify the simplest, but often rough telemetry data errors with due regard to its binding to the circuit diagram. That is a main cause of unreliable results at condition estimation and related further calculations. The paper proposes to combine a simple check of measurement conformity at certain time sections with analysis of statistical remote measurement data for the time interval specified. Functional relations to be checked include: power balance control based on raw telemetry data, power loss analysis calculated with various measurements on the line as well as control of interconnected measurements. Measurement reliability is estimated by means of statistical and correlation analysis of telemetry data.

The improvement of the sensor power supply system in intelligent greenhouse is a research hotspot at present. In intelligent greenhouse environment monitoring demand is high, the traditional cable power supply volume is big, poor security and inconvenient to the characteristics of the paper by using the principle of the wireless power supply, design a kind of orthogonal magnetic field, the Transmitting coil and Repeating coil to receive the mutual inductance coil superposition to satisfy the sensors in the power supply requirements of different spatial location, and greatly reduces the power supply equipment covers an area of. The theoretical circuit diagram is given and the theoretical analysis and formula derivation of uniform magnetic field are performed. Mathcad was employed to simulation analysis of Receiving coils in different states, and Maxwell was used for comparison of hypnotic field cloud images. At the same time, the influence of different relative positions on the receiving power of wireless power transmission system is tested and discussed, and the method to improve the wireless power supply transmission efficiency of smart greenhouse sensor is explored. Finally, the feasibility of the system is verified by simulation and experiment.

This work proposes novel strategy to design 2-input ternary (base-3) logic circuits using double pass-transistor logic (DPL). The concept has been explored with respect to 2-input TXOR gate. The circuit diagram of proposed DPL-based TXOR, TAND and TOR logic gate is presented. The proposed T-Cells are designed and optimised using BSIM3 device model with 1.8 V supply rail and at 25°C temperature on TSMC 0.18 µm CMOS technology. The transient response from T-Spice simulatio is validated and the speed-power performance is recorded. Next, the 2:9 ternary decoder based on proposed idea has been explained. The decoder circuit is also designed with 1.8 V supply rail at 25°C temperature on TSMC 0.18 µm CMOS technology. The trit value '0', '1' and '2' are represented with 0 V, 0.9 V and 1.8 V respectively. As per simulation result the proposed 2:9 ternary decoder dissipates 383.57 µW average power and takes 64.87 ps to generate final output.

Building circuits on breadboards is an activity which requires a lot of attention and thinking. If there is a way to guide this process by using modern technologies, the learning process can be made more effective and interactive. This study proposes a solution that provides students with an augmented reality visualization of the expected circuit on a breadboard before they actually make the circuit. The proposed system can be divided into four main modules based on their functionality (a) extracting possible information from the electronic components, (b) scanning circuit diagrams for identifying circuit symbols and their connectivity, (c) finding the appropriate arrangement of the electronic components on the breadboard and (d) using augmented reality to visualize the circuit on a breadboard. This solution provides an innovative approach to facilitate the learning process of students by making electronic circuit building interesting and interactive.

This paper presents a low-noise transimpedance amplifier (TIA) employing chopper-stabilized technique for nanopore applications. The TIA, which is used as a headstage for the monitoring system, must achieve low-noise performance to accurately measure a minute ionic current signal generated from the nanopore. In this work, we analyze detailed input- referred noise current of the capacitive-feedback TIA and propose a core amplifier adopting the chopper-stabilized technique to effectively reduce flicker noise in a bandwidth of interest for nanopore applications. This proposed circuit schematic is designed by harnessing 0.35 $\mu \mathrm{m}$ CMOS process and is verified using elaborate simulation results.

In recent years, with the development of information technology, a new uninterruptible power supply system (UPS) has emerged. The rectifier circuit is one of the most important modules of the UPS, and its wiring mode and waveform variation will affect the voltage and current of the output terminal. This topic first introduces the classification, principle and circuit diagram of rectifier circuits with many applications in modern power electronics technology, and the waveforms, advantages and disadvantages of different circuits have been analyzed [1], The principle, control method and process of the editable chip is used in the experimental part are discussed. Secondly, an improved circuit based on bridge rectifier circuit is designed. The parameter setting, wiring mode and control circuit turn-off value of the main circuit are analyzed. The variation of the output waveform of the improved circuit is verified by experiments. The rationality and reliability of the circuit is testified.

In this paper we show how a bulky analog active filter, described only by its circuit diagram, can be converted to the corresponding digital filter, having the same frequency gain and phase characteristics. The state-space based approach has been implemented using Python high-level programming language. Experimental results are also presented.

This Research-to-Practice Work in Progress paper presents DCLab, a web-based system for conducting digital logic experiments online, to improve both the effectiveness and the efficiency of digital logic experiment teaching. DCLab covers all experimental contents required by traditional digital logic experiment classes. It allows the students to draw circuit diagrams or to write VHDL code to design their own circuits, and it provides complete simulation functions. DCLab records the progress of each student and makes it convenient for a student to review the history of his practice. Furthermore, for the instructors, they are able to post homework assignments on DCLab, and the system will automatically add homework projects to the students' home pages. Statistics about how the students perform on the homework will be displayed to the instructors, which may help them develop more effective courses. We have tested DCLab among students in the digital logic course, and the results have confirmed its validity., add data analysis

The engineering of automated Production Systems (aPS) involves various disciplines (i.e. mechanical, electrical and software engineers). In order to address discipline-specific objectives in the engineering process, a multitude of models are developed. The information within these models is represented by different variants of engineering documents. For instance, the information contained in an ECAD model can be stored in XML-based documents or can be represented by printed, paper-based electric circuit diagrams. Models and corresponding documents change cyclically, as the engineering process of an aPS is generally not straightforward. Consequently, changes made to those documents need to be propagated back to their original model, so as to maintain consistency. Depending on the meaning and the importance of the change, further action may be required (e.g. re-design of components). This paper proposes and evaluates the retrieval and model-based reconstruction of information from paper-based electric circuit diagrams in aPS, containing handwritten annotations.

In this article we present the model and closed loop control design for a novel proposal of a DC-AC converter based on the basic Buck topology, here called ‘Buck Inverter’. Due to the susceptibility of power converters to uncertainty that may be present in their design, it is necessary to implement a control strategy to counteract said uncertainties. The design of a closed loop controller requires inside knowledge of the dynamic characteristics of the system to be controlled; thus, it is necessary firstly to model and simulate the converter proposed. After model validation, a PID controller was simulated assuming linear properties for the system. For model and controller validation, comparative graphs are shown, using the system model via Simulink and electronic schematic capture via LTSPICE.

In this paper is developed the methodology to describe virtual equipment in the database of the Engine for Virtual Electrical Engineering Equipment (EVEEE). Each equipment is defined on two levels: graphical and functional. The graphical level describes how the equipment, its virtual components and inputs/outputs appear to the user. The functional level includes the circuit schematic, the variables and operations required to operate it as well as the manipulation of the components and their relation to the circuit. The equipment visual and functional representation is defined entirely in the database of the environment, in order to provide the required flexibility and ease of creation.

The article presents the results of the development of a universal control system for semiconductor power converters based on a programmable logic devices (PLD). As a result of the work done, shared functional modules for the various control systems of semiconductor converters were determined, the features of implementing modules on programmable logic were considered, and the algorithms for controlling converters on mathematical models were studied. The principal circuit diagram of the universal control system of the converter is synthesized on the basis of a combination of programmable logic devises and a microcontroller. The topologies of printed circuit boards and their layout in a single module of the universal control system of the converter are developed; the built-in microcontroller software was written and debugged in the assembler language. An experimental sample of the control system was made and its joint tests with a prototype of a low-power three-phase inverter equipped with a load simulator were carried out, oscillograms of control pulses and output voltage were obtained in various modes of inverter control.

In this work, the characteristic tracer for studying of family of output characteristics of bipolar transistors is designed, made and tested. The circuit diagram of a characteristic tracer, the description of operation of its compound digital and analog modules, graphics of voltage and currents in key knots of the circuit diagram and explanation to them are provided.