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People whom the author would like to thank for their assistance in the creation of the book "Materials" are mentioned including Daman Panesar, Sandra Parker and Rolf Prade.

Highlights: [•] We investigated current hysteresis mechanism in Pt/a-IGZO/TaO x /W structure that shows rectifying characteristics. [•] In order to understand the role of each layer and the origin of memory effect, we designed and performed two model experiments on the basis of preliminary experimental results and analysis. [•] Current hysteresis (memory effect) is attributed to the bias dependent resistance change in TaO x layer due to positively charged oxygen vacancy exchange between two oxides. [ABSTRACT FROM AUTHOR]

Abstract: In this work, Y2O3 was evaluated as a gate insulator for thin film transistors fabricated using an amorphous InGaZnO4 (a-IGZO) active layer. The properties of Y2O3 were examined as a function of various processing parameters including plasma power, chamber gas conditions, and working pressure. The leakage current density for the Y2O3 film prepared under the optimum conditions was observed to be ~3.5×10−9 A/cm2 at an electric field of 1 MV/cm. The RMS roughness of the Y2O3 film was improved from 1.6 nm to 0.8 nm by employing an ALD (Atomic Layer Deposition) HfO2 underlayer. Using the optimized Y2O3 deposition conditions, thin film transistors (TFTs) were fabricated on a glass substrate. The important TFT device parameters of the on/off current ratio, sub-threshold swing, threshold voltage, and electric field mobility were measured to be 7.0×107, 0.18 V/dec, 1.1 V, and 3.3 cm2/Vs, respectively. The stacked insulator consisting of Y2O3/HfO2 was highly effective in enhancing the device properties. [Copyright &y& Elsevier]

Abstract: When hafnium oxide (HfO2) is directly deposited on Si by the RF sputtering method, Hf silicide is formed and post-deposition anneal (PDA) at 400°C transforms Hf silicide to Si suboxide plus Hf suboxide. The leakage current density for the 〈aluminum (Al)/HfO2/Si(100)〉 diodes without PDA is high due to the high density interface states near the Fermi level (0.86eV above the Si valence band maximum, VBM) and minute conduction channels. PDA at 400°C eliminates the interface states and the conduction channels, and improves the characteristics of the HfO2 layer, but interface states are newly formed at 0.53eV above the VBM, resulting in still high leakage current density. Silicon nitride (SiN) layers formed by Si nitridation using N2-plasma generated by the low energy electron impact method possess a high nitrogen atomic concentration ratio, N/(N+O) of 0.65. When a 1.0nm SiN layer is inserted between HfO2 and Si, interfacial reaction is completely prevented, resulting in a smaller effective oxide thickness, EOT of 1.4nm. In spite of the smaller EOT, the leakage current density is nearly the same as that with no SiN layer, possibly due to the prevention of the formation of the conduction channels. PDA at 400°C improves HfO2 characteristics without causing the interfacial reaction, leading to a decrease in the leakage current density. [Copyright &y& Elsevier]

Abstract: Effects of BaO–B2O3–SiO2 glass additive on densification and dielectric properties of BaTiO3 ceramics started from hydrothermally synthesized nano-sized BaTiO3 powders (∼60nm) were investigated. Addition of an optimal amount of the BaO–B2O3–SiO2 glass to BaTiO3 compacts accelerated densification with a limited grain growth. The sintering temperature of the BaTiO3 ceramics was lowered to 900°C with high density above 93%. Furthermore, there was no formation of secondary phases in the sintered bodies at the optimal amount of the glass. Higher dielectric constant was obtained from the BaTiO3 ceramics with 1wt% BaO–B2O3–SiO2 glass, sintered at 900°C, than those observed for the pure BaTiO3 sintered at 1350°C. [Copyright &y& Elsevier]

(Ba, Sr)RuO3 oxide electrodes have been studied for high dielectric (Ba, Sr)TiO3 film in DRAM capacitors. Metal organic chemical vapor deposition (MOCVD) is used for large-scale deposition and provides better step coverage properties. In this work, methoxyethoxytetramethylheptanedionate (METHD) precursor and solvent [n-butylacetate(C6H12O2)] were mixed together into a single solution source. Post deposition annealing is carried out in oxygen atmosphere using rapid thermal annealing (RTA) to investigate the effect of organic impurities such as carbon during deposition. After annealing, resistivity of the BSR film decreased drastically compared to the as-deposited film. X-ray diffraction (XRD) and X-ray photoelectron spectroscopy (XPS) analysis were used to describe this phenomenon accurately. The decrease in carbonate with increasing annealing time was confirmed by XRD analysis. [Copyright &y& Elsevier]

Abstract: In this investigation, an operating voltage as low as 5V has been achieved for Oxide TFT with Y2O3 as a gate oxide and a-IGZO as an active layer. The OTFT has been fabricated at room temperature using RF sputter. The mobility and threshold voltages are 11.3cm2/Vs and 3.4V for the device with W/L =0.8, respectively. The annealing at 400°C in N2 containing 5% H2 ambient has been utilized to improve the electrical performance of TFT. The on–off current which is determined by gate dielectric has been observed to be 104. It has also been observed that the dielectric properties of gate oxide deteriorate on annealing. The dielectric constant of Y2O3 is observed in the range between 5.1 and 5.4 measured on various devices. [Copyright &y& Elsevier]

The effects of hydrogen incorporation in the active layer of amorphous InGaZnO (a‐IGZO) thin‐film transistors (TFTs) on device characteristics and instability under positive bias stress (PBS) and positive bias temperature stress (PBTS) are studied. To control the amount of incorporated hydrogen, rapid thermal annealing (RTA) treatment is conducted on the gate insulator layer before active layer deposition. It is confirmed that the amount of residual hydrogen in the gate insulator layer decreases with increasing RTA treatment time. Device stability is examined with RTA treatment times of 1 and 3 min under PBS. The device fabricated with a shorter RTA treatment time shows relatively better stability. This result is attributed to defect passivation by hydrogen that diffuses to the active layer from the gate insulator during the post‐annealing process. Additionally, TFT shows the negative shift of Vth under a high‐temperature PBTS condition. This result is due to the additional diffusion of residual hydrogen from the gate insulator into the active layer and hydrogen‐related deep state transition in the active layer by external thermal energy and a PBS condition. [ABSTRACT FROM AUTHOR]

In this work, the effect of control oxide thickness on the storage characteristic of MOSCAP based on nano floating gate memory (NFGM) structure was explored in order to apply the results to a stepped NFGM. A stepped MOSCAP structure can realize multi-level storage characteristic via control of electric field strength in the tunneling oxide using a stepped control oxide. Through simulation, we have predicted that a 20 nm step height is optimal to exhibit multi-level storage behavior for a 40 nm thick HfO 2 control oxide. First, we prepared two step-free NFGM MOSCAP structures consisting of Au nanocrystals: one with 20 nm thick HfO 2 control oxide and the other with 40 nm thick HfO 2 control oxide. The C–V behavior of NFGM MOSCAP structures having different control oxide thicknesses was measured in a parallel mode in order to simulate the stepped MOSCAP structure. Finally a stepped NFGM MOSCAP stricture was fabricated. As a consequence, we successfully demonstrated multi-level storage behavior in an NFGM MOSCAP structure with 40/20 nm step-shape control oxide as simulation predicted. [ABSTRACT FROM AUTHOR]

Abstract: In this study, the characteristics of positive bias temperature instability (PBTI) and cyclic constant voltage stress (CVS) in thin film transistors (TFTs) incorporating Ni-FALC poly-Si film were investigated under various stress conditions. In PBTI, the threshold voltage (V TH) was degraded by a vertical electric field on the gate stack, and an abrupt variation of V TH was attributed to the creation of defects in the gate oxide and the increase of the effective interface trap state. In contrast to the formation of defects, the poly-Si film was not sensitive to PBTI stress (the fluctuation in the grain boundary trap density was just 5.6%). In two-cycle CVS of devices before and after O2 plasma treatment, the direction of the V TH shift and polarity of bias showed good correlation. In particular, the O2 plasma-treated device demonstrated low Subthreshold swing (S.S) and low minimum drain current compared to the untreated one. The improvement of device performance seemed to originate from the reduction of effective interface trap sites and leakage current paths. [Copyright &y& Elsevier]