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This Work was funded by King Abdul-Aziz City of Science and Technology (KACST) and the Flemish government, department EWI. The authors would like to thank Tom De Geyter, Greetje Godiers and Guido Huyberechts from Flamac in Gent for sputtering of the metal layers. AGC is acknowledged for providing the Mo/SLG substrates.

In order to improve the electrical performances of Cu2ZnSnSe4 (CZTSe) based solar cells, the standard CdS buffer layer was replaced by (Cd,Zn)S processed by chemical bath deposition. The morphology and composition of the (Cd,Zn)S thin films were studied as a function of [Zn]/([Zn] + [Cd]) ratio in the chemical bath (80, 85 and 90%). The CZTSe/(Cd,Zn)S solar cells with and without Cd partial electrolyte (Cd PE) treatment were compared to CZTSe/CdS reference devices using current–voltage and external quantum efficiency measurements. The (Cd,Zn)S thin films show a non-homogeneity of Zn distribution and phase formation, with a shift from Zn(O,OH)x to ZnS phase when increasing the deposition time and a decrease of the layers thicknesses when increasing the Zn concentration in chemical bath. A model for the growth of (Cd,Zn)S thin films is proposed. The resulting CZTSe/(Cd,Zn)S devices show an important reduction of the barrier at the hetero-interface, which is attributed to the lower density of O contamination in (Cd,Zn)S compared to CdS, inducing a lower density of deep p-type recombination centers. Despite the reduced compensation of the buffer layer, CZTSe/(Cd,Zn)S devices show a deterioration of the open circuit voltage and the fill factor with the increase of Zn content in (Cd,Zn)S. These electrical losses were avoided by Cd PE treatment prior to the deposition of (Cd,Zn)S. This work was supported in part by the Flemish government, Department of Economy, Science and Innovation (EWI). Tom De Geyter, Greetje Godiers and Guido Huyberechts from Flamac in Gent are acknowledged for sputtering of the metal layers. AGC is acknowledged for providing substrates.

This work presents a detailed analysis of the microstructure and the composition of our record Cu 2ZnSnSe4 (CZTSe)-CdS-ZnO solar cell with a total area efficiency of 9.7%. The average composition of the CZTSe crystallites is Cu 1.94 Zn 1.12Sn0.95Se3.99. Large crystals of ZnSe secondary phase (up to 400 nm diameter) are observed at the voids between the absorber and the back contact, while smaller ZnSe domains are segregated at the grain boundaries and close to the surface of the CZTSe grains. An underlying layer and some particles of Cu xSe are observed at the Mo-MoSe2-Cu2ZnSnSe4 interface. The free surface of the voids at the back interface is covered by an amorphous layer containing Cu, S, O, and C, while the presence of Cd, Na, and K is also observed in this region.

Current-voltage analysis using different optical band pass filters has been performed on Cu2ZnSnSe4 and Cu2ZnSn(S, Se)(4) thin-film solar cells. When using red or orange light (i.e. wavelengths above 600 nm), a distortion appears in the I-V curve of the Cu2ZnSnSe4 solar cell, indicating an additional potential barrier to the current flow in the device for these conditions of illumination. This barrier is reduced when using a Cu2ZnSn(S, Se)(4) absorber. Numerical simulations demonstrate that the barrier visible under red light could be explained by a positive conduction band offset at the front interface coupled with compensating defects in the buffer layer.

Mechanical alloying and ball milling are low cost, up-scalable techniques for the preparation of high purity chalcogenide nanopowders to be used as precursor material for printing thin film solar cells. In this study, high purity copper indium selenium (Cu-In-Se) alloy nanopowders with 20-200 nm particle size were synthesized from macroscopic elemental Cu, In and Se powders via mechanical alloying and planetary ball milling. The particle size distribution, morphology, composition, and purity level of the synthesized Cu-In-Se alloy nanopowders were investigated. Thin Cu-In-Se alloy nanopowder ink coatings, deposited on Mo-coated glass substrates by doctor blading, were converted into a CuInSe2 semiconductor film by selenization heat treatment in Se vapor. The CuInSe2 film showed semiconducting band gap around 1 eV measured by photoluminescence spectroscopy. CuInSe2 absorber layer based thin film solar cell devices were fabricated to assess their performance. The solar cell device showed a total efficiency of 4.8%, as measured on 0.25 cm(2) area cell. (c) 2014 The Society of Powder Technology Japan. Published by Elsevier B.V. and The Society of Powder Technology Japan. All rights reserved. This work is supported by the 'Strategic Initiative Materials' in Flanders (SIM) and the Institute for Innovation through Science and Technology in Flanders (IWT) under the Solution based Processing of Photovoltaic Modules (SoPPoM) program. Hamamatsu Photonics is acknowledged for providing the time resolved photoluminescence measurement system.

Cryogenic soft X-ray imaging spectrometers are currently being developed for applications in the fields of astronomy and material sciences. In this paper we present experiments on optimized single devices, which show measured energy resolutions of 4.6 eV, 8.1 eV and 20.5 eV at 525 eV, 1.5 keV and 6 keV respectively. These energy resolutions combined with a quantum efficiency of more than 40% in the energy range from 0.5 to 2 keV together with a count rate capability of 15 kHz demonstrate the overall good performance of single Superconducting Tunnel junctions (STJs). Assembling these optimized single devices in a matrix read-out would provide the practical basis for a soft X-ray imaging spectrometer.

This paper gives an overview of measurement techniques to assess border traps in high-k gate dielectrics deposited on high-mobility channel materials, like Ge and InGaAs. A short description of the measurement principle and bulk oxide trap analysis will be provided for three methods, namely, low-frequency (1/f) noise, Deep-Level Transient Spectroscopy and AC transconductance dispersion. Practical application is illustrated either on metal-oxide-semiconductor capacitors or transistors, depending on the technique.

Time-resolved photoluminescence analysis shows that as-grown Cu2ZnSnSe4 (CZTSe) thin films degrade when they are exposed to air. The analysis of the films prior to degradation reveals relatively long carrier lifetimes. The increase of the recombination rates significantly affects the performance of the related solar cells. Among all the chemical treatments tested to recover the lifetime of the carrier after air exposure, the KCN etching seems to be the most efficient.

In this study, an ultra-thin MoO3 layer synthesized by a solution-based technique is introduced as a promising interfacial layer to improve the performance of kesterite Cu2ZnSnSe4 (CZTSe) solar cell. Solar cells with 10 nm of MoO3 between Mo rear contact and CZTSe had larger minority carrier life time and open-circuit voltage compared to the reference solar cells. Temperature dependent current density–voltage measurement indicated that the activation energy (EA) of the main recombination is higher (∼ 837 meV) in solar cells with MoO3 layer, as compared to conventional solar cells where EA ∼ 770 meV, indicating reduced interface recombination. A best efficiency of 7.1% was achieved for a SLG/Mo/MoO3/CZTSe/CdS/TCO solar cell compared to the reference solar cell SLG/Mo/CZTSe/CdS/TCO for which 5.9% efficiency was achieved.

The complexity involved in obtaining pure Kesterite Cu2 ZnSnSe4 (CZTSe) thin film primarily arises due to its narrow region of stability, leading to the presence of unavoidable binary selenides of the constituent metals. This study offers an insight on the formation of Cu selenides when the amount of Cu is varied in the precursor from Cu poor to Cu rich. The amount of Cu selenides was found to decrease when the composition of CZTSe absorber approached Cu rich conditions but functional devices were not obtained. Detailed characterizations also showed that the Cu and Sn binary phases were present at the backside interface of CZTSe solar cells. However with an increase in the selenization temperature it was found that the amount of Cu selenides and other secondary phases could be drastically minimized or even eliminated leading to high efficiency devices.

Mechanical alloying and bead milling techniques were used for the low cost preparation of precursor inks for printing CIS-Se absorber layers. The plate shaped microflake particle precursor is composed of nanostructured elemental Copper-Indium-Sulfur and Selenium. The high aspect ratio microflakes have a typical thickness around 200 nm and a diameter of 1–5 µm. The plate shape of the microflakes facilitates the deposition of a high quality film during the coating process. Moreover, the nanostructured nature of the microflakes improves the sintering behavior during selenization. The milling technique is relatively low cost, easily up-scalable, fast and very flexible in targeted composition.

As CMOS continues to approach the physical limits of silicon, interest has greatly increased in the use of high mobility alternatives for devices beyond the 14 nm technology node. By virtue of their high electron and hole mobilities, InGaAs and Ge respectively have emerged as the most promising candidates for n- and p-MOS but the co-integration of these materials on the same Si wafer remains a significant challenge for the introduction of a III-V/Ge CMOS solution. A promising option for integrating Ge and III-V materials on the same Si wafer is the use of the aspect-ratio-trapping (ART) technique. In this paper we present the results of using the ART technique to fabricate InGaAs based devices on 200mm Si wafers and to create virtual III-V/Ge substrates. While further development will be needed to integrate InGaAs and Ge devices on the same wafer these results create a path for the realization of a high-mobility CMOS solution

High mobility channel materials and new device structures will be needed to meet the power and performance specifications in future technology nodes. In these new material systems and devices various electrically active defects are present at or close to the interface between the high-k dielectric and the alternative channel material which are a major concern for both the performance and the reliability of these new devices.

We have developed a theory of the anomalous sub-gap currents in small gap superconducting multiple tunnelling junctions. The sub-gap current at low bath temperatures is predicted to follow a sequence of steps at 2Δ/n, where n is an integer. These steps occur because in small gap multiple tunnelling structures a quasiparticle has the chance to increase its energy successively after each tunnelling event, until eventually its energy exceeds 3Δ. At this point, it relaxes down the edge with the emission of 2Δ phonon which triggers a Cooper pair break resulting in excess sub-gap current.

Over the last years there has been lots of interest in the use of germanium and III-V compounds as potential replacements for silicon channels. Germanium with its high hole mobility has attracted lots of attention for its application in advanced pMOS devices. Indium gallium arsenide compounds, with their intrinsically superior electron mobility and high saturation velocity, are considered as a candidate for nMOS devices beyond 14 nm node technology.

Due to the high carrier mobility, Ge and III-V semiconductors are attractive as active channels for post-Si metal oxide semiconductor (MOS) devices. However, integration of gate dielectrics on high-mobility substrates is frequently jeopardized by the electrical activity of traps nearby the interface. Active traps determination at the interface between the two semiconductors with gate dielectrics has been conducted with the aim to validate several electrical passivation methodologies. In particular, GeO2 and LaGeOx passivations of Ge are investigated by conjugating magnetic resonance spectroscopy and electrical response of the MOS capacitors. The case of In0.53Ga0.47As is addressed by tailoring the surface treatments and the growth parameters in the trimethyaluminum based atomic layer desposition of Al2O3 films. The electrical quality of the Al2O3/In0.53Ga0.47As interface is assessed by exploring the temperature dependent electrical response of the MOS capacitors and admittance spectroscopy of the active traps energetically distributed in the In0.53Ga0.47As bandgap.

In this work we investigate the effect of different III-V surface passivation strategies during atomic layer deposition of Al"2O"3. X-ray photoelectron spectroscopy indicates that bare As-decapped and sulfur passivated In"0"."5"3Ga"0"."4"7As present residual oxides on the surface just before the beginning of the Al"2O"3 deposition while the insertion of a Ge interface passivation layer results in an almost oxide free Ge/III-V interface. The study of the initial growth regimes, by means of in situ spectroscopic ellipsometry, shows that the growth of Al"2O"3 on Ge leads to an enhanced initial growth accompanied by the formation of Ge-O-Al species thus affecting the final electrical properties of the stack. Alternatively, deposition on decapped and S-passivated In"0"."5"3Ga"0"."4"7As results in a more controlled growth process. The sulfur passivation leads to a better electrical response of the capacitor that can be associated to a lower oxide/semiconductor interface trap density.

In this work we present an in situ investigation of the interface composition between an In0.53Ga0.47As substrate and an Al2O3 oxide grown by molecular beam deposition in ultra high vacuum conditions. In the effort to improve the chemical quality of the interface, reduction of semiconductor-oxygen bonding at the interface can be obtained by growing a few thick pure Al layer before starting exposure of the surface to the atomic oxygen flux. Conversely, when a Ge interface passivation layer is intercalated between the semiconductor and the oxide stack, the interface chemistry is governed by Ge reaction with other species (Al, O), leading only to a partial suppression of the interface oxides. © 2010 Elsevier B.V. All rights reserved.

We show that thermal activation of quasiparticles from local traps is responsible for the temperature variation of responsivity observed for some superconducting tunneling junction photon detectors. With this model, the depth of the local traps in two different proximized Ta structures was found to be the same, 0.20±0.02 meV.

A technique is presented and verified to predict the electrostatic degradation of MOSFET performance, due to interface traps and their energy distribution. It provides an estimate of the technology's sub-threshold slope degradation based on an extracted interface traps spectrum, without the need for transistor fabrication.

The use of high mobility channel materials such as Ge and III/V compounds for CMOS applications is being explored. The introduction of these new materials also opens the path towards the introduction of novel device structures which can be used to lower the supply voltage and reduce the power consumption. The results illustrate the possibilities that are created by the combination of new materials and devices to allow scaling of nanoelectronics beyond the Si roadmap.

Capping III–V compound surfaces with Ge ultra-thin layer might be a viable pathway to passivate the electrically active interface traps which usually jeopardize the integration of III–V materials in metal-oxide-semiconductor devices. As the physical nature of such traps is intrinsically related to the chemical details of the interface composition, the structural and compositional features of the Ge/GaAs interface were thoroughly investigated in two different configurations, the atomic layer deposition of La-doped ZrO 2 films on Ge-capped GaAs and the ultra-high vacuum based molecular beam deposition of GeO 2 /Ge double stack on in situ prepared GaAs. In the former case, the intercalation of a Ge interface layer is shown to suppress the concentration of interface Ga–O, As–O and elemental As bonding which were significantly detected in case of the direct oxide deposition on GaAs. In the latter case, the incidence of two different in situ surface preparations, the Ar sputtering and the atomic H cleaning, on the interface composition is elucidated and the beneficial role played by the atomic H exposure in reducing the semiconductor–oxygen bonds at the interface level is demonstrated.

The effect of interface state trap density, D it , on the current–voltage characteristics of four recently proposed III–V MOSFET architectures: a surface channel device, a flat-band implant-free HEMT-like device with δ -doping below the channel, a buried channel design with δ -doping, and implant-free quantum-well HEMT-like structure with no δ -doping, has been investigated using TCAD simulation tools. We have developed a methodology to include arbitrary energy distributions of interface states into the input simulation decks and analysed their impact on subthreshold characteristics and drive current. The distributions of interface states having high density tails that extend to the conduction band can significantly impact the subthreshold performance in both the surface channel design and the implant-free quantum-well HEMT-like structure with no δ -doping. Furthermore, the same distributions have little or no impact on the performance of both flat-band implant-free and buried channel architectures which operate around the midgap.

To address the integration of the high-mobility Ge/III-V MOSFET, a common gate stack (CGS) solution is proposed for the first time and demonstrated on Ge and InGaAs channels with combined hole and electron field-effect mobility values up to 400cm2/eV-s and 1300cm2/eV-s. Based on the duality found on the InGaAs/Ge MOS system, this approach aims to integrate the InGaAs/Ge MOSFET processes for high performance CMOS applications with an emphasis on progressive EOT scaling.

7th International Symposium on High Dielectric Constant Materials and Gate Stacks - 216th Meeting of the Electrochemical Society; Vienna; Austria; 5 October 2009 through 7 October 2009; Code 79118 In this work results are presented of an investigation into the structural and electrical properties of HfO2 films on GaAs and InxGa1-xAs substrates for x: 0.15, 0.30, and 0.53. The capacitancevoltage responses of the GaAs and InxGa1-xAs (x: 0.15 and 0.30) are dominated by an interface defect response. Analysis of these samples at 77K indicates that the defect density is > 2.5x1013 cm-2. For the HfO2/In0.53Ga0.47As system, 77K capacitance-voltage responses indicate surface accumulation is achieved. The results are consistent with a high defect density, with an energy level {greater than or equal to}0.75 eV above the valence band in the HfO2/InxGa1-xAs system, where the defect energy with respect to the valence band, does not change with the composition of the InxGa1-xAs. The HfO2/In0.53Ga0.47As interface exhibits two defects at 0.3eV (1.7x1013cm-2eV) and 0.61eV (1.5x1013cm-2eV) above the valance band edge. The defect at 0.61eV is removed by forming gas annealing at 325oC.

The use of Ge and III/V materials for future CMOS applications is investigated. Good passivation of the Ge surface can be obtained by either GeO 2 or Si passivation. Short channel Ge pMOS devices with low EOT are fabricated using Si passivation at 350 and 500°C. The passivation of III/V materials is a very challenging topic. Some critical issues and passivation schemes are discussed.

Future CMOS technologies will require the use of substrate material with a very high mobility. Therefore, the combination of Ge pMOS with GaAs nMOS devices is investigated for its possible use in advanced CMOS applications. In this work, the physical, chemical and electrical properties of a-GeO2 interfacial passivation layer (IPL) for n-Ge(001) and p-GaAs(001) have been investigated, using Molecular Beam Epitaxy (MBE) technique. The efficient electrical passivation of Ge/GeO2 will be demonstrated, and in the case of GaAs, the use of a thin a-GeO2 interlayer reduces the defects at the interface.

La-doped ZrO2 thin films were grown by O3-based atomic layer deposition on III-V (GaAs, In0.15Ga0.85As) substrates. The direct oxide deposition and the insertion of a Ge passivation layer in between the oxide and the substrate are compared in terms of the resulting density of interface traps. An improved electrical quality of the Ge-passivated interfaces concerning the energy region close to the conduction band edge in the semiconductor band-gap is demonstrated through conductance maps at various temperatures and it is attributed to Ga-related interfacial defects.

The authors model the capacitance-voltage (CV) behavior of In0.53Ga0.47As metal-oxide-semiconductor (MOS) structures and compare the results to experimental CV-curves. Due to the very low conduction band density of states, ideal III-V MOS structures should present an asymmetric CV behavior, with lower accumulation capacitance on the conduction band side. The absence of this asymmetric CV shape in experimental CV curves points toward the presence of additional states inside the conduction band at the oxide-semiconductor interface. Comparisons between the model and experimental data allow the determination and approximate quantification of a large acceptorlike interface state density above the conduction band edge energy. European Commission's - European Commission Joint Research Centre [214579] The authors acknowledge support by the European Commission’s project FP7-ICT-DUALLOGIC Grant No. 214579 “Dual-channel CMOS for sub-22 nm high performance logic.”

Catalytic-FGA, a combination of the standard forming gas anneal with a catalytic metal gate, has been applied to study the hydrogen passivation of III-V/Ge MOS systems. Pd (or Pt) metal gate catalytically dissociates molecular hydrogen into atomic hydrogen atoms, which then diffuse through the dielectric layer and neutralize certain semiconductor/dielectric interfacial defects. MOS systems with various interfacial qualities, including lattice-matched (n/p) In0.53Ga0.47As/10nm ALD-Al2O3 (or ZrO2)/Pd capacitors, an undoped Ge/˜1nm GeO2/4nm ALD-Al2O3/Pt capacitor, and an nGe/8nm ALD-Al2O3/Pt capacitor are fabricated to evaluate the effectiveness of C-FGA.

The introduction of high mobility channel materials together with new device structures with improved subthreshold slope provides a pathway into continuing the performance scaling of CMOS technology beyond the classical Si roadmap. The combination of Ge pMOS devices with nMOS devices made on very high electron mobility III/V compounds such as InGaAs can be achieved by selective growth on a Si-wafer, The key challenge towards achieving excellent device performance is the electrical passivation of the interface between the high-x dielectric and the alternative channel materials.

The authors apply the conductance method at 25 and 150 degrees C to GaAs-Al2O3 metal-oxide-semiconductor devices in order to derive the interface state distribution (D-it) as a function of energy in the bandgap. The D-it is governed by two large interface state peaks at midgap energies, in agreement with the unified defect model. S-passivation and forming gas annealing reduce the D-it in large parts of the bandgap, mainly close to the valence band, reducing noticeably the room temperature frequency dispersion. However the midgap interface state peaks are not affected by these treatments, such that Fermi level pinning at midgap energies remains. The authors acknowledge support by the European Commission’s project FP7-ICT-DUALLOGIC No. 214579 Dualchannel CMOS for (sub)-22 nm high performance logic

Band alignment at the interfaces of (100)GaAs with Al2O3 and HfO2 grown using atomic layer deposition is determined using internal photoemission and photoconductivity measurements. Though the inferred conduction and valence band offsets for both insulators were found to be close to or larger than 2 eV, the interlayer grown by concomitant oxidation of GaAs reduces the barrier for electrons by approximately 1 eV. The latter may pose significant problems associated with electron injection from GaAs into the oxide. (C) 2008 American Institute of Physics. (DOI: 10.1063/1.3021374)

The authors have made photoluminescence intensity (PLI) measurements on thin GaAs and InGaAs films to compare the surface recombination velocity at interfaces of the materials with AlAs and native oxide. An analytical expression for the internal quantum efficiency of the PLI method for thin semiconducting films is derived. This expression is applied to measurements on specially designed multilayer structures based on GaAs and InGaAs thin films. The results show that the native oxide on an In0.15Ga0.85As film has a one order of magnitude lower surface recombination velocity than the native oxide on a GaAs film. (c) 2007 American Institute of Physics.

We describe the principles of operation of the STJ spectrometer baselined for XEUS (X-ray Evolving Universe Spectroscopy mission), and describe some of the practical implementation issues that are being developed or trade-offs that are still being studied actively. The instrument is to be optimized for good energy resolution (

Superconducting tunnel junctions are being developed for application as photon detectors in astronomy. We present the latest results on the development of very high quality, very low critical temperature junctions, fabricated out of pure Al electrodes. The detectors are operated at 50 mK in an adiabatic demagnetisation refrigerator. The contacts to the top and base electrodes of these junctions are fabricated either out of Nb or Ta, which has strong implications on the loss time of the quasiparticles. The Nb contacted junctions show quasiparticle loss times varying between 5 and 80 usec, depending on the device size. The bias range of the Nb-contacted junctions is limited to the range 0-100 uV, because of the set-in of strong non-equilibrium quasiparticle multiplication currents at higher bias voltages. The Ta-contacted junctions, on the other hand, show quasiparticle loss times in excess of 200 usec. These long loss times lead to very strong quasiparticle multiplication, which prevents the stable biasing of the junctions even at very low bias voltages. Junction fabrication and characterisation are described, as well as the response of the detectors to monochromatic light with wavelengths varying from 250 to 1000 nm. The energy resolution of the detectors is discussed., 12 pages, 10 figures

We report the results of a series of experiments designed to assess the relative radiation hardness of a range of compound semiconductor X-ray detectors. The specific compounds tested were GaAs, InP, CdZnTe, HgI 2 and TlBr, along with an elemental Si device. To allow meaningful comparisons, all devices were of a similar size and, with the exception of the InP detector, had sub-keV energy resolution at 5.9 keV. The irradiations were carried out using the University of Helsinki’s Cyclone 10/5 10 MeV proton cyclotron. Each detector was given six consecutive exposures - the integral fluences being; 2.66 x 10 9 p cm -2 , 7.98 x 10 9 p cm -2 , 2.65 x 10 10 p cm -2 , 7.97 x 10 10 p cm -2 , 1.59 x 10 11 p cm -2 , and 2.65 x 10 11 p cm -2 , respectively. In Si, these correspond to absorbed radiation doses of 2, 6, 20, 60, 120 and 200 krads. During the exposures, the detectors were kept unbiased and at room temperature. After each irradiation, the effects of the exposure were assessed, both at room temperature and at a reduced temperature using 55 Fe, 109 Cd and 241 Am radioactive sources. It was found that with the exception of the HgI 2 and TlBr detectors all materials showed varying degrees of damage effects.

We have observed experimentally and modeled theoretically a previously unidentified nonequilibrium state in superconducting tunnel junctions. The state occurs in small gap, multiple tunneling junctions, and is caused by the raising in energy of the quasiparticle distribution through multiple cycles of sequential forward- and back-tunneling events. Because of the low-energy gap, quasiparticles may survive in the higher-energy states until they reach the energy threshold for emission of Cooper pair-breaking phonons, leading to generation of further quasiparticles. We modeled the process by solving the coupled system of kinetic equations for interacting quasiparticles and phonons, and studied the effect experimentally in high quality Al and Ta/Al superconducting tunnel junctions in the temperature range 40–300 mK. The distinctive features are large subgap currents exceeding that due to thermal excitations by several orders of magnitude at low temperatures, together with a very sharp onset of current with bias voltage

This paper presents a general model for calculating the density of states and the Cooper pair potential in proximity coupled superconducting bi- and tri-layer films. The typical example of superconducting tunnel junctions is used to show that the model is working., Comment: 25 pages, 6 figures

We present an experimental study of the performance of one-dimensional Distributed Read-Out Imaging Devices (DROIDs), based on two Ta/Al-based STJs placed on either side of a Ta absorber strip. We focus our discussion on the prospects of building large-format photon-counting imaging spectrometers for applications at soft X-ray energies. Tunnel-limited spectroscopical resolutions have already been demonstrated for optical photons. With a 20 x 100 micrometers 2 absorber we have measured an intrinsic energy resolution of 2.1 eV FWHM for 500 eV photons. This demonstrates that at soft X-ray energies resolutions close to the tunnel limit are also feasible for these type of detectors. A detailed analysis of pulse-shapes with analytical models allows us to assess the main parameters that determine the performance of these detectors. In particular, we discuss the dependence of the quasiparticle diffusion constant on the temperature of the absorber. Extrapolation of these models indicates that it is possible to extend the length of the absorber to 1.5 mm, without a serious degradation of the detector's performance.© (2002) COPYRIGHT SPIE--The International Society for Optical Engineering. Downloading of the abstract is permitted for personal use only.

We have developed a theory of anomalous sub-gap currents in small gap superconducting multiple tunneling junctions. The sub-gap current at low bath temperature shows a hierarchy of steps, spaced as V=2Δ/en, with n=2,3,… These steps occur as a result of specific mechanism of energy accumulation in cycles of tunneling-back tunneling events. Their shape and magnitude significantly depend on junction parameters and bath temperature.

We present an experimental study of the performance of Distributed Read-Out Imaging Devices (DROIDs), based on two Ta/Al-based superconducting tunnel junctions (STJs) placed on either side of a Ta absorber strip. We focus our discussion on the prospects of building large-format photon-counting imaging spectrometers for applications at optical, UV and soft X-ray energies. Tunnel-limited spectroscopic resolutions have already been demonstrated for optical photons. With a 20×100 μm2 absorber we have measured an intrinsic energy resolution of 2 eV FWHM for 500 eV photons. This demonstrates that at soft X-ray energies resolutions close to the tunnel limit are also feasible for this type of detectors. A detailed analysis of pulse-shapes with numerical models allows us to assess the main parameters that determine the performance of these detectors. Extrapolation of these models indicates that it is possible to extend the length of the absorber to 1.5 mm, without a serious degradation of the detector’s performance.

Measurements of quantum efficiencies are presented for three epitaxial gallium arsenide detectors with nominal depletion depths of 40, 325, and 400 μm. Attempts to measure the depletion as a function of bias indicated that the apparent depletion depth was much less than the intrinsic layer thickness. Expectation that the of the detection efficiency could be increased using a larger intrinsic layer could not be met. The largest value of a depletion depth measured by X-rays was determined at about 100 μm for the 400 μm device.

A generalized model for the critical temperature Tc of superconducting bilayers is presented, which is valid with no restrictions to film thicknesses, Tc of the layers and interface resistivity. The model is verified experimentally on a series of Nb-Al and Ta-Al bilayers with Nb, Ta layer thicknesses of 100 nm and Al layer thicknesses ranging from 5 nm to 200 nm. Excellent agreement between theory and experiment was found for the energy gap and the Tc of bilayers. The results are important for designing practical superconducting devices., 3 pages, 2 figures

Cu2ZnSnSe4 thin film solar cells are usually fabricated on a soda lime glass substrate with a molybdenum (Mo) back contact. It is suspected that degradation in electrical performance occurs due to the formation of a barrier between the absorber and Mo back contact. To overcome such degradation, Titanium Nitride (TiN), Titanium Tungsten (TiW), Chromium (Cr), Titanium (Ti) and Aluminum (Al) deposited on Mo-coated glass substrates are investigated as alternative back contact materials. Physical and electrical characterization as well as photoluminescence measurements are performed. Compositional analysis of the absorber layer on the metallized substrates identifies Mo, TiN and TiW as being the most inert during the formation of Cu2ZnSnSe4. On the other hand, Ti and Cr reacted with Se during selenization, thereby affecting the growth of the absorber, leading to low conversion efficiency. For Al, the absorber layer was etched after the standard potassium cyanide etch, hence, cannot be used as a back contact. The best device efficiencies obtained are 8.8% on TiN, 7.5% on Mo and 5.9% on TiW, respectively. The TiN back contact provides the lowest barrier value of about 15 meV which could be considered as a good ohmic contact.

Dr . M. Buffi ere, N. Lenaers, Dr. A. E. Zaghi, Prof. J. Poortmans Imec—partner in Solliance Kapeldreef 75 3001 , Leuven , Belgium E-mail: buffiere@imec.be Dr . M. Buffi ere, Prof. J. Poortmans Department of Electrical Engineering (ESAT) KU Leuven Kasteelpark Arenberg 10 3001 , Heverlee , Belgium Dr. A.-A. El Mel Institut des Materiaux Jean Rouxel Universite de Nantes CNRS, 2 rue de la Houssiniere B.P. 32229 44322 Nantes cedex 3 , rance FN. Lenaers, Dr. A. E. Zaghi Department of Metallurgy and Materials Engineering (MTM) KU Leuven Kasteelpark Arenberg 44 3001 , Heverlee Belgium Dr. G. Brammertz, Dr. M. Meuris Imec division IMOMEC—partner in Solliance Wetenschapspark 1 3590 , Diepenbeek , Belgium Dr. G. Brammertz, Dr. M. Meuris Institute for Material Research (IMO), Hasselt University Wetenschapspark 1 3590 , Diepenbeek , Belgium

We present preliminary results of X-ray measurements on three small format compound semiconductor arrays. The devices, a 4x4 pixel GaAs array fabricated on 325 micrometers epitaxial material, a 4x4 pixel CdZnTe array fabricated on a 4X4X1 mm3 mono crystal and a 3x3 TlBr array fabricated on a 2.7 x 2.7 x 1.0 mm3 mono crystal. The pixel size for all arrays is 350x350micrometers 2. Results are presented of 55Fe and 241Am measurements at 5.9 keV and 59.54 keV. For detector temperatures

A 6x6 array of symmetrical V/Al/AlOx/Al/V Superconducting Tunnel Junctions (STJs) was fabricated. The base electrode is a high quality epitaxial film with a residual resistance ratio (RRR) of ~30. The top film is polycrystalline with an RRR of ~10. The leakage currents of the 25x25 mm^2 junctions are of the order of 0.5 pA/mm^2 at a bias voltage of 100 mV, which corresponds to a dynamical resistance of ~ 3 10^5 ohms. When the array was illuminated by 6 keV X-ray photons from a 55Fe radioactive source the single photon charge output was found to be low and strongly dependent on the temperature of the devices. This temperature dependence at X-ray energies can be explained by the existence of a very large number of quasiparticle (QP) traps in the Vanadium. QPs are confined in these traps, having a lower energy gap than the surrounding material, and are therefore not available for tunneling. The number of traps can be derived from the energy dependence of the responsivity of the devices (charge output per electron volt of photon input energy)., Comment: 4 pages. presented at Low Temperature Detectors-9

We present preliminary results of X-ray measurements on two small format compoundsemiconductor arrays. The devices, a 5 x 5 gallium arsenide array and a 3 x 3 cadmiumzinc telluride array, were produced specifically to address the material, electronic andtechnological problems that need to be solved in order to develop mega-pixel, Fano limited spectroscopic arrays. The GaAs device was fabricated on 40 tm epitaxial material and has a pixel size of 200 x 200 microns2 with pitch 250 jtm. The CdZnTearray was fabricated on a 5 x 5 x 1 .6 mm single crystal of spectroscopic quality. The pixel sizes were 350 x 350 microns2 with a pixel pitch of 250 rim. Measurements from5.9 keV to 100 keV were carried out both in our laboratory and at the HASYLAB synchrotron research facility in Hamburg, Germany. The typical FWHM energy resolutions recorded at 5.9 keV by the GaAs and CdZnTe arrays were 394 eV and 900 eV, respectively.Keywords: Compound semiconductors, CdZnTe, GaAs, arrays, X-rays 1. INTRODUCTIONIn recent years, considerable effort has been expended in producing X-ray imaging

We present an experimental study of the performance of Distributed Read-Out Imaging Devices (DROIDs), 1- and 2-dimensional photon-counting imaging spectrometers, based on Ta/Al-based STJs placed on a Ta absorber. Results obtained with highly collimated illumination with 10 keV X-ray photons clearly demonstrate the imaging capabilities of 2- dimensional DROIDs. The derived spatial FWHM resolution is 7 tm for a 200 x 200 .tm2 absorber. With a 1-D DROID wehave measured an intrinsic energy resolution of 15 eV FWHM for 6 keV photons. At high energies (E > 6 keV) theresolution is limited by spatial fluctuations in the qp recombination rate.Keywords: Superconducting tunnel junctions, X-ray detectors, X-ray imaging, X-ray spectroscopy, DROID, XEUS 1. INTRODUCTION With the successful launches of XMM and Chandra behind us, the time has come to focus on the next generation ofastronomical X-ray missions. The demands on the instrumentation for these missions are challenging. Taking ESA'sproposal XEUS as an example [ 1 , 2], the requirements on the X-ray imaging spectroscopy detector include a pixel size of100 tm with a total detector area of 7x7 mm2, an energy resolution of 0. 1 % of the photon energy in energy ranges from 0.1