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The exact location of a single dopant atom in a nanostructure can influence or fully determine the functionality of highly scaled transistors or spin-based devices. We demonstrate here a noninvasive spatial metrology technique, based on the microscopic modeling of three electrical measurements on a single-atom (phosphorus in silicon) spin qubit device: hyperfine coupling, ground state energy, and capacitive coupling to nearby gates. This technique allows us to locate the qubit atom with a precision of +/- 2.5 nm in two directions and +/- 15 nm in the third direction, which represents a 1500-fold improvement with respect to the prefabrication statistics obtainable from the ion implantation parameters.

nanoHUB.org is arguably one of the most successful science gateways funded by the National Science Foundation (NSF). It is the cyberinfrastructure that supports the Network for Computational Nanotechnology (NCN), currently serving over 240,000 users annually in 172 countries worldwide. It features a range of resources including seminars, online courses, short courses, full-fledged tool-powered curricula, and over 260 online simulations and modeling tools. nanoHUB functions as a scientific cloud where users cannot only design and run their tools but also provide a worldwide audience access to these tools with no installation or minimal infrastructural requirements on the users’ part.

Scientific Reports 6: Article number: 31830; published online: 23 August 2016; updated: 30 November 2016

Established in 2002, nanoHUB.org continues to attract a large community of users for computational tools and learning materials related to nanotechnology [1, 2]. Over the last 12 months, nanoHUB has engaged over 1.4 million visitors and 13,000 simulation users with over 5,000 items of content, making it a premier example of an established science gateway. The nanoHUB team tracks references to nanoHUB in the scientific literature and have found nearly 1,600 vetted citations to nanoHUB, with over 19,000 secondary citations to the primary papers, supporting the concept that nanoHUB enables quality research. nanoHUB is also used extensively for both informal and formal education [3,4], with automatic algorithms detecting use in 1,501 classrooms reaching nearly 30,000 students. During 14 years of operation, the nanoHUB team has had an opportunity to study the behaviors of its user base, evaluate mechanisms for success, and learn when and how to make adjustments to better serve the community and stakeholders. We have developed a set of success criteria for a science gateway such as nanoHUB, for attracting and growing an active community of users. Outstanding science content is necessary and that content must continue to expand or the gateway and community will grow stagnant. A large challenge is to incentivize a community to not only use the site, but more importantly, to contribute [5,6]. There is often a recruitment and conversion process that involves, first, attracting users, giving them reason to stay, use, and share increasingly complex content, and then go on to become content authors themselves. This process requires a good understanding of the user community and its needs as well as an active outreach program, led by a user-oriented content steward with a technical background sufficient to understand the work and needs of the community. A reliable infrastructure is a critical key to maintaining an active, participatory community. Using underlying HUBzero® technology, nanoHUB is able to leverage infrastructure developments from across a wide variety of hubs, and by utilizing platform support from the HUBzero team, access development and operational expertise from a team of 25 professionals that one scientific project would be hard-pressed to support on its own. nanoHUB has found that open assessment and presentation of stats and impact metrics not only inform development and outreach activities but also incentivize users and provide transparency to the scientific community at large.

Molybdenum disulfide (MoS 2 ) is a promising 2D material since it has a finite band gap, and its electronic band structure depends on the layer thickness. The tunability of the gate voltage on band alignment of different MoS 2 layers is analyzed. For this purpose, the multipurpose nanodevice simulation tool NEMO5 was altered by several new features: electronic bandstructure calculations in maximally localized Wannier function (MLWF) representation and self-consistent charge calculations with subatomic electrostatic resolution.

As logic devices continue to downscale, interconnections are reaching the nanoscale where quantum effects are important. In this work we introduce a semi-empirical method to describe the resistance of copper interconnections of the sizes predicted by ITRS roadmap. The resistance calculated by our method was benchmarked against DFT for single grain boundaries. We describe a computationally efficient method that matches DFT benchmarks within a few percent. The 1000x speed up compared to DFT allows us to describe grain boundaries with a 30 nm channel length that are too large to be simulated by ab-initio methods. The electrical resistance of these grain boundaries has a probability density distribution as a function of the grain rotation angles. This approach allows us to quantitatively obtain the most likely resistance for each configuration.

Quantum dots patterned by atomically precise placement of phosphorus donors in single crystal silicon have long spin lifetimes, advantages in addressability, large exchange tunability, and are readily available few-electron systems. To be utilized as quantum bits, it is important to non-invasively characterise these donor quantum dots post fabrication and extract the number of bound electron and nuclear spins as well as their locations. Here, we propose a metrology technique based on electron spin resonance (ESR) measurements with the on-chip circuitry already needed for qubit manipulation to obtain atomic scale information about donor quantum dots and their spin configurations. Using atomistic tight-binding technique and Hartree self-consistent field approximation, we show that the ESR transition frequencies are directly related to the number of donors, electrons, and their locations through the electron-nuclear hyperfine interaction.

The downscaling of electronic devices has reached a regime where quantum and atomistic effects govern the active part of the device while semi-classical physics still plays a very important role for the remaining parts. A multiscale transport simulation approach is therefore developed in NEMO5 tool to address this issue. In this approach, nonequilibrium Green's function (NEGF) equations with atomistic tight-binding Hamiltonian are employed to calculate the ballistic current through the tiny central device, while drift-diffusion (DD) equations (with quantum charge density) are used to model the surroundings where scattering and relaxation dominate. These two sets of equations are coupled through quasi-Fermi levels, which are determined by continuity equation. With Poisson equation solved self-consistently, device characteristics such as the I-V curves are obtained. Using this approach we demonstrate two examples. For the first example, we consider a recently fabricated nitride tunneling diode that consists of a GaN-InNGaN heterojunction. The band-to-band tunneling through the strained heterojunction is accurately modeled by the NEGF method while the serial resistance of the leads is accounted for by potential drop from the contacts obtained by solving the DD equation. Further, the contact resistance is taken into account by computing the tunneling through the Schottky barrier (also via NEGF method). For the second example, we simulate a two-dimensional III–V MOSFET, featuring wrapped-around leads. The channel part of the transistor is modeled by the NEGF method to capture source-to-drain tunneling leakage, which is critical for short-channel devices scaled to sub-10 nm. The (relatively) long leads, are again assigned to the DD solver to calculate the non-trivial potential drop from the external contacts. We benchmark the simulation results with the experimental measurements and then optimize the device design parameters.

Future ultra-scaled logic and low-power systems require fundamental advances in semiconductor device technology. Due to power constraints, device concepts capable of achieving switching slopes (SS) steeper than 60 mV/decade are essential if scaling of conventional computational architectures is to continue. Likewise, ultra low power systems also benefit from devices capable of maintaining performance under low-voltage operation. Towards this end, tunneling field effect transistors (TFETs) are one promising alternative. While much work has been devoted to realizing TFETs in Si, Ge, and narrow-gap III–V materials, the use of III-N heterostructures and the exploitation of polarization engineering offers some unique opportunities. From physics-based simulations, performance of GaN/InGaN/GaN heterostructure TFETs appear capable of delivering average SS approaching 20 mV/decade over 4 decades of drain current, and on-current densities exceeding 100 µA/µm in aggressively scaled nanowire configurations. Experimental progress towards realizing III-N based TFETs includes demonstration of GaN/InGaN/GaN backward tunnel diodes by both MOCVD and MBE, and nanowires grown selectively by MBE and used as the basis for device fabrication.

Strain has been widely used to engineer electronic devices by altering the material band structures. Recently it has also been employed to improve the performance of tunneling field-effect transistors (TFETs). A TFET is a steep subthreshold swing (SS) device that is very promising in building future low-power integrated circuits. But its drive current (I ON ) is usually limited leading to pronounced switching delay (CV/I). It has been shown that for InAs nanowire TFETs, strain can reduce the band gap and/or effective masses leading to improved I ON . We show that for the experimentally more favorable ultra-thin-body (UTB) InAs TFETs, certain types of strain improve I ON when channel length is long (30 nm). When channel length is short (15 nm), however, the improvement is marginal due to degraded SS as a result of increased ambipolar leakage. To mitigate this detrimental effect, we propose to apply the strain locally in an area around the source-channel tunnel junction. Since the band structures of the channel and the source remain unaffected, the ambipolar leakage does not increase and meantime the source Fermi degeneracy is removed. In this way we obtain a significant boost of SS and I ON . The simulations are performed by solving Poisson equation and open-boundary Schroedinger equation self-consistently within NEMO5 tool. The band structure of III–V materials is described by strained eight-band k·p Hamiltonian. Since tunneling current is very sensitive to band structures, we extract the k·p band parameters and deformation potentials from the corresponding atomistic tight binding calculations, whose parameters are fit to first-principles density functional theory (DFT) calculations with excellent match. We compare the confined band structures as well as I–V curves obtained from both methods and show that the accuracy of the k·p method is guaranteed.

It is critical to capture the effect due to strain and material interface for device level transistor modeling. We introduce a transferable $s{p}^{3}{d}^{5}{s}^{*}$ tight-binding model with nearest-neighbor interactions for arbitrarily strained group IV and III-V materials. The tight-binding model is parametrized with respect to hybrid functional (HSE06) calculations for varieties of strained systems. The tight-binding calculations of ultrasmall superlattices formed by group IV and group III-V materials show good agreement with the corresponding HSE06 calculations. The application of the tight-binding model to superlattices demonstrates that the transferable tight-binding model with nearest-neighbor interactions can be obtained for group IV and III-V materials.

The operation of multi-quantum well LEDs is determined by the carrier flow through complex, extended quantum states, the optical recombination between these states and the optical fields in the device. Non-equilibrium Green Function Formalism (NEGF) is the state-of-the-art approach for quantum transport, however when it is applied in its textbook form it is numerically too demanding to handle realistically extended devices. This work introduces a new approach to LED modeling based on a multi-scaled NEGF approach that subdivides the critical device domains and separates the quantum transport from the recombination treatments. First comparisons against experimental data appear to be promising.

2D transition metal dichalcogenides (TMDs) have attracted a lot of attention recently for energy-efficient tunneling-field-effect transistor (TFET) applications due to their excellent gate control resulting from their atomically thin dimensions. However, most TMDs have bandgaps (Eg) and effective masses (m*) outside the optimum range needed for high performance. It is shown here that the newly discovered 2D material, few-layer phosphorene, has several properties ideally suited for TFET applications: 1) direct Eg in the optimum range ~1.0–0.4 eV, 2) light transport m* (0.15 m0), 3) anisotropic m* which increases the density of states near the band edges and 4) a high mobility. These properties combine to provide phosphorene TFET outstanding ION ~ 1 mA/um, ON/OFF ratio ~ 106 for a 15 nm channel and 0.5 V supply voltage, thereby significantly outperforming the best TMD-TFETs and CMOS in many aspects such as ON/OFF current ratio and energy-delay products. Furthermore, phosphorene TFETS can scale down to 6 nm channel length and 0.2 V supply voltage within acceptable range in deterioration of the performance metrics. Full-band atomistic quantum transport simulations establish phosphorene TFETs as serious candidates for energy-efficient and scalable replacements of MOSFETs.

Future high-performance low-power integrated circuits require compact logic devices with both steep subthreshold swing (SS) and large drive current (I ON ). Tunneling field-effect transistors (TFETs) can meet the first requirement but their I ON is severely limited either by the low source-channel tunneling probability or by the high source-to-drain tunneling leakage. One of the methods that can be employed to boost I ON is doping engineering. In particular (1) lowering the drain doping density elongates the drain depletion region and thus suppresses the leakage leading to improved SS (and ION). This scheme, however, is not scalable as a long drain length is needed to reach charge neutrality [1]; (2) embedding an opposite N+ doping layer next to the P+ source, i.e., the source-pocket (SP) design [2], or inserting a δ doping layer [3], can enhance the electric field at the source-channel tunnel junction and improve ION. It can be shown that the improvement increases as the pocket doping density (Np) increases, but in practice doping density has an upper limit. In this paper, we show that, (1) embedding a P+ drain pocket can also improve the SS (and ION) and it is more scalable than lowering the drain doping; (2) by resorting to P+ channel, we can further improve I ON of the SP design without having to increase N p .

Future VLSI devices will require low CV dd 2/2 switching energy, large on-currents (I on ), and small off-currents (I off ). Low switching energy requires a low supply voltage V dd , yet reducing V dd typically increases /off and reduces the I on /I off ratio. Though tunnel FETs (TFETs) have steep subthreshold swings and can operate at a low V dd , yet their I on is limited by low tunneling probability. Even with a GaSb/InAs heterojunction (HJ), given a 2nm-thick-channel (001)-confined TFET, [100] transport, and assuming V dd =0.3V and I oFF =10−3A/m, the peak tunneling probability is on is only 24 A/m (fig. 1b) [1]. This low I on will result in large CV dd /I delay and slow logic operation. Techniques to increase /on include graded AlSb/AlGaSb source HJs [2,3] and tunneling resonant states [4]. We had previously shown that tunneling probability is increased using (11 0) confinement and channel heterojunctions [1], the latter increasing the junction built-in potential and junction field, hence reducing the tunneling distance. Here we propose a triple heterojunction TFET combining these techniques. The triple-HJ design further thins the tunnel barrier to 1.2 nm, and creates two closely aligned resonant states 57meV apart. The tunneling probability is very high, >50% over a 120meV range, and the ballistic I on is extremely high, 800A/m at 30nm Lg and 475 A/m at 15nm Lg, both with I off =10−3 A/m and V dd =0.3 V. Compared to a (001) GaSb/InAs TFET, the triple-HJ design increases the ballistic /on by 26:1 at 30nm L g and 19:1 at 15nm L g . The designs may, however, suffer from increased phonon-assisted tunneling.

We report the design and simulated performance of a GaAsSb/GaSb/InAs/InP n-type triple heterojunction (3-HJ) tunnel field-effect transistor (TFET). GaAsSb/GaSb source and InAs/InP channel HJs both increase the field imposed upon the tunnel junctions and introduce two resonant bound states. The tunneling probability, and hence the transistor on-current, are thereby greatly increased. The devices were simulated using a non-equilibrium Green function quantum transport approach and the k.p method within NEMO5. With 10−3 A/m (I OFF ) and a 0.3 V power supply V DD , we simulate 380 A/m ON-current (I ON ) at 30-nm gate length (L g ) and 275 A/m at 15-nm L g . Unlike a previously-reported high-current AlGaSb/GaSb/InAs/InGaAsSb 3-HJ design, the GaAsSb/GaSb/InAs/InP design employs channel materials to which high-quality, low-interface-state-density gate dielectrics have been demonstrated.

Scaling transistors’ dimensions has been the thrust for the semiconductor industry in the last four decades. However, scaling channel lengths beyond 10 nm has become exceptionally challenging due to the direct tunneling between source and drain which degrades gate control, switching functionality, and worsens power dissipation. Fortunately, the emergence of novel classes of materials with exotic properties in recent times has opened up new avenues in device design. Here, we show that by using channel materials with an anisotropic effective mass, the channel can be scaled down to 1 nm and still provide an excellent switching performance in phosphorene nanoribbon MOSFETs. To solve power consumption challenge besides dimension scaling in conventional transistors, a novel tunnel transistor is proposed which takes advantage of anisotropic mass in both ON- and OFF-state of the operation. Full-band atomistic quantum transport simulations of phosphorene nanoribbon MOSFETs and TFETs based on the new design have been performed as a proof.

In this article we have investigated the electrical control of the exchange coupling (J) between donor-bound electrons in silicon with a detuning gate bias, crucial for the implementation of the two-qubit gate in a silicon quantum computer. We found that the asymmetric 2P–1P system provides a highly tunable exchange curve with mitigated J-oscillation, in which 5 orders of magnitude change in the exchange coupling can be achieved using a modest range of electric field (3 MV/m) for ~15-nm qubit separation. Compared with the barrier gate control of exchange in the Kane qubit, the detuning gate design reduces the gate density by a factor of ~2. By combining large-scale atomistic tight-binding method with a full configuration interaction technique, we captured the full two-electron spectrum of gated donors, providing state-of-the-art calculations of exchange energy in 1P–1P and 2P–1P qubits. Researchers in the United States and Australia propose an improved design for quantum computing in silicon. The team, led by researchers at Purdue University, found that a design consisting of two paired phosphorous donor atoms in silicon interacting with another nearby phosphorous atom provides a stable and easy-to-control way to realize highly integrated qubits in silicon. Although donor atoms in silicon promise a high density integration similar to the integrated electronic circuits in conventional silicon electronics, conventional qubits based on two interacting phosphorous atoms are vulnerable to fabrication errors. In contrast, the proposed system based on pairs of two plus one phosphorous atoms provides greater stability against fabrication errors, as well as an enhanced tunability of their interactions, supporting the practical realization of quantum computing architectures in silicon.

GaSb/InAs heterojunction tunnel field-effect transistors are strong candidates in building future low-power integrated circuits, as they could provide both steep subthreshold swing and large ON-state current ($I_{\rm{ON}}$). However, at short channel lengths they suffer from large tunneling leakage originating from the small band gap and small effective masses of the InAs channel. As proposed in this article, this problem can be significantly mitigated by reducing the channel thickness meanwhile retaining a thick source-channel tunnel junction, thus forming a design with a non-uniform body thickness. Because of the quantum confinement, the thin InAs channel offers a large band gap and large effective masses, reducing the ambipolar and source-to-drain tunneling leakage at OFF state. The thick GaSb/InAs tunnel junction, instead, offers a low tunnel barrier and small effective masses, allowing a large tunnel probability at ON state. In addition, the confinement induced band discontinuity enhances the tunnel electric field and creates a resonant state, further improving $I_{\rm{ON}}$. Atomistic quantum transport simulations show that ballistic $I_{\rm{ON}}=284$A/m is obtained at 15nm channel length, $I_{\rm{OFF}}=1\times10^{-3}$A/m, and $V_{\rm{DD}}=0.3$V. While with uniform body thickness, the largest achievable $I_{\rm{ON}}$ is only 25A/m. Simulations also indicate that this design is scalable to sub-10nm channel length., Comment: 4 pages, 8 figures

The ability to transport quantum information across some distance can facilitate the design and operation of a quantum processor. One-dimensional spin chains provide a compact platform to realize scalable spin transport for a solid-state quantum computer. Here, we model odd-sized donor chains in silicon under a range of experimental non-idealities, including variability of donor position within the chain. We show that the tolerance against donor placement inaccuracies is greatly improved by operating the spin chain in a mode where the electrons are confined at the Si-SiO$_2$ interface. We then estimate the required timescales and exchange couplings, and the level of noise that can be tolerated to achieve high fidelity transport. We also propose a protocol to calibrate and initialize the chain, thereby providing a complete guideline for realizing a functional donor chain and utilizing it for spin transport., Comment: 19 pages, 12 figures

III-V tunnel field-effect transistors (TFETs) offer great potentials in future low-power electronics application due to their steep subthreshold slope and large “on” current. Their 3D quantum transport study using non-equilibrium Green’s function method is computationally very intensive, in particular when combined with multiband approaches such as the eight-band \( \varvec{k} \cdot \varvec{p} \) method. To reduce the numerical cost, an efficient reduced-order method is developed in this chapter and applied to study homojunction InAs and heterojunction GaSb–InAs nanowire TFETs. Device performances are obtained for various channel widths, channel lengths, crystal orientations, doping densities, source–pocket lengths, and strain conditions.

Thickness engineered tunneling field-effect transistors (TE-TFET) as a high performance ultra-scaled steep transistor is proposed. This device exploits a specific property of 2D materials: layer thickness dependent energy bandgap (Eg). Unlike the conventional hetero-junction TFETs, TE-TFET uses spatially varying layer thickness to form a hetero-junction. This offers advantages by avoiding the interface states and lattice mismatch problems. Furthermore, it boosts the ON-current to 1280$\mu A/\mu m$ for 15nm channel length. TE-TFET shows a channel length scalability down to 9nm with constant field scaling $E = V_{DD}/L_{ch}= 30V/nm$. Providing a higher ON current, phosphorene TE-TFET outperforms the homojunction phosphorene TFET and the TMD TFET in terms of extrinsic energy-delay product. In this work, the operation principles of TE-TFET and its performance sensitivity to the design parameters are investigated by the means of full-band atomistic quantum transport simulation., Comment: 6 figures

Tunneling field-effect transistors (TFETs) based on 2D materials are promising steep sub-threshold swing (SS) devices due to their tight gate control. There are two major methods to create the tunnel junction in these 2D TFETs: electrical and chemical doping. In this work, design guidelines for both electrically and chemically doped 2D TFETs are provided using full band atomistic quantum transport simulations in conjunction with analytic modeling. Moreover, several 2D TFETs' performance boosters such as strain, source doping, and equivalent oxide thickness (EOT) are studied. Later on, these performance boosters are analyzed within a novel figure-of-merit plot (i.e. constant ON-current plot)., Comment: 5 pages, 8 figures

The exponential miniaturization of Si complementary metal-oxide-semiconductor technology has been a key to the electronics revolution. However, the downscaling of the gate length becomes the biggest challenge to maintain higher speed, lower power, and better electrostatic integrity for each following generation. Both industry and academia have been studying new device architectures and materials to address this challenge. In preparation for the 12-nm technology node, this paper assesses the performance of the In0.75Ga0.25As of III-V semiconductor compounds and strained-Si channel nanoscale transistors with identical dimensions. The impact of the channel material property and the device architecture on the ultimate performance of ballistic transistors is theoretically analyzed. Two-dimensional and three-dimensional real-space ballistic quantum transport models are employed with band structure nonparabolicity. The simulation results indicate three conclusions: 1) the In0.75Ga0.25As FETs do not outperform strained-Si FETs; 2) triple-gate Fin-shaped Field Effect Transistor (FinFET) surely represent the best architecture for sub-15-nm gate contacts, independently from the material choice; and 3) the simulations results further show that the overall device performance is very strongly influenced by the source and drain resistances.

When the physical gate length is reduced to 5 nm, direct channel tunneling dominates the leakage current for both field effect transistors (FETs) and tunnel field effect transistors (TFETs). Therefore, a survey of materials in a nanowire (NW) geometry is performed to determine their ability to suppress the direct tunnel current through a 5 nm barrier. The materials investigated are InAs, InSb, InP, GaAs, GaN, Si, Ge and carbon nanotubes (CNTs). The tunneling effective mass gives the best indication of the relative size of the tunnel currents when comparing two different materials of any type. The indirect gap materials, Si and Ge, give the largest tunneling masses in the conduction band, and they give the smallest conduction band tunnel currents within the range of diameters considered. Si gives the lowest overall tunnel current for both the conduction and valence band and, therefore, it is the optimum choice for suppressing tunnel current at the 5 nm scale. A semi- analytic approach to calculating tunnel current is demonstrated which requires considerably less computation than a full-band numerical calculation.

The phonon spectra in zinc blende InAs, GaAs and their ternary alloy nanowires (NWs) are computed using an enhanced valence force field (EVFF) model. The physical and thermal properties of these nanowires such as sound velocity, elastic constants, specific heat (C v ), phonon density of states, phonon modes, and the ballistic thermal conductance are explored. The calculated transverse and longitudinal sound velocities in these NWs are ~25% and 20% smaller compared to the bulk velocities, respectively. The C v for NWs are about twice as large as the bulk values due to higher surface to volume ratio (SVR) and strong phonon confinement in the nanostructures. The temperature dependent C v for InAs and GaAs nanowires show a cross-over at 180°K due to higher phonon density in InAs nanowires at lower temperatures. With the phonon spectra and Landauer's model the ballistic thermal conductance is reported for these III---V NWs. The results in this work demonstrate the potential to engineer the thermal behavior of III---V NWs.

Wiring Up Silicon Surfaces One of the challenges in downsizing electronic circuits is maintaining low resistivity of wires, because shrinking their diameter to near atomic dimensions increases interface effects and can decrease the effectiveness of dopants. Weber et al. (p. 64 ; see the Perspective by Ferry ) created nanowires on a silicon surface with the deposition of phosphorus atoms through decomposition of PH 3 with a scanning tunneling microscope tip. A brief thermal annealing embedded these nanowires, which varied from 1.5 to 11 nanometers in width, into the silicon surface. Their resistivity was independent of width, and their current-carrying capability was comparable to that of thicker copper interconnects.

The development of a new nanoelectronics modeling tool, NEMO5, is reported. The tool computes strain, phonon spectra, electronic band structure, charge density, charge current, and other properties of nanoelectronic devices. The modular layout enables a mix and match of physical models with different length scales and varying numerical complexity. NEMO5 features multilevel parallelization and is based on open-source packages. Its versatility is demonstrated with selected application examples: a multimillion-atom strain calculation, bulk electron and phonon band structures, a 1-D Schrodinger-Poisson simulation, a multiphysics simulation of a resonant tunneling diode, and quantum transport through a nanowire transistor.

A new adaptive quadrature algorithm that places a greater emphasis on cost reduction while still maintaining an acceptable accuracy is demonstrated. The different needs of science and engineering applications are highlighted as the existing algorithms are shown to be inadequate. The performance of the new algorithm is compared with the well known adaptive Simpson, Gauss-Lobatto and Gauss- Kronrod methods. Finally, scenarios where the proposed al- gorithm outperforms the existing ones are discussed.

The correct estimation of the thermal properties of ultra-scaled CMOS and thermoelectric semiconductor devices demands for accurate phonon modeling in such structures. This work provides a detailed description of the modified valence force field (MVFF) method to obtain the phonon dispersion in zinc-blende semiconductors. The model is extended from bulk to nanowires after incorporating proper boundary conditions. The computational demands by the phonon calculation increase rapidly as the wire cross-section size increases. It is shown that nanowire phonon spectra differ considerably from the bulk dispersions. This manifests itself in the form of different physical and thermal properties in these wires. We believe that this model and approach will prove beneficial in the understanding of the lattice dynamics in the next generation ultra-scaled semiconductor devices.

Full-quantum device simulations on p-type Si nanowire field-effect transistors based on the k · p method, using the k ·p parameters tuned against the sp3s* tight-binding method, are carried out. Full transport calculations from both methods agree reasonably well, and the spin-orbit coupling effect is found to be negligible in the final current-voltage characteristics. Use of the highly efficient simulator based on the 3 × 3 k ·p Hamiltonian is therefore justified, and simulations of nanowire devices with cross sections from 3 × 3 nm2 up to 10 × 10 nm2 are performed. The subthreshold characteristics, threshold voltages, and ON-state currents for the three respective transport directions of the [100], [110], and [111] directions are examined. The device characteristics for the [110] and [111] directions are quite similar in every respect, and the [100] direction has the advantage with regard to the subthreshold behavior when the channel length is aggressively scaled down. The on-current magnitudes for the three respective orientations do not differ much, although the on-current in the [100] direction is a little smaller, compared with that in the other two directions when the channel width becomes smaller. An uncoupled mode space approach has been used to determine the contributions from individual heavy and light hole subbands, enabling an insightful analysis of the device characteristics.

Tunnel Field Effect Transistors (FETs) have the potential to achieve steep Subthreshold Swing (S.S.) below 60 mV/dec, but their S.S. could be limited by trap-assisted tunneling (TAT) due to interface traps. In this paper, the effect of trap energy and location on OFF-current (IOFF) of tunnel FETs is evaluated systematically using an atomistic trap level representation in a full quantum transport simulation. Trap energy levels close to band edges cause the highest leakage. Wave function penetration into the surrounding oxide increases the TAT current. To estimate the effects of multiple traps, we assume that the traps themselves do not interact with each other and as a whole do not modify the electrostatic potential dramatically. Within that model limitation, this numerical metrology study points to the critical importance of TAT in the IOFF in tunnel FETs. The model shows that for Dit higher than 1012/(cm2 eV) IOFF is critically increased with a degraded ION/IOFF ratio of the tunnel FET. In order to have ...

The article describes recent progress in atomic and molecular level modeling and simulation of nanoscale materials and processes, as well as efforts by the US National Science Foundation's Network for Computational Nanotechnology (NCN) to cyber-enable such simulation tools together with instructional materials and research seminars. We believe that making advanced simulation tools widely and easily available to the research and education community will significantly enhance the impact of modeling and simulation on nanoscience and nanotechnology To materialize this vision, NCN established nanoHUB.org, a next-generation Web portal or science gateway that lets users run live, interactive simulations, explore data, and learn-all though a simple Web browser without installing any software or providing compute cycles.

We address two challenges with the development of next-generation nanotransistors, (i) the capability of modeling realistically extended structures on an atomistic basis and (ii) predictive simulations that are faster and cheaper than experiments. We have developed a multi-dimensional, quantum transport solver, OMEN, towards these goals. To approach the peta-scale, the calculation of the open boundary conditions connecting the simulation domain to its environment is interleaved with the comutation of the devic ewave functions and the work load of each task is predicted prior to any calculation, resulting in a dynamic core allocation. OMEN uses up to 147,456 cores on Jaguar with four levels of MPI parallelization and reaches a sustained performance of 504 TFlop/s, running at 37% of the machine peak performance. We investigate 3D nanowire transistors with diameters up to 10nm, reproduce experimental data of high electron mobility 2D transistors, and expect increased capabilities by using over 300,000 cores in the future.

It is assessed in detail both experimentally and theoretically how the interlayer coupling of transition metal dichalcogenides controls the electronic properties of the respective devices. Gated transition metal dichalcogenide structures show electrons and holes to either localize in individual monolayers, or delocalize beyond multiple layers - depending on the balance between spin-orbit inter- action and interlayer hopping. This balance depends on layer thickness, momentum space symmetry points and applied gate fields. A good quantitative agreement of predictions and measurements of the quantum confined Stark effect in gated MoS2 systems unveils intralayer excitons as major source for the observed photoluminesence.

The simulation tools and resources available at nanoHUB.org offer significant opportunities for both re- search and education in computational nanoelectronics. Users can run simulations on existing powerful computa- tional tools rather than developing yet another niche simu- lator. The worldwide visibility of nanoHUB provides tool authors with an unparalleled venue for publishing their tools. We have deployed a new quantum transport simu- lator, OMEN, a state-of-the-art research tool, as the engine driving two tools on nanoHUB.

A 20-band sp3d5s* spin-orbit-coupled, semi-empirical, atomistic tight-binding model is used with a semi-classical, ballistic, field-effect-transistor (FET) model, to examine the ON-current variations to size variations of [110] oriented PMOS nanowire devices. Infinitely long, uniform, rectangular nanowires of side dimensions from 3nm to 12nm are examined and significantly different behavior in width vs. height variations are identified and explained. Design regions are identified, which show minor ON-current variations to significant width variations that might occur due to lack of line width control. Regions which show large ON-current variations to small height variations are also identified. The considerations of the full band model here show that ON-current doubling can be observed in the ON-state at the onset of volume inversion to surface inversion transport caused by structural side size variations. Strain engineering can smooth out or tune such sensitivities to size variations. The cause of variations described is the structural quantization behavior of the nanowires, which provide an additional variation mechanism to any other ON-current variations such as surface roughness, phonon scattering etc., Comment: 24 pages, 5 figures

Funded by the National Science Foundation (NSF), TeraGrid is one of the world's largest distributed cyberinfrastructures for open scientific research. The project began in 2001 as the Distributed Tera-scale Facility, which linked computers, visualization systems, and data at four sites through a dedicated 40-gigabit optical network. Today TeraGrid includes 25 platforms at 11 sites and provides access to more than a petaflop of computing power and petabytes of storage. TeraGrid has three primary focus areas. Its deep goal is to support the most challenging computational science activities those that cannot be achieved without TeraGrid facilities. TeraGrid's wide mission is to broaden its user base. The project's open goal is to achieve compatibility with peer grids and information services that allow development of programmatic interfaces to TeraGrid. The Science Gateways program seeks to provide researchers with easy access to TeraGrid's high-performance computing resources. A look at four successful gateways illustrates the program's goals, challenges, and opportunities.

The ability to change the degree of hybridization of a donor electron state between the coulombic potential of its donor atom and that of a nearby quantum well in a silicon transistor has now been achieved. This is a promising step in the development of atomic-scale quantum control.

This paper examines the impact of band structure on deeply scaled III-V devices by using a self-consistent 20-band -SO semiempirical atomistic tight-binding model. The density of states and the ballistic transport for both GaAs and InAs ultrathin-body n-MOSFETs are calculated and compared with the commonly used bulk effective mass approximation, including all the valleys (, , and ). Our results show that for III-V semiconductors under strong quantum confinement, the conduction band nonparabolicity affects the confinement effective masses and, therefore, changes the relative importance of different valleys. A parabolic effective mass model with bulk effective masses fails to capture these effects and leads to significant errors, and therefore, a rigorous treatment of the full band structure is required.

We present an atomistic tight-binding approach to calculating the electronic structure of semiconductor nanostructures. We start by deriving the strain distribution in the structure using the valence force field model. The strain field is incorporated into the tight-binding electronic structure calculation carried out in the frame of the effective bond orbital model and the fully atomistic Sp(3)d(5)s* approach. We apply the method to a vertically coupled self-assembled double-dot molecule. Using the effective mass approach, we establish the existence of electronic bonding and antibonding molecular orbitals for electrons and holes, whose probability density is shared equally between the dots. In the atomistic calculation we recover the molecular character of electron orbitals, but find that structural and atomistic details of the sample modify the hole orbitals, leading to a strongly asymmetric distribution of the probability density between the dots.

This paper examines the validity of the widely used parabolic effective mass approximation by computing the ballistic injection velocity of a double-gate, ultrathin-body (UTB) n-MOSFET. The energy dispersion relations for a Si UTB are first computed by using a 20-band sp3d5 s∗-SO semiempirical atomistic tight-binding (TB) model coupled with a self-consistent Poisson solver. A semiclassical ballistic FET model is then used to evaluate the ballistic injection velocity of the n-type UTB MOSFET based on both an TB dispersion relation and parabolic energy bands. In comparison with the TB approach, the parabolic band model with bulk effective masses is found to be reasonably accurate as a first order approximation until down to about 3 nm, where the ballistic injection velocity is significantly over- estimated. Such significant nonparabolicity effects on ballistic injection velocity are observed for various surface/transport orientations. Meanwhile, the injection velocity shows strong dependence on the device structure as the thickness of the UTB changes. Finally, the injection velocity is found to have the same trend as mobility for different surface/transport orientations, indicating a correlation between them.

The quantum Hall effect in Graphene nano-ribbons (GNR) is investigated with the non-equilibrium Green’s function (NEGF) based quantum transport model in the ballistic regime. The nearest neighbor tight-binding model based on p z orbital constructs the device Hamiltonian. GNRs of different edge geometries (Zigzag and Armchair) are considered. The magnetic field is included in both the channels and contact through Peierls substitution. Efficient algorithms for calculating the surface Green function are used to reduce computation time to enable simulating realistically large dimensions comparable to those used in experiments. Hall resistance calculations exactly reproduce the quantum Hall plateaus observed in the experiments. Use of large dimensions in the simulation is crucial in order to capture the quantum Hall effect within experimentally magnetic fields relevant 10–20 T.

Atomistic disorder such as alloy disorder, surface roughness and inhomogeneous strain are known to influence electronic structure and charge transport. Scaling of device dimensions to the nanometer regime enhances the effects of disorder on device characteristics and the need for atomistic modeling arises. In this work SiGe alloy nanowires are studied from two different points of view: (1) Electronic structure where the bandstructure of a nanowire is obtained by projecting out small cell bands from a supercell eigenspectrum and (2) Transport where the transmission coefficient through the nanowire is computed using an atomistic wave function approach. The nearest neighbor sp3d5s* semi-empirical tight-binding model is employed for both electronic structure and transport. The connection between dispersions and transmission coefficients of SiGe random alloy nanowires of different sizes is highlighted. Localization is observed in thin disordered wires and a transition to bulk-like behavior is observed with increasing wire diameter.

Undesirable short-channel effects associated with the relentless downscaling of conventional CMOS devices have led to the emergence of new classes of MOSFETs. This has led to new and unprecedented challenges in computational nanoelectronics. The device sizes have already reached the level of tens of nanometers where quantum nature of charge-carriers dominates the device operation and performance. The goal of this paper is to describe an on-going initiative on nanoHUB.org to provide new models, algorithms, approaches, and a comprehensive suite of freely-available web-based simulation tools for nanoscale devices with capabilities not yet available commercially. Three software packages nanoFET, nanoMOS and QuaMC are benchmarked in the simulation of a widely-studied high-performance novel MOSFET device. The impact of quantum mechanical effects on the device properties is elucidated and key design issues are suggested.

In part I, the development and deployment of a general nanoelectronic modeling tool (NEMO 3-D) has been discussed. Based on the atomistic valence-force field and the sp3d5s* nearest neighbor tight-binding models, NEMO 3-D enables the computation of strain and electronic structure in nanostructures consisting of more than 64 and 52 million atoms, corresponding to volumes of (110 nm)3 and (101 nm)3, respectively. In this part, successful applications of NEMO 3-D are demonstrated in the atomistic calculation of single-particle electronic states of the following realistically sized nanostructures: 1) self-assembled quantum dots (QDs) including long-range strain and piezoelectricity; 2) stacked quantum dot system as used in quantum cascade lasers; 3) SiGe quantum wells (QWs) for quantum computation; and 4) SiGe nanowires. These examples demonstrate the broad NEMO 3-D capabilities and indicate the necessity of multimillion atomistic electronic structure modeling.

Often one needs to calculate the evolution time of a state under a Hamiltonian with no explicit time dependence when only numerical methods are available. In cases such as this, the usual application of Fermi's golden rule and first-order perturbation theory is inadequate as well as being computationally inconvenient. Instead, what one needs are conditions under which the evolution time may be obtained from the easily calculated energy uncertainty. This work derives some general conditions for obtaining the evolution time from the energy uncertainty.