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We report a high etch rate GaAs via hole etching using Cl 2 /Ar plasma in an electron cyclotron resonance system. The effects of process parameters, such as RF power, gas flow rate, and microwave power on the GaAs etch rate were investigated. The influence of RF power, process pressure, and etch time on the resultant profiles were studied. The GaAs etch rate was found to increase significantly as Cl 2 flow rate, and RF power or microwave power increased. A maximum etch rate of 6 μm/min has been obtained. Studies also showed that sidewall profile for via patterns can be controlled by varying process pressure and RF power.

Electrical and structural properties of strontium titanate (SrTiO3) thin films deposited on Si and GaAs substrates by a conventional radio frequency-magnetron sputtering technique at different oxygen (O2) partial pressures and substrate temperatures have been reported. Dielectric constant of the as-deposited samples increases with the substrate temperature as well as the O2 partial pressure. However, it shows a decreasing trend at higher O2 partial pressure values. When the samples were annealed for 1 h at temperatures above 500 °C the dielectric constant value of the SrTiO3 (STO) films increased by five times and a maximum value of 147 was obtained. The increase in the dielectric constant value is reflected in x-ray diffraction measurements with the development of high intensity lines corresponding to STO phase. The thickness dependence of the dielectric constant is also reported. Thin film STO capacitors fabricated with Pt as top and bottom electrodes showed low leakage current densities and a high brea...

The experimental and theoretical studies of electron multiplication in InP/InGaAs double heterojunction bipolar transistors (DHBT's) with an InGaAs/InP composite collector are carried out. Both local electric field model and energy model are used to investigate the electron impact ionization in the composite collector. The analysis reveals that the nonlocal effect of the electron impact ionization in the composite collector is responsible for the suppression of the contribution of electron multiplication in the InGaAs layer. Experimental results for the fabricated devices were compared with the theoretical calculations, indicating that the conventional impact ionization models based on the local electric field significantly overestimate the electron multiplication for the composite collector. The energy model which takes into account the nonlocal effect is found to provide a more accurate prediction of electron multiplication for the DHBT's.

We report on the electrical and optical properties of silicon (Si)-doped InP layers grown by solid-source molecular beam epitaxy using a valved phosphorus cracker cell. Within the range of Si effusion cell temperatures investigated (900–1200 °C), the highest electron concentration obtained was 1.1×1020 cm−3. A saturation phenomenon was observed for the electron concentration at higher Si cell temperatures. 300 and 77 K Hall mobility data were used to determine the compensation ratios by comparing them with the theoretical data. Although the Hall data show that the compensation ratio increases with the increase in carrier concentration, the exact values are not certain because the theoretical calculation overestimates the mobility values at higher carrier concentrations. The saturation phenomenon of electron concentration in InP may be considered due to the Si atoms occupying both the In and P lattice sites, or Si donors located at the interstitial sites. The 300 K Hall mobility and the concentration data measured were found to fit the Hilsum expression well. The mobility values obtained in this study are better than or comparable to reported data in the past, indicating good material quality. 5 K photoluminescence (PL) measurements showed two peaks for the undoped and low doped InP layers corresponding to the neutral donor-bound exciton transitions (D0–X) and the acceptor-related transitions (D–A), respectively. When the doping level was increased, the near-band edge (D0–X) recombination peak becomes broadened and asymmetric due to changes in the donor level density of states and relaxation of the wave vector conservation rule. The full-width at half-maximum (FWHM) value of the PL peak position increased when the doping concentration was increased. An empirical equation was developed to fit this variation, which provides a convenient way of determining the dopant concentration from the experimental FWHM value. The near-band edge peak positions shifted to higher energy with the increase of doping level due to the band filling effect. This shift agreed well with the calculations based on the Burstein–Moss shift and the band gap narrowing effect considering a nonparabolic conduction band.

We report a high-rate etching of GaAs via holes using Cl2/Ar plasma generated by an electron cyclotron resonance system. Ni, with a thickness of 200 nm, was used as the etch mask. The effects of the chuck temperature, process pressure, r.f. power, gas flow rate, and microwave power on the etch rate and the resultant etch profiles were investigated. The GaAs etch rate was found to increase as the process pressure, Cl2 flow rate, and the r.f. power or the microwave power increased. An etch rate as high as 6.7 μm min−1 was observed from a sample etched using a microwave power, r.f. power and process pressure of 800 W, 150 W and 50 mTorr, respectively. An etch profile, suitable for monolithic microwave integrated circuits via hole applications, has been achieved using the process developed.

The energy band gap narrowing (BGN) as a function of doping concentration in Be-doped Al 0.33 Ga 0.67 As is investigated using photoluminescence (PL) measurements on samples grown by molecular beam epitaxy (MBE). An expression for theoretically predicting the band gap narrowing has been deduced for p-type doping in Al x Ga 1−x As (0≤x≤0.45). The experimental results obtained from the PL spectra are in good agreement with this expression. A simple empirical relation for the PL peak energy of Be-doped Al 0.33 Ga 0.67 As as a function of carrier concentration is also presented. This provides a convenient way of determining the carrier concentration in Be-doped Al 0.33 Ga 0.67 As samples nondestructively.

Selective regrowth, which involves the growth of a device structure, patterning, etching and epitaxial regrowth of another device structure is an important technique for monolithic integration. The nature of the surface before the regrowth is crucial for realizing good quality regrown devices. In this study, the effect of different GaAs surface preparation processes on the electrical and optical characteristics of a regrown pseudomorphic high electron mobility transistor (PHEMT) is studied. Using photoluminescence, Hall, atomic force microscopy and d.c. and microwave measurements on devices, an optimized process sequence has been identified to fabricate PHEMT structures with equivalent characteristics of those grown on epiready wafers.

The effect of SiN surface passivation on high-frequency channel noise in AlGaN/GaN high-electron-mobility transistors on a high-resistivity Si substrate is investigated. It was observed that the channel noise increased after SiN surface passivation by plasma-enhanced chemical vapor deposition. The mean square of the channel noise voltage increased about three times at a bias of Vd = 12V and Id = 120 A/mm. Based on the analysis on the noise source components in the channel region, it is believed that the channel noise increase is mainly due to the modification of the lateral electrical field profile by surface passivation. The modification of the lateral electrical field profile after passivation is verified by the 2-D numerical simulation and the observation that the gate leakage increases and the breakdown voltage decreases. The measured correlation coefficient between the channel noise and the gate noise agrees with the proposed mechanism of the electrical field profile modification by surface passivation.

Effects of silicon nitride (SiN) surface passivation by plasma enhanced chemical vapor deposition (PECVD) on microwave noise characteristics of AlGaN/GaN HEMTs on high-resistivity silicon (HR-Si) substrate have been investigated. About 25% improvement in the minimum noise figure (NF min) (0.52 dB, from 2.03 dB to 1.51 dB) and 10% in the associate gain (G a) (1.0 dB, from 10.3 dB to 11.3 dB) were observed after passivation. The equivalent circuit parameters and noise source parameters (including channel noise coefficient (P), gate noise coefficient (R), and their correlation coefficient (C)) were extracted. P, R and C all increased after passivation and the increase of C contributes to the decrease of the noise figure. It was found that the improved microwave small signal and noise performance is mainly due to the increase of the intrinsic transconductance (g m0) and the decrease of the extrinsic source resistance (R s).

AlGaAs/GaAs single heterojunction bipolar transistor (HBT) structures with Be- and C-doped bases have been annealed at different temperatures using rapid thermal processing (RTP). Both electrical and low-temperature photoluminescence measurements were used to investigate their thermal stability. We found that the conventional AlGaAs/GaAs abrupt HBT structures could undergo significant degradation at temperatures commonly encountered in typical RTP for device fabrication. The decrease of current gain was observed in both molecular beam epitaxy-grown HBTs with a Be-doped base and metalorganic chemical vapor deposition-grown HBTs with a C-doped base after RTP at temperatures greater than 600 °C. Our studies show that high-temperature RTP could induce undesirable degradation in AlGaAs/GaAs HBTs. Different degradation mechanisms, which are similar to those for the degradation of the Be- and C-doped base HBTs under current-induced stress, are responsible for the degradation of the Be- and C-doped HBTs subjected...

In this work, low-temperature photoluminescence (PL) is used for the investigation of beryllium (Be) dopant outdiffusion in AlGaAs/GaAs single-heterojunction bipolar transistors (HBTs). Near the typical emission peak at ∼1.92 eV which is due to the band-to-band transition from AlGaAs emitter, an additional emission peak is found in the PL spectrum. This peak is found to be caused by the Be-related transition from AlGaAs emitter due to the Be outdiffusion from the GaAs base to the AlGaAs emitter. The concentration of Be outdiffused into the emitter can be estimated from the energy separation between these two emission peaks in AlGaAs range based on the band gap narrowing effect. The measured dc current gain and the emitter-base turn-on voltage of the HBTs fabricated on different wafers with different growth conditions were found to correlate well with the PL results. Our results demonstrate that low temperature PL technique is an efficient method in identifying Be outdiffusion in HBTs and is useful in HBT growth and device structure optimization.

Silicon (Si)-doped InP layers were grown by solid-source molecular beam epitaxy and characterized by Hall and low-temperature photoluminescence (PL) measurements. During the growth the Si effusion cell temperature was varied from 900 to 1200°C, and the electron concentration measured was between 3.5×10 16 cm −3 and 1.1×10 20 cm −3 at room temperature. The corresponding Hall mobility varied from 3670 to 442 cm 2 /V s and 10 400 to 475 cm 2 /V s at 300 and 77 K, respectively for different Si cell temperatures. The mobility values were found to be higher compared to n-type InP layers grown by other techniques. 5 K PL spectra showed two peaks for the undoped and low-doped InP layers corresponding to the neutral donor-bound exciton transitions (D 0 –X) and the acceptor-related transitions (D–A), respectively. When the Si doping level was increased, the high-energy near-band recombination underwent a typical evolution exhibiting a broadened asymmetric peak, and the peak shifted to high energy that was attributed to the band filling effect. This peak shift compared well with the theoretical prediction based on the Burstein–Moss shift and the band gap narrowing effect.

Electrical and optical properties of beryllium (Be) doped Al 0.33 Ga 0.67 As layers grown by molecular beam epitaxy have been investigated. Doping levels of up to 1.3×10 19 cm −3 have been obtained with smooth surface by increasing the Be cell temperature during growth. A further increase in Be cell temperature resulted in a rough surface with a hole concentration of 2.4×10 19 cm −3 . Hall mobility and concentration data measured are found to fit the Hilsum expression well. 10 K photoluminescence measurements show two peaks for lower doping levels in AlGaAs. When the Be doping concentration is increased, the two peaks begin to merge together, and the peak positions shift towards the low energy side. A simple empirical relation for the PL peak energy of Be-doped Al 0.33 Ga 0.67 As as a function of carrier concentration is presented. This provides a convenient way of determining the carrier concentration in Be-doped Al 033 Ga 0.67 As layers nondestructively.

We show that a vacancy-controlled model can explain the experimentally observed negative dependence on the stress temperature of GaAs/AlGaAs heterojunction bipolar transistors' degradation by non-radiative defects. The driving force (osmotic force) of the degradation versus the bias stress temperature is calculated and a decreasing temperature dependence is found. This model, which has previously been applied to strained-layer lasers and light emitting diodes, will help us understand the reported experimental observations on the temperature-acceleration tests for the GaAs/AlGaAs-based heterostructure devices such as heterojunction bipolar transistors.

This paper reports the effects of beryllium (Be) doping in In 1− x − y Ga x Al y As layers grown lattice-matched to InP(1 0 0) substrates by molecular beam epitaxy. Hall effect measurements showed that hole concentrations as high as 2.94×10 19 cm −3 were achieved, and the concentration decreased with further increase in the Be cell temperature. Depending on the hole concentration, good optical quality was achieved as verified by photoluminescence (PL) measurements. X-ray diffraction measurements showed lattice mismatch values of lower than 8.6×10 −4 in most samples. An intense PL peak (5 K) at 1.089 eV which is attributed to band-acceptor recombination was observed from the sample with the lowest hole concentration of 2.28×10 16 cm −3 . This sample showed the lowest PL full-width at half-maximum of 8 meV (at 5 K) for the free exciton recombination. To the best of our knowledge, this is the lowest value reported to date. An increase in the hole concentration caused a merging of the band-acceptor and free exciton recombination lines to form a broad PL spectrum. A shift in the free exciton peak position in the PL spectrum was observed following an increase in the hole concentration, an effect which was probably due to degeneracy.

We report the molecular beam epitaxial (MBE) growth of high quality epitaxial indium phosphide (InP) using a valved phosphorus cracker cell over a wide range of V/III flux ratio (1.2–9.3) and substrate temperature (360°C to 500°C). The as-grown epitaxial InP on InP (100) substrate was n-type, with a background electron concentration and mobility which varied according to the V/III flux ratio and substrate temperature ( T s ). Using a cracking zone temperature ( T cr ) of 850°C, the highest electron mobility at 77 K of 40 900 cm 2 /Vs was achieved at a V/III flux ratio of 2.3 at a substrate temperature of 440°C. The corresponding background electron concentration at 77 K was the lowest at 1.74×10 15 cm −3 . The photoluminescence (PL) full-width at half maximum (FWHM) decreased significantly in samples grown at lower flux ratios indicating an improvement in the optical quality.

Room temperature photoluminescence in δ-doped pseudomorphic AlGaAs/InGaAs/GaAs quantum wells is investigated. The electron and hole subband structure and optical transition matrix elements are calculated by a self-consistent theoretical method. Separations of the calculated conduction subband levels and valence subband levels reveal that the dominant emissions are due to the transitions from the second electron subband to the first heavy-hole subband, the first electron subband to the first heavy-hole subband, and the first electron subband to the second heavy-hole subband. The calculation also predicts that the transition energies shift to lower energies with the increase of the δ-doping level. This is accounted for by the lowering of the confined levels originating from electrostatically induced band bending. The calculated transition matrix elements demonstrate that transitions with different electron and hole subband indices, i.e., forbidden pairs, are preferred. The relative magnitudes of the squared optical matrix elements for the transitions from the first and second electron subbands to the first heavy-hole subband are analyzed as functions of separations of the first two electron subbands and the first two heavy-hole subbands, respectively. The results show that the 2-1 pair has a larger oscillator strength than the 1-1 and 1-2 pairs in agreement with observations.

Conventional Schottky-metal gate based GaN HEMTs (SB-HEMTs) suffer undesirable high gate leakage current (Igleak) issue. To reduce the Igleak, varieties of gate insulators like Si3N4, SiO2, Al2O3, Ga2O3, HfO2, Sc2O3 etc. have been demonstrated to obtain high quality metal-insulator-semiconductor (MIS) structure. ZrO2, with a high dielectric constant (18-25 [1]) and large bandgap (5.2-7.8 eV [2]), is a good candidate for gate insulation layer. Compared with ZrO2 prepared by other techniques, atomic layer deposited (ALD) technique has the benefits of nanometer scalability, high uniformity, good coverage, low defect density, etc. S. Abermann et al. [3] and A. Alexewicz et al. [4] have reported InAlN/GaN MISHEMTs using ALD ZrO2. However to-date, comprehensive study was not carried out in AlGaN/GaN MISHEMTs on Si with ALD ZrO2 as insulator layer. In this paper, we demonstrated AlGaN/GaN MISHEMTs with ALD ZrO2 as the gate dielectric layer on Si substrate. The use of ALD ZrO2 dielectrics can effectively suppress the reverse gate leakage current and improve gate voltage up to +5 V.

GaN High-Electron-Mobility transistors (HEMTs) on Si substrate is emerging as the most suitable choice for commercialization due to its low cost and the availability of larger size even up to GaN on 200-mm diameter Si(1 11) substrate [1-3]. Most of the high-power devices on Si (111) have achieved attractive device performances using conventional III-V process. In order to utilize the existing 200-mm diameter Si fabrication line, CMOS-compatible non-gold ohmic contacts with low contact resistance Rc are necessary. For high-power switching application point of view, researchers have demonstrated GaN Metal-Insulator-Semicondcutor HEMTs (MISHEMTs) on Si fabricated with non-gold metal stack. The non-gold ohmic metal stacks on undoped AlGaN/GaN heterstuctures are suffering from high Rc values. Recently, we have demonstrated sub-micron gate GaN HEMTs with low contact resistance (Rc) of

Novel thermopile based on modulation doped AlGaAs/InGaAs heterostructures is proposed and developed for uncooled infrared FPA (Focal Plane Array) image sensor application. The high sensitivity performance is designed to be the responsivity R of 33,000 V/W with the response time IJ of 8 ms, and the high speed performance is designed to be R of 4,900 V/W with IJ of 110 μs, under the 2 μm design rule. Based on integrated HEMT-MEMS technology, the 32×32 matrix FPA is fabricated to demonstrate its enhanced performances by black body measurement. The technology presented here demonstrates the potential of this approach for low-cost uncooled infrared FPA application.

We have demonstrated 0.15-µm-gate-length AlGaN/GaN high-electron-mobility transistors (HEMTs) with direct-current (DC) and microwave performances for the first time using a complementary metal–oxide–semiconductor (CMOS)-compatible non-gold metal stack. Si/Ta-based ohmic contact exhibited low contact resistance (Rc=0.24 Ω.mm) with smooth surface morphology. The fabricated GaN HEMTs exhibited gmmax=250 mS/mm, fT/fmax=39/39 GHz, B Vgd=90 V, and drain current collapse

Low-contact-resistance (Rc) non-gold Ta/Si/Ti/Al/Ni/Ta ohmic contacts were realized on an undoped AlGaN/GaN high-electron-mobility transistor (HEMT) grown on a silicon substrate. Optimization of the rapid thermal process reveals that Rc decreases drastically from the annealing temperature of 700 to 850 °C and slightly increases from 875 to 900 °C. The sample annealed at 850 °C exhibited the lowest Rc of 0.22±0.03 Ω·mm [specific contact resistivity, ρc=(0.78±0.22)×10-6 Ω·cm2] with a smooth surface morphology (RMS roughness ~5.5 nm). The low Rc is due to the formation of TixSiy and the intermixing of TixSiy with the bottom Ta layer at the metal/semiconductor interface.

In this Letter, an optical gradient force driven Nanoelectromechanical Systems (NEMS) actuator, which is controlled by the Q-factor attenuation of micro-ring resonator, is demonstrated. The actuator consists of a tunable actuation ring resonator, a sensing ring resonator, and a mechanical actuation arc. The actuation displacement can reach up to 14 nm with a measured resolution of 0.8 nm, when the Q-factor of the ring resonator is tuned from 15 × 103 to 6 × 103. The potential applications of the NEMS actuator include single molecule manipulation, nano-manipulation, and high sensitivity sensors. Published version

This work presents our recent progress on addressing two major challenges to realizing GaN-Silicon integration namely epitaxial growth of GaN-on-Silicon and CMOS-compatible process. We have successfully demonstrated 0.3-μm gate-length GaN HEMTs on 8-inch Si(lll) substrate with f T of 28GHz and f max of of 64GHz. These device performances are comparable to our reported devices fabricated on 4-inch Si substrate. We have also developed a GaN HEMT process with CMOS-compatible non-gold metal scheme. Excellent ohmic contacts (R c =0.24 Ω-mm) with smooth surface morphology have been achieved which are comparable to those using conventional III-V gold-based ohmic contacts. 0.15-μπι gate-length GaN HEMTs fabricated with this process achieved f T and f max of 51 GHz and 50GHz respectively. The 5nm-thick AlGaN barrier HEMT exhibited three terminal OFF-state breakdown voltage (BV gd ) of 83 V. Our results demonstrate the feasibility of realizing CMOS-compatible high performance GaN HEMTs on 8-inch silicon substrates for future GaN-on-Si integration.

We describe the research results produced from our focus on integrating GaN HEMTs and LEDs into silicon CMOS integrated circuits. Although current component markets are driving most GaN HEMT development, we have undertaken an innovation path in which the value of an integrated GaN device in a silicon design environment is the driver for materials and device development. Specifically, our integrated process flow involving foundry production of front and back end standard CMOS processes demands certain GaN epitaxial and material constraints that are different than constraints on non-integrated devices. We report on 200 mm GaN-on-Si 725 um thick engineered substrates formed through a combination of MOCVD and wafer bonding processes. Our optimized 200 mm GaN-on-Si (111) epitaxial wafers have bow values < 30 um, with total III-N film thicknesses of 2.7 um including a 1.5 um capping GaN layer. XRD FWHM values of 400 and 380 arcsec for (002) and (102) reflections indicate TDD of approximately 4e8 cm-2. CMOS-compatible GaN HEMTs demonstrated on these wafers have achieved 2DEG mobilities of ~1200 cm2/Vs and sheet carrier densities of 1-2e13 cm-2, with Id, max values of 700 mA/mm and 25 GHz fT, fmax for Lg = 0.25 um. High quality InGaN/GaN MQW LEDs emitting at 450 nm with total III-N stack thickness of 3.7 um have also been demonstrated. Central emission wavelength standard deviation of < 2 nm was achieved across the entire 200 mm, wafer, and typical devices exhibited turn-on at ~2.5 V with diode ideality factor of 2.8. We have developed wafer engineering techniques such as edge encapsulation and substrate replacement to address wafer fragility issues typically associated with GaN on SEMI-spec 725 um Si wafers. This also leads new wafer/device platforms such as GaN-OI and CMOS + GaN that will open new avenues in device performance and integration of III-N with Si CMOS.

The incorporation of new materials into CMOS scaling has become a necessity. Our previous work in SiGe and III-V integration shows promise in allowing further materials integration for increased transistor density. However, a principal concern is that investment returns by further increasing transistor density will likely be negative for all but possibly one or two corporations, and may be negative for all. Moore’s Law metrics for the benefits of incorporating III-V and other materials monolithically into silicon CMOS are not sufficient to determine innovative value for CMOS+X combinations. Such an environment that cannot use traditional metrics is a challenge for all organizations participating in the previous paradigm. Despite these challenging times, we list the likely characteristics of a new innovation path, and describe our efforts to follow it through research into ‘white space’ integrated circuits employing new materials and devices. Initially, we are designing novel integrated circuits, materials and processes incorporating GaN HEMTs, GaN and AlInGaP LEDs, and InGaAs HEMTs monolithically into existing silicon CMOS foundry processes. Both heteroepitaxy and wafer bonding are used in the process flow, and SiGe or Ge buffer layers are used in many processes. A modular process flow is incorporated so that the new devices can be modeled and incorporated into the design kit for a foundry process, allowing us to leverage much of the existing silicon design and manufacturing infrastructure. Our initial focus is on the demonstration of wafer-level integration of III-V devices with foundry 0.18 -micron CMOS devices on 200 mm wafers, and we report on the progress made in materials, device and circuit design towards this goal.

Multiple energies of heavy ion implantation with inert-gas ion (84Kr+) were carried out on AlGaN/GaN high-electron-mobility transistors (HEMTs) for planar device isolation. Thermal stability of the implantated samples were also investigated by isochronal annealing at 500, 600, 700, and 800 °C (each temperature for 1 h.). Due to the damages created by heavy ions (84Kr+) in the GaN lattice, the implant-isolated Al0.27Ga0.73N/GaN HEMT samples exhibited better thermal stability than 40Ar+-implant-isolation. This was also confirmed by Rutherford backscattering spectrometry in channeling condition and ultraviolet micro-Raman spectroscopy measurements. With reference to mesa-isolated AlGaN/GaN HEMTs, the buffer breakdown voltage is also stable in the implant-isolated AlGaN/GaN HEMTs. An enhanced OFF-state breakdown voltage was also realized in the implant-isolated AlGaN/GaN HEMTs. The inert gas heavy ion implantation (84Kr+) is a viable solution for the fabrication of thermally stable planar AlGaN/GaN HEMTs even...

We have proposed and successfully demonstrated a novel and simple process to fabricate self-aligned emitter passivation ledges for heterojunction bipolar transistors (HBTs) without using additional dielectric etch masks or dual etch-stop layers in the emitter. In this new ledge formation process, the emitter ledges are fabricated by the formation of photoresist sidewall spacers followed by a wet-chemical etch process. The effectiveness of this new ledge formation technology has been confirmed in AlGaAs/GaAs HBTs. Since the proposed ledge technology is very simple and without using any etch-stop layers (thus independent of material systems), it appears to be very promising for HBT fabrication.

The AlGaN/GaN-based high-electron-mobility transistors (HEMTs) are suitable for discrete components in many high power and high frequency power electronics applications useful for communications, satellites, power amplifiers, inverters/converters for electric and/or hybrid vehicles. Presently, these devices are commonly grown on sapphire, silicon carbide, and recently on 100- to 200-mm diameter silicon substrates. For a large scale deployment of low cost GaN-based power electronic devices, silicon substrate offers tremendous opportunities due to mature back-end Si process technologies. However, GaN epilayers on large area Si substrates results in severe wafer bowing and cracking due to high thermal mismatch between nitride layer and the substrate. As an alternative to Si substrate, silicon-on-insulator (SOI) substrate has been used for the demonstration of GaN-based light emitting diodes (LEDs)[1]. To the best of our knowledge, the demonstration of AlGaN/GaN transistors on a thin SOI substrate is rather limited. In this study, we report on the growth and characteristics of AlGaN/GaN heterostructures (HSs) on 150-mm diameter Si(111) and SOI(111) substrates. In addition, fabrication of HEMTs and device characteristics will be discussed on the SOI platfrom.

An effective suppression of drain current collapse was realized in both Enhancement (E)-mode and Depletion (D)-mode AlGaN/GaN High-electron-mobility-transistors (HEMTs) on 4-inch Silicon (111) by ammonium sulfide [(NH 4 ) 2 S x ] passivation. The current collapse was studied using the pulsed current-voltage characteristics with the pulse width of 200 ns and pulse period of 1 ms. With reference to the AlGaN/GaN HEMTs without sulfur passivation, about 30% of the drain current collapse was suppressed for drain quiescent biases of 25 to 30 V. Obtaining low current collapse is essential to demonstrate high power GaN HEMTs.

This Letter reports on the epitaxial growth, characterization, and device characteristics of crack-free AlGaN/GaN heterostructures on a 200 mm diameter Si(111) substrate. The total nitride stack thickness of the sample grown by the metal-organic chemical vapor deposition technique is about 3.3 ± 0.1 μm. The structural and optical properties of these layers are studied by cross-sectional scanning transmission electron microscopy, high-resolution x-ray diffraction, photoluminescence, and micro-Raman spectroscopy techniques. The top AlGaN/GaN heterointerfaces reveal the formation of a two-dimensional electron gas with average Hall mobility values in the range of 1800 to 1900 cm2/Vs across such 200 mm diameter GaN on Si(111) samples. The fabricated 1.5 μm-gate AlGaN/GaN high-electron-mobility transistors exhibited the drain current density of 660 mA/mm and extrinsic transconductance of 210 mS/mm. These experimental results show immense potential of 200-mm diameter GaN-on-silicon technology for electronic device applications. Published version

A modular approach to design full three-way active circulator is presented. Derived S-parameters for the modular design approach illustrates that broadband performance can be achieved with broadband performance modules. A full three-way 8 to 18 GHz MMIC active circulator was designed and fabricated with broadband feedback amplifiers and broadband 180° hybrids. © 2012 Wiley Periodicals, Inc. Microwave Opt Technol Lett 54:2858–2861, 2012; View this article online at wileyonlinelibrary.com. DOI 10.1002/mop.27202

This paper presents a method to attain a compact true time delay line with a partially shielded coplanar waveguide transmission line. Closely spaced air bridges were utilized to reduce the coupling effects between neighboring coplanar waveguide transmission lines. The proposed method is compatible with foundry's GaAs standard process and allows the transmission line to be compact and achieve a small sized true time delay line circuit. A true time delay line of approximately 85ps was fabricated and tested.

In this letter, we report positive bias-induced Vth instability in single and multilayer graphene field effect transistors (GFETs) with back-gate SiO2 dielectric. The ΔVth of GFETs increases as stressing time and voltage increases, and tends to saturate after long stressing time. In the meanwhile, it does not show much dependence on gate length, width, and the number of graphene layers. The 1/f noise measurement indicates no newly generated traps in SiO2/graphene interface caused by positive bias stressing. Mobility is seen to degrade with temperature in- creasing. The degradation is believed to be caused by the trapped electrons in bulk SiO2 or SiO2/graphene interface and trap generation in bulk SiO2.

In this paper, a bistable optical-driven silicon-nanowire memory is demonstrated, which employs ring resonator to generate optical gradient force over a doubly clamped silicon-nanowire. Two stable deformation positions of a doubly clamped silicon-nanowire represent two memory states (“0” and “1”) and can be set/reset by modulating the light intensity (

The feasibility of InP-based planar heteroepitaxial diodes for terahertz multiplier and mixer applications is explored. A variety of In/sub x/Al/sub 1-x/As/In/sub 0.53/Ga/sub 0.47/As (x=0.52, 0.4) diodes have been grown using LP-MOVPE and this allows systematic characterization of the effects of barrier thickness, InAs mole fraction and active layer thickness on the diode DC and RF performance. A new fabrication technology is developed for planar diodes using dielectric-free air-bridged anode fingers and trench isolation to minimize series resistance and parasitic capacitance. A qualitative model is suggested to explain the forward current conduction mechanism of the reported diodes. The control of forward current conduction and reverse leakage by epitaxial design together with the demonstrated figure-of-merit cutoff frequency of 2.6 THz make the diodes suitable for multiplier and mixer terahertz applications. >

The microwave noise performances of metamorphic (MM) InP/In0.53Ga0.47As/InP double-heterojunction bipolar transistors (DHBTs) on GaAs substrate are investigated for the first time. The noise figures and associated gains of the device with an emitter size of 5 × 5 μm2 are studied in the frequency range of 2–10 GHz. The variations of minimum noise figure at different collector currents are presented. At 2 GHz, the best minimum noise figure (FMIN) of 2.1 dB with an associated gain (GASS) of 12.7 dB have been achieved at VCE= 1.5 V and IC= 0.3 mA (1.2 kA/cm2). For comparable size and current density, these results show noise performance comparable to those of reported lattice-matched InP HBT at lower frequency (∼2 GHz). © 2002 Wiley Periodicals, Inc. Microwave Opt Technol Lett 33: 306–308, 2002; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/mop.10303

A detailed DC characterization of metamorphic InP/InGaAs/InP double heterojunction bipolar transistors (DHBT's) in the temperature range of 300 K to 400 K was carried out and the carrier transport properties were investigated. Our experiments reveal that band-to-band recombination is the dominant mechanism for the base current indicating the good base material quality for the metamorphic HBT structures.

The effect of silicon nitride passivation on the electrical characteristics of InP/InGaAs heterojunction bipolar transistors (HBT's) has been investigated comprehensively. The major degradations of I–V characteristics identified in our InP/InGaAs HBT's are: (1) the decrease of current gain due to a significant increase in the forward base leakage current and (2) large increase of base-collector (B-C) and base-emitter (B-E) reverse leakage currents. We found that different physical origins should be attributed to these two degradation behaviors.

This paper presents the low frequency noise investigation of the AlGaN/GaN on silicon Schottky diode. The noise power spectral density of various sizes of the AlGaN/GaN Schottky diodes under different biasing voltages has been measured. The 1/f behaviour is observed before the corner frequency and the effect of the multi-finger contact is also been determined. With increasing number of fingers, higher 1/f noise is observed. However, if the frequency is increased further, the noise power density is noted to decay more rapidly. This therefore implies that a low thermal noise floor has been achieved.

The I-V characteristics and S-parameters of AlGaN/GaN on silicon Schottky diodes are investigated. A compact circuit model is constructed for RF application. Simulated results are compared with measured results using AlGaN/GaN on Silicon diodes as RF switches. The simulated and measured results illustrated good agreement within a wide frequency range. The output power from the switch is also measured by sweeping the input power. No suppression is observed when the highest input power equals to 14 dBm at 10 GHz for small device, which proved that the AlGaN/GaN on Silicon devices offer good potential for RF power applications.

Radio Frequency Micro-Electro-Mechanical Systems (RF MEMS) switches are highly linear, low loss, inherently broadband with low power consumption. Given its nearly ideal technical switching specifications, highly complex, agile switching circuits using RF MEMS will be possible. RF MEMS switches integrated with Monolithic Microwave Integrated Circuits (MMIC) on GaAs platform will further exploit the strengths of both GaAs based MMIC technology with the near ideal switching capabilities of RF MEMS switches. In this talk, the fabrication process will be discussed. Experimental results on the integration of RF MEMS switches with GaAs pHEMT MMICs will be presented. Our work demonstrates the technology capabilities to extend the current MEMS technology towards fully MMIC-RF MEMS compatibility on GaAs platform.

Experimental characteristics of monolithic InAlAs/InGaAs HEMT mixers are presented together with a theoretical analysis. Experiments at W-band show a maximum conversion gain of 0.9 dB with 2 dBm of LO power level. This is the first demonstration of a monolithic HEMT mixer with conversion gain at W-band. The conversion gain dependence on LO power, RF frequency and gate bias is measured and compared with the theoretical predictions. Good agreement between the theory and experiment could be found. >

In this work, we report the detailed high-frequency noise and power characterization of metamorphic InP double heterojunction bipolar transistors in common base configuration. The noise and power performances were investigated for 5×10 μm2 device. A minimum noise figure of 2.3 dB with an associated gain of 14.5 dB at 2 GHz, and a maximum output power of 13.0 dBm with a power added efficiency of 47.8% at 2.4 GHz were obtained.

In this paper, an empirical nonlinear model for high electron mobility transistors (HEMTs) is presented. Unlike the conventional large-signal models whose fitting parameters are coupled to the measured I-V and C-V characteristics, the proposed modeling equations are direct formulated from the second-order derivative of drain current (I-V) and gate charge (Q-V) with respect to gate voltage. As a consequence, the proposed large-signal model is kept continuously differentiable and accurate enough to the higher-order I-V and Q-V derivatives. Measured and modeled results are compared for the 0.25µm gate-length GaAs pseudomorphic HEMTs (pHEMTs), and good agreement is obtained.

The lnAlAs/lnGaAs/InP high electron mobility transistor (HEMT) lattice matched to lnP offers excellent high frequency, low noise operation for MMICs and low-noise amplifiers. The lnP channel in the InP/InAlAs HEMT offers the advantages of improved high field velocity and higher breakdown voltages (the potential for higher power applications) over InGaAs channel HEMTs. InAlAs has been grown for the first time by CBE using TMAA producing InGaAs/lnAlAs and lnP/InAlAs HEMTs. Sub-micron InGaAs/InAlAs HEMTs with planar Si doping have been fabricated with f~values of 150 G1-Izand f,,t,, values of 160 GHz. This device showed excellent pinch-off characteristics, with a maximum transconductance of 890 mS/mm. The planar doped InGaAs channel HEMT had a higher f, than a similar uniformly doped device. However, the non-optimized structure of the planar doped device resulted in a large output conductance of 120 mS/mm, limiting f~,,,for that device. A sub-micron InP channel device was grown with a quantum well channel and double-sided planar Si doping. A sheet charge density of 4.4x 1012 cm2 and associated room temperature mobility of 2800 cm2/Vs were achieved; however, the saturation current was low. The most likely causes for this are diffusion of the planar doping beneath the channel and the poor quality of the InP on InAlAs interface at the bottom of the quantum well channel.

Extensive bias-dependent and temperature-dependent low-frequency (LF) noise measurements were performed on lattice-matched and strained In/sub 0.52/Al/sub 0.48/As/In/sub x/Ga/sub 1-x/As(0.53 >

The hole-initiated impact ionization multiplication factor Mp−1 and the ionization coefficient αp in AlGaAs/InGaAs p-n-p heterojunction bipolar transistors (HBTs) are presented. A large discrepancy is observed at low electric field when the measured data from the p-n-p HBTs are compared with those given from avalanche photodiode. The results show that the conventional impact ionization models, based on local electric field, substantially overestimate the hole impact ionization multiplication factor Mp−1. We believe that the hole ionization coefficient in p-n-p HBTs where significant dead space effects occur in the collector space charge region.