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Memristor networks are capable of low-power, massive parallel processing and information storage. Moreover, they have widely used for a vast number of intelligent data analysis applications targeting mobile edge devices and low power computing. However, till today, one of the major drawbacks resulting to their commercial cumbersome growth, is the fact that the fabricated memristor devices are subject to device-to-device and cycle-to-cycle variability that strongly affects the performance of the memristive network and restricts, in a sense, the utilisation of such systems for real-life demanding applications. In this work, we put effort on increasing the performance of memristive networks by incorporating external additive noise that will be proven to have a beneficial role for the memristor devices and networks. More specifically, we are taking inspiration from the well-known non-linear system phenomenon, called Stochastic Resonance, which alleges that noisy signals with specific characteristics can positively affect the operation of non-linear devices. As such, we are now focusing on the utilisation of the phenomenon on memristor devices in a way that the negative effect of variability is reduced, thus the operation of the whole memristor network is assisted by the increased variability tolerance. The presented results of Bit Error Rate (BER) on a small ReRAM crossbar array sound promising and enable us to further investigate the exploitation of the described phenomenon by memristor-based networks and memories.

During the last 1-2 decades semiconductor nanowires (NWs) have received significant academic and commercial attention due to their attractive electrical and mechanical properties and large surface area to volume ratios. They have a variety of possible applications including nanoelectronics, nanophotonics, photovoltaics, sensorics, etc. Among all semiconductor NWs the ones based on group IV materials have the advantage of being the most silicon (Si) compatible. This is very important since their integration into the existing semiconductor technology platform can be relatively easy. We will give a general overview of our activities on group IV nanowires. We will first present the NWs that we are working with, including top-down fabricated Si and germanium (Ge) NWs having widths down to 6-7 nm as well as bottom-up grown alloyed germanium-tin (Ge1-xSnx) NWs with x = 0.07-0.1, diameters of 50-70 nm and lengths of 1 to 3 µm. We are currently working also on the fabrication of alloyed SiGe and SiGeSn NWs with varying content of the different materials. Next, we will discuss the innovative nanoelectronic devices that we are working on, namely junctionless nanowire transistors (JNTs) and reconfigurable field effect transistors (RFETs). In particular, we are fabricating Si JNTs for sensing application as well as Ge and GeSn JNTs for digital logic. Concerning RFETs, we are currently working on Si RFETs and commencing activities on SiGe and GeSn RFETs, which are expected to outperform the Si RFETs. Finally, we will briefly present a novel device concept that we recently invented: a specific group IV heterostructure band-to-band tunnel FET (TFET). The fabrication process of this device is scalable and fully CMOS compatible and should allow the achievement of high on-current Ion together with low off-current Ioff, hence steep subthreshold slope.

The utilization of charged domain walls (CDWs) as nanoelectronic devices requires three technological aspects to be developed: (1) controllable CDW creation, (2) tuning of CDW geometry, and (3) CDW removal. We have studied CDW formation in lithium niobate single crystals during polarization reversal using liquid and solid-state electrodes, as well as their combination. It was shown that CDW can be formed by two alternative procedures: (1) by forward switching for the liquid electrode at the Z+ polar surface and solid at the Z-one, (2) by backward switching for solid at the Z+ polar surface and liquid at the Z-one. The created CDW can be transformed to an almost neutral domain wall by the application of the field pulse of the reverse polarity for both procedures. As a result, the tilt of the formed CDW can be tuned reversibly in the range from 0.2° to 1.2° resulting in a change between isolated and highly conductive states. We have demonstrated that the created CDW can be used as a nanoelectronic channel for local electrolysis opening the additional possibilities for ferroelectric lithography. © 2019 Author(s).

A major bottleneck in the fabrication of efficient bio-organic nanoelectronic devices resides in the strong charge recombination that is present at the different interfaces forming the complex system. An efficient way to overcome this bottleneck is to add a self-assembled monolayer (SAM) of molecules between the biological material and the electrode that promotes an efficient direct electron transfer whilst minimising wasteful processes of charge recombination. In this work, the presence of a pyrene-nitrilotriacetic acid layer carrying different metal centers as SAM physisorbed on graphene is fully described by mean of electrochemical analysis, field emission scanning electron microscopy, photoelectrochemical characterisation and theoretical calculations. Our multidisciplinary study reveals that the metal center holds the key role for the efficient electron transfer at the interface. While Ni2+ is responsible for an electron transfer from SAM to graphene, Co2+ and Cu2+ force an opposite transfer, from graphene to SAM. Moreover, since Cu2+ inhibits the electron transfer due to a strong charge recombination, Co2+ seems the transition metal of choice for the efficient electron transfer., Comment: 28 pages, 7 figures

Group IV semiconductor nanowires (NWs) are very attractive because of the variety of possible applications as well as of the good silicon (Si) compatibility, which is important for their integration into the existing semiconductor technology. We will give an overview of our activities on fabrication and application of group IV NWs. These include top-down fabrication (based on electron beam lithography and reactive ion etching) of Si and germanium (Ge) NWs having widths down to 6-7 nm as well as bottom-up (vapour-liquid-solid, VLS) growth of alloyed germanium-tin (Ge1-xSnx) NWs with x = 0.07-0.1 and diameters of 50-70 nm. We will also discuss the innovative nanoelectronic devices that we are working on: junctionless nanowire transistors (JNTs) and reconfigurable field effect transistors (RFETs). In particular, we will present results on Si JNTs for sensing application as well as on Ge and GeSn JNTs for digital logic. We will also show results on Si RFETs as well as preliminary data on SiGe and GeSn RFETs, which are expected to outperform the Si RFETs.

Long metallic nanowires combine crucial factors for nonconservative current-driven atomic motion. These systems have degenerate vibrational frequencies, clustered about a Kohn anomaly in the dispersion relation, that can couple under current to form nonequilibrium modes of motion growing exponentially in time. Such motion is made possible by nonconservative current-induced forces on atoms, and we refer to it generically as the waterwheel effect. Here the connection between the waterwheel effect and the stimulated directional emission of phonons propagating along the electron flow is discussed in an intuitive manner. Nonadiabatic molecular dynamics show that waterwheel modes self-regulate by reducing the current and by populating modes in nearby frequency, leading to a dynamical steady state in which nonconservative forces are counter-balanced by the electronic friction. The waterwheel effect can be described by an appropriate effective nonequilibrium dynamical response matrix. We show that the current-induced parts of this matrix in metallic systems are long-ranged, especially at low bias. This nonlocality is essential for the characterisation of nonconservative atomic dynamics under current beyond the nanoscale.

The fabrication of highly efficient bio-organic nanoelectronic devices is still a challenge due to the difficulty in interfacing the biomolecular component to the organic counterparts. One of the ways to overcome this bottleneck is to add a self-assembled monolayer (SAM) in between the electrode and the biological material. The addition of a pyrene–nitrilotriacetic acid layer to a graphene metal electrode enhances the charge transfer within the device. Our theoretical calculations and electrochemical results show that the formation of a pyrene–nitrilotriacetic acid SAM enforces a direct electron transfer from graphene to the SAM, while the addition of the Ni2+ cation and imidazole reverses the charge transfer direction, allowing an atomic control of the electron flow, which is essential for a true working device.

A semi-empirical approach to model the temperature effects on I-V characteristics of Carbon Nanotube Field Effect Transistors (CNTFETs) is proposed. The model includes two thermal parameters describing CNTFETbehaviour in terms of saturation drain current and threshold voltage, whose values are extracted from the simulated and trans-characteristics of the device in different temperature conditions. Our results are compared with those of a numerical model online available, obtaining I-V characteristics comparable but with a lower CPU calculation time.

The achievable fidelity of many nanoelectronic devices based on superconducting aluminum is limited by either the density of residual nonequilibrium quasiparticles n_qp or the density of quasiparticle states in the gap, characterized by Dynes parameter \gamma. We infer upper bounds n_qp < 0.033 um^-3 and \gamma < 1.6*10^-7 from transport measurements performed on Al/AlOx/Cu single-electron transistors, improving previous results by an order of magnitude. Owing to efficient microwave shielding and quasiparticle relaxation, typical number of quasiparticles in the superconducting leads is zero., Comment: 5 pages, 3 figures; updated to revised version that was accepted for publication, contains data from a reference sample without qp traps

We present a compact, semiempirical model of carbon nanotube field effect transistor easily implementable in simulation SPICE software to design analog and digital circuits. The model is based on analytical approximations and parameters extracted from quantum mechanical simulations, having compared the results with those of the numerical model online available and of experimental data.

In this paper we perform a simulation study on the limits of graphene-nanoribbon field-effect transistors (GNR-FETs) for post-CMOS digital applications. Both conventional and tunneling FET architectures are considered. Simulations of conventional narrow GNR-FETs confirm the high potential of these devices, but highlight at the same time OFF-state leakage problems due to various tunneling mechanisms, which become more severe as the width is made larger and require a careful device optimization. Such OFF-state problems are partially solved by the tunneling FETs, which allow subthreshold slopes better than 60 mV/dec, at the price of a reduced ON-current. The importance of a very good control on edge roughness is highlighted by means of a direct simulation of devices with non-ideal edges.

Molecular electronics aims for scaling down electronics to its ultimate limits by choosing single molecules as the building blocks of active devices. The advantages of this approach are the high reproducibility of molecular synthesis on the nanometer scale, the ability of molecules to form large structures by self-assembly, and the huge versatility of molecular complexes. On the other hand, conventional contacting techniques cannot form contacts on the single molecule scale and imaging techniques nowadays cannot provide a detailed image of such junctions. Therefore, the fabrication has to rely to some degree on self-organization of the constituents. The proof that a molecule has been contacted successfully can only be given by indirect methods, for example by measuring the current transport through the junctions. Here we give an overview of various techniques that were used successfully to contact molecules and to characterize them electrically. The techniques range from methods to contact single molecules to such which can be used to characterize ensembles of molecules. Especially, the comparison between such different techniques shows that a single measurement is always prone to artefacts originating from the unknown microscopic details of the junctions. It is therefore necessary to perform a statistically relevant number of measurements in order to resolve molecular properties. Various properties of the molecules can be studied. Special examples axe the influence of conformational changes of the molecules, differences between various coupling endgroups of the molecules and effects of light-irradiation onto the molecular junctions.

We report quantitative electrical admittance measurements of diffusive superconductor--normal-metal--superconductor (SNS) junctions at gigahertz frequencies and millikelvin temperatures. The gold-palladium-based SNS junctions are arranged into a chain of superconducting quantum interference devices. The chain is coupled strongly to a multimode microwave resonator with a mode spacing of approximately 0.6 GHz. By measuring the resonance frequencies and quality factors of the resonator modes, we extract the dissipative and reactive parts of the admittance of the chain. We compare the phase and temperature dependence of the admittance near 1 GHz to theory based on the time-dependent Usadel equations. This comparison allows us to identify important discrepancies between theory and experiment that are not resolved by including inelastic scattering or elastic spin-flip scattering in the theory., Comment: 8 pages, 6 figures

In this paper we present an exhaustive description of the basic types of CNTFETs. In particular we review two models, already proposed by us, which allow an easy implementation in circuit simulators, both in analog and in digital applications., Comment: 14 pages, 17 figures

cited By 0; Conference of SPIE Symposium on Gallium Nitride Materials and Devices VIII ; Conference Date: 4 February 2013 Through 7 February 2013; Conference Code:97274; International audience; Self-assembled GaN nanowires (NWs) currently are a subject of sustained interest in the scientific community motivated by both their potential applications for new LEDs, which should take benefit of the improved crystalline quality of those nano-objects, due to a strongly reduced defects density. In addition, interest of the scientific community for these 1D nano-systems is also related to the new fundamental questions opened by their strongly anisotropic geometry, and to their potential as possible building blocks for future nano-electronic devices. In this context, Raman spectroscopy has been increasingly used to study nitride NWs and several new phenomena have been reported to date with respect to these one-dimensional structures. In this work, both GaN and AlGaN nanowires grown by plasma-assisted Molecular Beam Epitaxy (MBE) have been experimentally investigated by scanning electron microscopy, atomic force microscopy and micro-Raman spectroscopy. Experimental results are analyzed and compared to theoretical ones obtained by dielectric models and Discrete Dipole Approximation (DDA) method. Evidence is given for original surface effects in the optical phonon physics related to both structural anisotropy of the material and 1D geometry of the GaN NWs. By using UV resonant excitation for AlGaN NWs in the whole range of composition, we demonstrate the selective excitation of AlGaN with the Al composition matching the energy of the exciting photons. Finally, we analyzed Raman data from single GaN NW after deposition on a flat substrate and we discuss the nature of strongly polarized A1(TO) phonon as a function of the NWs aspect ratio.

Beilstein Journal of Nanotechnology 2, 693-698 (2011). doi:10.3762/bjnano.2.75, Published by Beilstein-Institut zur Förderung der Chemischen Wissenschaften, Frankfurt, M.

The carrier statistics in carbon nanotubes (CNTs) with nonparabolic energy spectrum is studied in order to predict the ultimate (intrinsic) drift velocity as a function of temperature, concentration, and chirality. The extremely high mobilities in CNTs do not necessarily lead to higher saturation velocity that is limited to the intrinsic velocity calculated using Arora's formalism [V. K. Arora, Current Nanoscience 5, 227(2009)]. The ballistic nature of the mobility when CNT length is smaller than the scattering-limited mean free path is delineated. The results are of enormous importance in extracting carrier transport properties from a variety of experiments performed on CNTs.

Date of Conference: 5–8 January 2009 Conference Name: International Conference on Transport and Optical Properties of Nanomaterials, ICTOPON 2009 We study theoretically the electronic transport in parallel few-level quantum dots in the presence of both intradot and interdot long-range Coulomb interaction. Each dot is connected to two leads and the steady-state currents are calculated within the Keldysh formalism using the random-phase approximation for the interacting Green functions. Due to the momentum transfer mechanism between the two systems it is possible to get a nonvanishing current through an unbiased Coulomb-blockaded dot if the other dot is set in the nonlinear transport regime. The transitions between the levels of the passive dot reduce the drag current and lead to negative differential conductance.

In this paper we perform a simulation study on the limits of graphene nanoribbon (GNR) FETs. Both conventional and tunnelling FET architectures are taken into account. Simulations of conventional narrow GNR FETs confirm the high potential of these devices, but highlight at the same time OFF-state leakage problems due to various tunnelling mechanisms, which become more severe as the width is made larger and require a careful device optimization. Such OFF-state problems are partially solved by the tunnelling FETs, which allow subthreshold slopes better than 60 mV/dec, at the price of a reduced ON current. The importance of a very good control on edge roughness is also highlighted through direct simulation of devices with non-ideal edges.

The use of two truly two-dimensional gapless semiconductors, monolayer and bilayer graphene, as current-carrying components in field-effect transistors (FET) gives access to new types of nanoelectronic devices. Here, we report on the development of graphene-based FETs containing two decoupled graphene monolayers manufactured from a single one folded during the exfoliation process. The transport characteristics of these newly-developed devices differ markedly from those manufactured from a single-crystal bilayer. By analyzing Shubnikov-de Haas oscillations, we demonstrate the possibility to independently control the carrier densities in both layers using top and bottom gates, despite there being only a nano-meter scale separation between them., Comment: 4 Pages, 4 Fugures

This paper discusses the many challenges in the design of future nano architectures that result from the use of nanoelectronic devices. The relations among these challenges are studied, and an unfortunately subjective relative ranking is proposed. Possible solutions are suggested.

Logic circuits and the ability to amplify electrical signals form the functional backbone of electronics along with the possibility to integrate multiple elements on the same chip. The miniaturization of electronic circuits is expected to reach fundamental limits in the near future. Two-dimensional materials such as single-layer MoS2 represent the ultimate limit of miniaturization in the vertical dimension, are interesting as building blocks of low-power nanoelectronic devices, and are suitable for integration due to their planar geometry. Because they are less than 1 nm thin, 2D materials in transistors could also lead to reduced short channel effects and result in fabrication of smaller and more power-efficient transistors. Here, we report on the first integrated circuit based on a two-dimensional semiconductor MoS2. Our integrated circuits are capable of operating as inverters, converting logical “1” into logical “0”, with room-temperature voltage gain higher than 1, making them suitable for incorporation into digital circuits. We also show that electrical circuits composed of single-layer MoS2 transistors are capable of performing the NOR logic operation, the basis from which all logical operations and full digital functionality can be deduced.