177 results on '"Tsuyoshi Isshiki"'
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52. A Low-Cost and Energy-Efficient Multiprocessor System-on-Chip for UWB MAC Layer.
53. Narrow Fingerprint Sensor Verification with Template Updating Technique.
54. Unique Fingerprint-Image-Generation Algorithm for Line Sensors.
55. Practical Orientation Field Estimation for Embedded Fingerprint Recognition Systems.
56. Efficient anti-aliasing algorithm for computer generated images.
57. A Unified Performance Estimation Method for Hardware and Software Components in Multiprocessor System-On-Chips.
58. Orientation Field Estimation for Embedded Fingerprint Authentication System.
59. Design and Implementation of Task Synchronization Method in BLE Mesh Network for Educational Robot
60. Entropy Decoding Processor for Modern Multimedia Applications.
61. Toward Accurate Fall Detection with a Combined Use of Wearable and Ambient Sensors
62. New FPGA Architecture for Bit-Serial Pipeline Datapath.
63. Low Cost SoC Design of H.264/AVC Decoder for Handheld Video Player.
64. Decomposition of Task-Level Concurrency on C Programs Applied to the Design of Multiprocessor SoC.
65. A Multiprocessor SoC Architecture with Efficient Communication Infrastructure and Advanced Compiler Support for Easy Application Development.
66. Bit-serial pipeline synthesis and layout for large-scale configurable systems.
67. Bit-serial pipeline synthesis for multi-FPGA systems with C++ design capture.
68. High-Level Bit-Serial Datapath Synthesis for Multi-FPGA Systems.
69. A Fingerprint Matching Using Minutia Ridge Shape for Low Cost Match-on-Card Systems.
70. Hight-Performance Datapath Implementation on Field-Programmable Multi-Chip Module (FPMCM).
71. Distributed synchronization for message-passing based embedded multiprocessors.
72. New Rate Control Method with Minimum Skipped Frames for Very Low Delay in H.263+ Codec.
73. Cost-effective shadowing method using the ED-buffer on an adaptive light cube.
74. Machine Learning Approach with Multiple Open-source Data for Mapping and Prediction of Poverty in Myanmar
75. Enhancing Accelerometer-based Human Activity Recognition with Relative Barometric Pressure Signal
76. Hybrid shared-memory and message-passing multiprocessor system-on-chip for UWB MAC.
77. Semi-Adaptive, Reliability Oriented EH-WSN Energy Management Algorithm
78. RTL Design Framework for Embedded Processor by using C++ Description
79. Speaker Recognition using fusion of features with Feedforward Artificial Neural Network and Support Vector Machine
80. Small Area Fingerprint Verification using Deep Convolutional Neural Network
81. Scalable Full Hardware Logic Architecture for Gradient Boosted Tree Training
82. Narrow Fingerprint Template Synthesis by Clustering Minutiae Descriptors
83. HOG-Based Object Detection Processor Design Using ASIP Methodology
84. An Accurate and Fast Trace-aware Performance Estimation Model For Prioritized MPSoC Bus With Multiple Interfering Bus-Masters
85. FPGA for High-Performance Bit-Serial Pipeline Datapath.
86. An Elevation Mapping Algorithm Based on a Markov Random Field Model for Underwater Exploration
87. Pipeline Direction Extraction Algorithm Using Level Set Method
88. Pipeline Segmentation using Level-Set Method
89. ROS-Based Mobile Robot Pose Planning for a Good View of an Onboard Camera using Costmap
90. Speaker Recognition Using LPC, MFCC, ZCR Features with ANN and SVM Classifier for Large Input Database
91. Hybrid shared‐memory and message‐passing multiprocessor system‐on‐chip for UWB MAC layer
92. Efficient Synchronization for Distributed Embedded Multiprocessors
93. A Fast Trace Aware Statistical Based Prediction Model with Burst Traffic Modeling for Contention Stall in A Priority Based MPSoC Bus
94. A New FPGA Architecture for High-Performance bit-Serial Pipeline Datapath (Abstract).
95. A Multi-Temporal Convolutional Autoencoder Neural Network for Cloud Removal in Remote Sensing Images
96. High Voltage Transmission Tower Identification in an Aerial Video Sequence using Object-Based Image Classification with Geometry Information
97. High Voltage Transmission Tower Detection and Tracking in Aerial Video Sequence using Object-Based Image Classification
98. Dalvik Bytecode Acceleration Using Fetch/Decode Hardware Extension
99. Efficient Design Exploration Framework of SW/HW Systems Based on Tightly-coupled Thread Model
100. Register-Based Process Virtual Machine Acceleration Using Hardware Extension with Hybrid Execution
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