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Este proyecto ha surgido a través de las prácticas de empresa realizadas con Tecnocim Innova, empresa dedicada a la consultoría de proyectos de Industria 4.0 y de I+D+i en apoyo a las pequeñas y medianas empresas (PYME) españolas. Se trata de un estudio para la implantación de un Gemelo Digital en el que se ha realizado una consultoría a la empresa participante, Sensomec. Este proyecto se ha realizado a raíz de la obtención de una subvención pública de la Generalitat de Catalunya. Un Gemelo Digital es una representación virtual de un producto, servicio o proceso que simula el comportamiento de un sistema homólogo físico, con el objetivo de monitorizarlo, analizar su comportamiento ante determinadas situaciones y mejorar su rendimiento y eficacia. En este documento se plantea el problema detectado junto con las necesidades de la empresa, y los beneficios que pueden aportar la implantación del Gemelo Digital. Se ha realizado una investigación del estado del arte de esta tecnología perteneciente a la Industria 4.0, y se ha hecho una introducción de las PYME del sector industrial. Incluye una serie de análisis realizados en la consultoría ofrecida a Sensomec y se ha complementado con información más detallada por motivos académicos. El análisis organizativo estudia el grado de madurez digital y de innovación que tiene la empresa mediante encuestas y un análisis DAFO. El análisis técnico describe más en detalle las características del Gemelo Digital implantado por el equipo técnico de Software Tècnic Tecnocim, y se realiza una comparativa tanto de las alternativas técnicas que existen como del parque de maquinaria de la empresa. Finalmente se decide hacer uso del software TopSolid para virtualizar la mitad de las máquinas de mecanizado del taller. En el análisis económico se estudia la viabilidad económica del proyecto en base al coste inicial y el ahorro que se obtiene gracias a la implantación del Gemelo Digital. El análisis social pretende asesorar dando herramientas a la empresa para prepararse y adaptarse al cambio cultural que envuelve proyectos de digitalización como este. En el análisis medioambiental se estudian la huella de carbono debido al consumo eléctrico de las máquinas en funcionamiento.

© 2022 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes,creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. Edge computing requires the processing of real-time and personalized information with low power consumption. Neuromorphic devices are promising candidates for applications related to edge computing. Rate neurons, which are typically used in neuromorphic hardware, persistently consume power regardless of their outputs. To further reduce the power consumption of neuromorphic devices, spiking neurons are more suitable because they are event-driven, and information is transferred only when the neuron fires. Herein, we propose a two-variable spiking neuron circuit that operates in a fully analog manner by utilizing the physical properties of transistors as analog devices. By operating in the subthreshold region of the MOS transistor, the energy required to produce a spike is approximately tens of fJ/spike. Furthermore, the analog neuron can exhibit complex spike dynamics, such as chattering, as confirmed using post-layout simulations. The simulations indicated that a neural network comprising the proposed neuron circuits operates successfully and exhibits complex nonlinear behavior. These results provide a basis for dedicated hardware spiking neuron circuits, which could be used as ultra-low-power neuromorphic hardware in various applications, such as realizing liquid-state machines for processing time-series signals. © 2022 IEEE.

This project is intended to provide a methodology for the collection and storing of real-time data coming from PLCs, DCS, SCADAs or other data sources that can be found in industrial production plants. Gathering all of these data is crucial in order to accomplish a reliable and solid digital transformation for any industry. In this project, this process will be mainly focused in the chocolate process industry. However, the steps and procedures included in the study can be generally applied to any industry field, if appropriate modifications are done. There are several tools and methods in order to achieve these goal. Yet, this thesis will explain it by means of the OSIsoft PI software. The use of this tool gives the possibility to collect, enhance and deliver real-time data in any location. The system, when implemented, will provide end users, ranging from engineers to plant managers, to have easy access to data; empowering their possibilities, accelerating the work of data analysts and data scientists as well as supporting new business opportunities. This new framework can contribute to a productivity improvement, better quality assurance, more energy savings and enhancing asset health. When treating with plant process, it is always important to work with some testing environments. In those, it is possible to apply changes and do experiments without affecting the real factory production. Digital-twins play an important role in any simulation process as they are a virtual replica of the real-world system environment. It bridges the virtual cyberspace with the physical entities and, as such, is considered to be the pillar of Industry 4.0 and the innovation backbone of the future. Consequently, a simple digital-twin model for the process of chocolate conching will be reviewed as well

Nowadays, urban traffic affects the quality of life in cities as the problem becomes even more exacerbated by parking issues: congestion increases due to drivers searching slots to park. An Internet of Things approach permits drivers to know the parking availability in real time and provides data that can be used to develop predictive models. This can be useful in improving the management of parking areas while having an important effect on traffic. This work begins by describing the state-of-the-art parking predictive models and, then, introduces the recurrent neural network methods that were used Long Short-Term Memory and Gated Recurrent Unit, as well as the models developed according to real scenarios in Wattens and Los Angeles. To improve the quality of the models, exogenous variables related to weather and calendar are considered. Finally, the results are described, followed by suggestions for future research. This research was funded by Secretaria d’Universitats i Recerca de la Generalitat de Catalunya [2017-SGR-1749] and under the Industrial Doctorate Program [2016-DI-79].

The H2020 EIC-FTI De-RISC project develops a RISC-V space-grade platform to jointly respond to several emerging, as well as longstanding needs in the space domain such as: (1) higher performance than that of monocore and basic multicore space-grade processors in the market; (2) access to an increasingly rich software ecosystem rather than sticking to the slowly fading SPARC and PowerPC-based ones; (3) freedom (or drastic reduction) of export and license restrictions imposed by commercial ISAs such as Arm; and (4) improved support for the design and validation of safety-related real-time applications, (5) being the platform with software qualified and hardware designed per established space industry standards. De-RISC partners have set up the different layers of the platform during the first phases of the project. However, they have recently boosted integration and assessment activities. This paper introduces the De-RISC space platform, presents recent progress such as enabling virtualization and software qualification, new MPSoC features, and use case deployment and evaluation, including a comparison against other commercial platforms. Finally, this paper introduces the ongoing activities that will lead to the hardware and fully qualified software platform at TRL8 on FPGA by September 2022. This project has received funding from the European Union’s Horizon 2020 Research and Innovation programme under Grant Agreement EIC-FTI 869945. BSC work has also been partially supported by the Spanish Ministry of Science and Innovation under grant PID2019-07255GBC21/AEI/10.13039/501100011033.

Que fa la teva mascota quan no ets a casa? Amb tècniques de l'estat de l'art en detecció d'objectes i reconeixement d'objectes, un sistema de vigilància capaç de detectar mascotes és possible de fer. No tan sols això, sinó que fent servir altres tècniques de visió per computador, també seria possible l'anàlisi del comportament de mascotes. La finalitat d'aquest projecte és el de desenvolupar un sistema de visió per computador capaç de detectar comportaments com menjar, beure, descansar i moure's. A més a més, l'objectiu és poder fer aquesta detecció en temps real. What does your pet do when you are not home? With the state-of-the-art on object detection and object recognition a surveillance system capable of detecting pet would be possible. Furthermore, with several other computer vision techniques, not only pet detection, but also pet behaviour analysis is also possible. The aim of this project is to develop a computer vision system capable of detecting pet behaviour such as eating, drinking, resting and moving. Moreover, the objective is to do this detection in real-time.

The rising interest in extracting value from data has led to a broad proliferation of monitoring infrastructures, most notably composed by sensors, intended to collect this new oil. Thus, gathering data has become fundamental for a great number of applications, such as predictive maintenance techniques or anomaly detection algorithms. However, before data can be refined into insights and knowledge, it has to be efficiently stored and prepared for its later retrieval. As a consequence of this sensor and IoT boom, Time-Series databases (TSDB), designed to manage sensor data, became the fastest-growing database category since 2019. Here we propose a holistic approach intended to improve TSDB’s performance and efficiency. More precisely, we introduce and evaluate a novel polyglot-based approximation, aimed to tailor the data store, not only to time-series data –as it is done conventionally– but also to the data flow itself: From its ingestion, until its retrieval. In order to evaluate the approach, we materialize it in an alternative implementation of NagareDB, a resource-efficient time-series database, based on MongoDB, in turn, the most popular NoSQL storage solution. After implementing our approach into the database, we observe a global speed up, solving queries up to 12 times faster than MongoDB’s recently launched Time-series capability, as well as generally outperforming InfluxDB, the most popular time-series database. Our polyglot-based data-flow aware solution can ingest data more than two times faster than MongoDB, InfluxDB, and NagareDB’s original implementation, while using the same disk space as InfluxDB, and half of the requested by MongoDB. This research was partly supported by the Spanish Ministry of Science and Innovation (contract PID2019-107255GB) and by the Generalitat de Catalunya (contract 2017-SGR-1414).

Deriving WCET estimates for software programs with probabilistic means (a.k.a. pWCET estimation) has received significant attention during last years as a way to deal with the increased complexity of the processors used in real-time systems. Many works build on Extreme Value Theory (EVT) that is fed with a sample of the collected data (execution times). In its application, EVT carries two sources of uncertainty: the first one that is intrinsic to the EVT model and relates to determining the subset of the sample that belongs to the (upper) tail, and hence, is actually used by EVT for prediction; and the second one that is induced by the sampling process and hence is inherent to all sample-based methods. In this work, we show that Markov’s inequality can be used to obtain provable trustworthy probabilistic bounds to the tail of a distribution without incurring any model-intrinsic uncertainty. Yet, it produces pessimistic estimates that we shave substantially by proposing the use of a power-of-k function instead of the default identity function used by Markov’s inequality. Lastly, we propose a method to deal with sampling uncertainty for Markov’s inequality that consistently improves EVT estimates on synthetic and real data obtained from a railway application., LIPIcs, Vol. 231, 34th Euromicro Conference on Real-Time Systems (ECRTS 2022), pages 20:1-20:24

This report reflects on the best way to implement a software component which defines the balancer module, that is a specific module meant to spread the traffic a web-platform receives over multiple back-end servers. In particular, the discussion will be centered on which load-balancing algorithm and tool is the best by the point of view of a high-demand throughput system in order to avoid the overload of some compute nodes, considering that many open-source load-balancers can be found in the market in a great variety of forms, implementations and features; the focus will be over the needs of a Demand Side Platform, where performances are put at first place and the internals of the platform itself change constantly (such as the number of servers and the addresses of the servers itself). This research will be conducted following best-practices in Software Engineering and Research field, with the purpose to aggregate the various learning contributions gathered during my Double Degree experience among Barcelona and Torino. First, a background over the topic is provided, with a glance to the RTB world and the main concept that this kind of system deploys and an insight over the internals of the balancer component by means of proxy models and load-balancing strategies. Second, a preliminary research over the main software solutions will be conducted, with the aim of filtering the ones that don't match the requirements provided by a professional tech company; the documentation supplied by each balancer will be analyzed with the objective to fill a software evaluation matrix, provided to highlight the various feature supplied by each balancer and to discard faulty solutions. Then, a testing environment will be built for every solution still under evaluation in order to effectively check that the component respects the declared features. Moreover, the testing environment is exploited to discover which is the best software product by means of overall performances, requirement considered crucial for a low-latency-high-throughput platform; the final goal of this step is to provide a winner to the software selection process that will be implemented in the final step by means of stressing the limit of the softwares under evaluation both by means of incoming total connections and requests per second. Finally, the ultimate candidate will be implemented inside the platform environment: it will be installed and configured over the Infrastructure as a Service that hosts the Demand Side Platform environment, mapping the agents described later in the discussion with the actual final component's configuration file. In conclusion, the final goal is to observe the effects that this analysis and the consequent implementation over the production environment metrics will cause, with the objective to improve the quality of service of the back-end by reducing the average response times from servers side and to show a possible decrease of the infrastructure costs.

Artificial Neural Networks (ANNs) are powerful computational tools that are used to solve complex pattern recognition, function estimation and classification problems not manageable by other analytical tools. They are inspired by the structure and function of the human brain and throughout their development, they have been evolving towards more powerful and more biologically realistic models. A new generation of ANNs: Spiking Neural Networks (SNNs) have been developed. These networks emulate the neurobiological processing of information with temporal dynamics and precise timing. They are energy efficient and amenable to hardware application development. Such hardware SNNs work in real time and thus, having a real-time display makes full sense. This current thesis presents the realization of a real-time display using High-Definition Multimedia Interface (HDMI) connected to an ongoing project. This project uses HEENS (Hardware Emulator of Evolved Neural System) architecture to implement hardware SNNs on Zynq FPGAs (Field Programmable Gate Arrays). First of all, the communication to HDMI has been established, on two boards ZedBoard and Zynq ZC706. Screen resolution, video timings and color format have been studied. I2C (Inter-Integrated Circuit) communication has been examined and especially with the slave ADV7511, the HDMI transmitter, whose documentation has been also studied thoroughly. This transmitter has to be configured via I2C to be able to receive the HDMI signals and transmit them to the connector. Finally, all this acquired knowledge has enabled the actual implementation on the boards using VHDL (VHSIC (Very High Speed Integrated Circuit) Hardware Description Language) of the HDMI connection. As a result, bands of colors can be shown on monitor displays. Then, the representation of the Spiking Neural Network behavior has been made on screen, with plots to display the evolution in real time of the network. Communication has been established between the actual project architecture and the real-time display in order to receive the neural information and store it in a form which will allow their plot. At the same time, text generation has been implemented to be able to write text on screen. VHDL code has been developed to generate the plots with contours, ticks and labels as any standard chart. The first plot that has been made is the raster plot of the neuron spikes over time. Next, in order to monitor furthermore the Spiking Neural Network, another plot has been implemented to display internal neural parameters. Among these analog parameters, one of the most important is the membrane potential, whose plot has been studied more specifically. In the end, both plots: the raster plot and the membrane potential plot (for four chosen neurons to monitor), are displayed at the same time on the screen. To conclude, HDMI communication has been established on FPGA in order to monitor a Spiking Neural Network in real time. Two plots are displayed on the screen: the spikes over time and neural parameters for a few selected neurons of the network.

Actualment, l’augment del nivell del mar i un increment en la intensitat i freqüència de tempestes a conseqüència de canvi climàtic, fan que sigui cada vegada més necessari la creació de sistemes de detecció o previsió de fenòmens destructius en les costes. Avui en dia ja existeixen models de propagació d’onatge, però requereixen un temps de creació i computació elevat. L’objectiu principal d’aquest projecte és la confecció d’un sistema i metodologia capaç d’obtenir resultats de l’onatge en una platja tenint les dades d’una boia en aigües profundes o intermèdies de forma ràpida i fiable. En particular, el sistema realitzat ha esta creat per la costa de Badalona. Per aquest motiu, és necessària l’obtenció d’una base de dades d’onatge extensa que hagi estat generada prèviament per un model de propagació d’onatge. Donades les condicions del projecte, es va utilitzar el model de tercera generació SWAN per l’obtenció de la base de dades que propaga l’onatge al llarg del domini en funció d’unes condicions de contorn que se l’imposen. D’aquesta manera, disposant i generant aquest conjunt de dades i a través d’un seguit de processos d’interpolació, es va idear un sistema capaç d’obtenir valors de l’onatge en qualsevol punt del domini de forma molt ràpida i sense la necessitat d’idear un model en específic per cadascun dels casos. Actualmente, el aumento del nivel del mar y un incremento en la intensidad y frecuencia de tormentas a consecuencia del cambio climático, hacen que sea cada vez más necesario la creación de sistemas de detección o previsión de fenómenos destructivos en las costas. Hoy en día ya existen modelos de propagación de oleaje, pero requieren de un tiempo de creación y computación elevado. El objetivo principal de este proyecto es la confección de un sistema y metodología capaz de obtener resultados del oleaje en una playa teniendo los datos de una boya en aguas profundas o intermedias de forma rápida y fiable. En particular, el sistema realizado ha sido creado por la costa de Badalona. Por este motivo, es necesaria la obtención de una base de datos de oleaje extensa que haya sido generada previamente por un modelo de propagación de oleaje. Dadas las condiciones del proyecto, se utilizó el modelo de tercera generación SWAN para la obtención de la base de datos que propaga el oleaje a lo largo del dominio en función de unas condiciones de contorno que se le imponen. De este modo, disponiendo y generando este conjunto de datos y a través de una serie de procesos de interpolación, se ideó un sistema capaz de obtener valores del oleaje en cualquier punto del dominio de forma muy rápida y sin la necesidad de idear un modelo en específico para cada uno de los casos. Currently, sea level rise and an increase in the intensity and frequency of storms because of climate change, makes necessary the creation of systems for detecting or predicting destructive phenomena on the coasts. Wave propagation models already exist today, but require a long time to create and compute. The main objective of this project is to create a system and methodology capable of obtaining results from the waves on a beach quickly and reliably with the buoy data on deep or intermediate waters. In particular, the system has been set up along the coast of Badalona. For this reason, it is necessary to obtain a sufficiently extensive and previously generated wave database from a wave propagation model. Given the conditions of the project, the third generation SWAN model was used to obtain the database that propagates the wave across the domain based on the boundary conditions that are imposed on it. In this way, having and generating this set of data and through a series of interpolation processes, a system capable of obtaining wave values at any point in the domain very quickly was devised, and without the need to create a specific model for each of the cases.

© 2021 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. A new embedded system is presented for real-time wave monitoring on coastal areas using SigFox communication. SigFox is a Low-Power Wide-Area Network technology that has been rarely used in coastal marine monitoring. The system is based on the low-power TD1205P module that includes a microcontroller, an accelerometer, a GNSS receiver and a SigFox transceiver. Each hour, the module estimates the wave’s maximum height (Hmax) and mean period (Tz), determines the GPS position, and wirelessly transmits the data through the SigFox network. The procedure for wave parameter estimation is based on the zero-upcrossing method using the vertical acceleration data. It was experimentally validated by attaching the embedded system to a moored buoy and comparing Hmax and Tz with that provided by a seafloor acoustic wave and current profiler, used as a reference. Results over a period of two months show a good match for Hmax but less for Tz, which cross-correlation values at zero lag of about 0.85 and 0.5, respectively. Power tests of the embedded system were also performed resulting in a lifetime estimation of 420 days with a battery pack of 3 Ah. This work was supported by the Spanish Ministry of Economy and Competitiveness and the European Regional Development Fund under project TEC2016-76991-P and by the project MELOA from the European Commission’s Horizon 2020 research and Innovation program under Grant Agreement No. 776280. The first author has a grant from the Secretariat of Universities and Research of the Ministry of Business and Knowledge of the Government of Catalonia on the FI program (ref. BDNS 362582).

El projecte tractarà de la concepció, disseny i implementació d'un mapa de contaminació ambiental a Terrassa en temps real

This work proposes an SRAM array with built-in real-time error detection (RTD) capabilities. Each cell in the new RTD-SRAM array computes its part of the real-time parity of an SRAM array column on-the-fly. RTD based arrays detect a fault right away after it occurs, rather than when it is read. RTD, therefore, breaks the serialization between data access and error detection and, thus, it can speed-up the access-time of arrays that use on-the-fly error detection and correction. The paper presents an analysis and optimization of an RTD-SRAM and its application to a tag array. Compared to a state-of-the-art tag array protection, the evaluated scheme has comparable error detection and correction strength and, depending on the array dimensions, the access time is reduced by 5% to 18%, energy by 20% to 40% and area up to 30%.

Real-time multiprocessor systems have particular needs related to their design, verification, and validation. In particular, they have stringent requirements to prove that they will correctly perform their functionalities, on-time and minimizing system failures. Leading industrial applications such as aerospace vehicles or low orbit satellites require an increase of computing power while pursuing fast certification and a short time to market. These performance demands push for the adoption of multicore processors, generally with limited core counts, and connected with low-complexity interconnects, such as buses, to keep design complexity low and have some degree of isolation by construction among cores connected to different buses. The need for appropriate multicore interference timing verification and validation grows as those multicores are adopted for safety-relevant systems since evidence on the deadlines being met is needed. In particular, verification means are needed to assess whether deadlines can be met, and validation means are required in order to test that execution time bounds are not exceeded even under stress conditions. The lack of control and observability channels when using software-only interference generation tools leads to the overwhelming design and validation costs and inefficiencies since testing effort needs to increase to achieve some high coverage of realistic stressing conditions. However, still, there is not an easy way to assess whether such coverage is effectively achieved. All these barriers lead to less powerful and more expensive systems, as well as lower confidence in the guarantees achieved, and gives us a motivation to design a fully integrated hardware module that focuses on the generation of critical corner-cases traffic scenarios and eases the verification and validation of system interference bounds. This thesis's work focuses on implementing and integrating a hardware traffic injector that aims to go one step further into the stress-testing state of the art multiprocessor bus-based SoCs in real-time safety-critical applications. Our hardware module offers fine-grained controllability on a range of traffic patterns. It features a transparent software layer capable of interruption-based control and monitoring while maintaining a small memory footprint. AMBA AHB interfaces are provided for a wide market range of hardware platforms. The unit has been integrated with industry-proven SoCs such as NOEL-V (Cobham Gaisler) on novel space-graded hardware platforms as De-RISC and SELENE.

Statistics units (SUs) in MPSoCs are becoming increasingly used for the (1) verification and (2) validation of multicore timing interference, as well as for (3) deploying safety measures in safety-related real-time systems. However, existing SU extensions to manage multicore timing interference have neither been integrated together nor deployed in commercial MPSoCs.This paper presents the realization of the Safe Statistics Unit (SafeSU for short), which smartly integrates existing solutions for multicore timing interference verification, validation and monitoring, and is in turn integrated in commercial space-graded RISC-V and SparcV8 MPSoCs. Our evaluation illustrates the operation of the SafeSU, and paves the way for a thorough validation prior to reaching commercialization and being offered as open source IP. This work has received funding from the European Union’s Horizon 2020 Research and Innovation programme under Grant Agreement EICFTI 869945.

We report the automated deployment of 5G services across a latency-aware, semi- disaggregated, and virtualized metro network. We summarize the key findings in a detailed analysis of end-to-end latency, service setup time, and soft-failure detection time. The research leading to these results has received funding from the EC and BMBF through the METRO-HAUL project (G.A. No. 761727) and OTB-5G+ project (reference No. 16KIS0979K). Peer Reviewed Article signat per 24 autors/es: B. Shariati, Fraunhofer HHI, Germany / J. J. Pedreno-Manresa, ADVA, Germany / A. Dochhan, ADVA, Germany / A. S. Muqaddas, UOB, UK / R. Casellas, CTTC/CERCA, Spain / O. González de Dios, Telefónica, Spain / L. L. Canto, Telefónica, Spain / B. Lent, Qognify GmbH, Germany / J. E. López de Vergara, Naudit HPCN, Spain / S. López-Buedo, Naudit HPCN, Spain / F. J. Moreno, UPCT, Spain / P. Pavón, UPCT, Spain / L. Velasco, UPC, Spain / S. Patri, ADVA, Germany / A. Giorgetti, CNIT, Italy / IEIIT-CNR, F. Cugini CNIT, Italy / A. Sgambelluri, CNIT, Italy / R. Nejabati, UOB, UK / D. Simeonidou, UOB, UK / R.-P. Braun, Deutsche Telekom, Germany / A. Autenrieth, ADVA, Germany / J.-P. Elbers, ADVA, Germany / J. K. Fischer, Fraunhofer HHI, Germany / R. Freund, Fraunhofer HHI, Germany

The authors present the parallel-hybrid recursive least square (PH-RLS) algorithm for an accurate self-mixing interferometric laser vibration sensor coupled with an accelerometer under industrial conditions. Previously, this was achieved by using a conventional RLS algorithm to cancel the parasitic vibrations where the sensor itself is not in the stationary environment. This algorithm operates in sequential mode and due to its compute and data-intensive nature, the algorithm does not work for real-time applications, hence requires parallel computing. Therefore, the existing conventional RLS C program is parallelized by using hybrid OpenACe C/MPI (Open Accelerators/Message Passing Interface) parallel programming models and tested on Barcelona Supercomputing Center CTE-Power9 Supercomputer. The computational performance of the proposed PH-RLS algorithm is compared with the existing conventional RLS code by executing on multi distributed processors and uni-core processor architecture, respectively. While comparing the performance of conventional RLS with a PH-RLS algorithm on eight nodes of CTE-Power9 supercomputer, the results show that the PH-RLS algorithm gets 5857 times of performance improvement as compared to the conventional RLS implementation on a single node system. The results show that the proposed PH-RLS also gives a scalable performance for a different range of vibration signals, making it a suitable choice for real-time self-mixing interferometer sensing systems working under industrial conditions.

This article presents a method for determining near-Pole ionization depletion regions and troughs from global navigation satellite system (GNSS) vertical total electron content (VTEC) maps. To define the regions, we use Image processing tools, considering the VTEC maps as gray-level images. In this work, watershed segmentation is applied to determine the edges of regions, based on the flow of areas between the lowest ionization zones (10%). In order to enhance the contrast between low-ionization regions and those with a higher relative ionization, the histogram of the maps is equalized, which increases the contrast of the VTEC maps, which is the distance between low-ionization regions and those with a higher relative ionization are increased. The use of percentile thresholds makes this method independent of hypotheses about the generation of depletions, their morphology, or the number of depletion regions that can occur on a map. We test the performance by comparing the depletion regions identified in eight events reported in the literature under different conditions of the ionosphere. The events used as reference were measured by satellites, radar, and GNSS. The method that we propose allows for real-time processing of GNSS VTEC maps. The morphology of the detected regions matches the shape that is reported in the literature. This work was supported in part by Ministerio de Ciencia e Inovación (MICINN) under Project PID2019-107579RB-I00, and in part by the European Commission (EC)-Funded Activity PolarGIMs2.

This work has been supported by the project EMSO-LINK (H2020 grant Agreement No. 731036), by Generalitat de Catalunya “Sistemas de Adquisición Remota de datos y Tratamiento de la Información en el Medio Marino” (SARTI-MAR)” 2017 SGR 371 and by the Spanish Ministry of Education and Science (MEC) with the project “Redes de sensores submarinos autónomos y cableados aplicados a la monitorización remota de indicadores biológicos” TEC2017-8786 and EMODnet Physics EASME/EMFF/2018/1.3.1.8/ Lot3/SI2.810790. This work used the EGI infrastructure with the dedicated support of INFN-CATANIASTACK. Researchers want to acknowledge the support of the Associated Unit Tecnoterra composed by members of Universidad Politécnica de Catalunya (UPC) and the Consejo Superior de Investigaciones Científicas (CSIC).

The interference co-running tasks generate on each other’s timing behavior continues to be one of the main challenges to be addressed before Multi-Processor System-on-Chip (MPSoCs) are fully embraced in critical systems like those deployed in avionics and automotive domains. Modern MPSoCs like the Xilinx Zynq UltraScale+ incorporate hardware Quality of Service (QoS) mechanisms that can help controlling contention among tasks. Given the distributed nature of modern MPSoCs, the route a request follows from its source (usually a compute element like a CPU) to its target (usually a memory) crosses several QoS points, each one potentially implementing a different QoS mechanism. Mastering QoS mechanisms individually, as well as their combined operation, is pivotal to obtain the expected benefits from the QoS support. In this work, we perform, to our knowledge, the first qualitative and quantitative analysis of the distributed QoS mechanisms in the Xilinx UltraScale+ MPSoC. We empirically derive QoS information not covered by the technical documentation, and show limitations and benefits of the available QoS support. To that end, we use a case study building on neural network kernels commonly used in autonomous systems in different real-time domains., LIPIcs, Vol. 196, 33rd Euromicro Conference on Real-Time Systems (ECRTS 2021), pages 3:1-3:26

The number of cameras deployed to the edge of the network increases by the day, while emerging use cases, such as smart cities or autonomous driving, also grow to expect images to be analyzed in real-time by increasingly accurate and complex neural networks. Unfortunately, state-of-the-art accuracy comes at a computational cost rarely available in the edge cloud. At the same time, due to strict latency constraints and the vast amount of bandwidth edge cameras generate, we can no longer rely on offloading the task to a centralized cloud. Consequently, there is a need for a meeting point between the resource-constrained edge cloud and accurate real-time video analytics. If state-of-the-art models are too expensive to run on the edge, and lightweight models are not accurate enough for the use cases in the edge, one solution is to demand less from the lightweight model and specialize it in a narrower scope of the problem, a technique known as model specialization. By specializing a model to the context of a single camera, we can boost its accuracy while keeping its computational cost constant. However, this also involves one training per camera, which quickly becomes unfeasible unless the entire process is fully automated. In this paper, we present and evaluate COVA (Contextually Optimized Video Analytics), a framework to assist in the automatic specialization of models for video analytics in edge cloud cameras. COVA aims to automatically improve the accuracy of lightweight models by specializing them to the context to which they will be deployed. Moreover, we discuss and analyze each step involved in the process to understand the different trade-offs that each one entails. Using COVA, we demonstrate that the whole pipeline can be effectively automated by leveraging large neural networks used as teachers whose predictions are used to train and specialize lightweight neural networks. Results show that COVA can automatically improve pre-trained models by an average of 21% mAP on the different scenes of the VIRAT dataset. This work has been partially supported by the Spanish Government (contract PID2019-107255GB) and by Generalitat de Catalunya, Spain (contract 2014-SGR-1051).

The integration of artificial intelligence(AI) in a drone belongs to the field known as AI on the edge. AI on the edge applications have more restricted requirements regarding the memory, energy consumption and computational power available with respect to a conventional deployment. This causes the application of optimization techniques to achieve the requirements that usually have a negative impact on the performance of the model. The aim of this project consists in researching and implementing techniques known as "Knowledge Distillation"(KD) applied to models that follow YOLO architectures that reduce the negative effect of the optimizations. In KD, one or more networks act as teachers and help a student network during its training stage to obtain better results. YOLOv3 and tiny-YOLOv3 networks have been successfully implemented from scratch and different KD techniques have been developed and their effects on the training studied. The preliminary results obtained validate these techniques to obtain better performance on optimized edge models. La integración de algoritmos de inteligencia artificial(IA) en un dron forma parte de una campo conocido como IA en el "edge". Las aplicaciones de IA en el "edge" tienen unos requerimientos más estrictos respecto a la memoria, consumo energético y potencia computacional disponible respecto a un despliegue convencional. Este hecho hace que se apliquen diferentes técnicas para optimizar los modelos que normalmente tienen un impacto negativo en el rendimiento del modelo. Este proyecto consiste en la investigación e implementación de técnicas conocidas como "Knowledge Distillation"(KD) en modelos de la arquitectura YOLO que reducen el efecto negativo de las optimizaciones. En los algoritmos de KD una o más redes neuronales actúan como profesor y ayudan a una red "estudiante" durante el entrenamiento para mejorar los resultados. Se han implementado con éxito las redes YOLOv3 y tiny-YOLOv3 y diferentes variaciones de técnicas de KD y se ha estudiado su impacto en el entrenamiento de la red estudiante. Los resultados preliminares obtenidos validan estas técnicas para obtener redes optimizadas para el "edge". La integració d'algoritmes d'intel·ligència artificial(IA) en un dron forma part del camp conegut com a IA en el "edge". Les aplicacions de IA en l'"edge" tenen uns requeriments més estrictes pel que fa a memòria, consum energètic i potència computacional disponible respecte a un desplegament convencional. Aquest fet fa que s'apliquin diferents tècniques per optimitzar els models que normalment tenen un impacte negatiu en el rendiment del model. Aquest projecte consisteix en la recerca i implementació de tècniques conegudes com a "Knowledge Distillation"(KD) en models de l'arquitectura YOLO que redueixen l'efecte negatiu de les optimitzacions. En els algoritmes de KD una o més xarxes actuen de professor i ajuden a una xarxa estudiant durant l'entrenament per millorar els resultats. S'han implementat amb èxit les xarxes YOLOv3 i tiny-YOLOv3 i diferents variacions de tècniques KD i estudiat el seu impacte en l'entrenament de la xarxa estudiant. Els resultats experimentals preliminars obtinguts validen aquestes tècniques per obtenir millores del rendiment de les xarxes optimitzades pel "edge".

L’objectiu és desenvolupar un model de bessó digital basat en l’intercanvi de dades entre la part física i la part digital d’una estructura de cables d’acer pretensats utilitzada en cobertes. Per al desenvolupament del bessó digital, es desenvolupa una connexió en temps real entre l’estructura física (xarxes de cables pretensats) i els models numèrics virtuals però realistes d’aquests elements (en plataformes compatibles amb BIM). El objetivo es desarrollar un modelo de gemelo digital basado en el intercambio de datos entre la parte física y la parte digital de una estructura de cables de acero pretensados utilizada en cubiertas. Para el desarrollo del gemelo digital, se desarrolla una conexión en tiempo real entre la estructura física (redes de cables pretensados) y los modelos numéricos virtuales pero realistas de estos elementos (en plataformas compatibles con BIM). The aim is to develop a digital twin demonstrator of the physical to digital structural data flow in a prestressed steel cable structure used in roofs. For the development of the digital twin, a realtime connection between the physical infrastructure (prestressed cable nets) and virtual yet realistic numerical models of such assets (in BIM-friendly platforms) are developed.

Worst-case execution time (WCET) analysis of systems with data caches is one of the key challenges in real-time systems. Caches exploit the inherent reuse properties of programs, temporarily storing certain memory contents near the processor, in order that further accesses to such contents do not require costly memory transfers. Current worst-case data cache analysis methods focus on specific cache organizations (LRU, locked, ACDC, etc.). In this article, we analyze data reuse (in the worst case) as a property of the program, and thus independent of the data cache. Our analysis method uses Abstract Interpretation on the compiled program to extract, for each static load/store instruction, a linear expression for the address pattern of its data accesses, according to the Loop Nest Data Reuse Theory. Each data access expression is compared to that of prior (dominant) memory instructions to verify whether it presents a guaranteed reuse. Our proposal manages references to scalars, arrays, and non-linear accesses, provides both temporal and spatial reuse information, and does not require the exploration of explicit data access sequences. As a proof of concept we analyze the TACLeBench benchmark suite, showing that most loads/stores present data reuse, and how compiler optimizations affect it. Using a simple hit/miss estimation on our reuse results, the time devoted to data accesses in the worst case is reduced to 27% compared to an always-miss system, equivalent to a data hit ratio of 81%. With compiler optimization, such time is reduced to 6.5%. This work was supported in part by MINECO/AEI/ERDF (EU) under Grant TIN2016-76635-C2-1-R, Grant TIN2017-86727-C2-1-R, and Grant PID2019-105660RB-C21; in part by the Aragón Government under Grant T58_20R research group; in part by the Generalitat de Catalunya under Grant 2017 SGR 786 and Grant FI-DGR 2015; and in part by the Construyendo Europa desde Aragón under Grant ERDF 2014-2020.