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Doped polycrystalline silicon (poly-Si) passivating contacts featuring a thin tunneling oxide have emerged as one of the most promising carrier selective contacts for crystalline silicon (c-Si) solar cells due to their very low recombination and resistive losses, as well as a high thermal stability compared to amorphous silicon (a-Si:H) heterojunctions. This contact technology consists of a heavily doped poly-Si layer on top of a c-Si substrate with an interfacial ultra-thin silicon oxide layer (SiO x ). To implement poly-Si passivating contacts into an industrial silicon solar cell production line, a cost-effective and high-throughput deposition process is required. Atmospheric pressure chemical vapor deposition (APCVD) process is a single side deposition process that requires no vacuum or plasma systems and is very well suited for high volume manufacturing. In this work, we present an in-line APCVD process for depositing heavily phosphorus doped poly-Si films to form low recombination electron contacts using silane (SiH 4 ) and phosphine (PH 3 ) as precursor gases. The as-deposited samples went through different post deposition annealing processes for solid phase crystallization, dopant activation and dopant diffusion. We have studied the effect of different process parameters like deposition temperature, precursor gas ratio and different post deposition treatments etc. on the surface passivation quality of this contact.

In advanced node transistors the contact resistance dominates parasitic resistance and negatively impacts power consumption and speed. Therefore, there is considerable efforts directed towards reducing source/drain (S/D) contact resistivity below 10 −9 ohm-cm 2 level. Increasing the carrier concentration in S/D requires development of doping and annealing techniques and evaluation of dopant activation, especially in the near-surface regions of the films. In this contribution, we present a study of active dopant depth profiles through n-type highly doped Si films using Differential Hall Effect Metrology (DHEM) technique.

International audience; Defect evolution and dopant activation are intimately related to the use of ion implantation and annealing, traditionally used to dope semiconductors during device fabrication. However, during the last decade, the increased difficulties to maintain the transistor miniaturization pace have led to a diversification of both the basic device architecture and processes. In this context, the recent advances in nanosecond laser annealing have opened the way to solve a wide spectrum of difficult challenges in semiconductor technology, well beyond the traditional source/drain fabrication issues. Indeed, thanks to its low thermal budget, laser annealing is very attractive not only for the achievement of abrupt and highly doped junctions, but more generally for all semiconductor technologies in which dopants need to be activated while preserving the integrity of the surrounding areas, as in the case of CMOS backside imagers or 3D integration technologies. After giving an overview of some relevant published studies in this domain [1], we will present our recent investigations focused on damage and strain evolution in SiGe and their impact on dopant distribution and electrical activation during nanosecond laser thermal annealing. These will concern compressively strained SiGe layers (with Ge fraction, x, ranging from 0 to 0.4), which were submitted to Ultraviolet Nanosecond Laser Anneal (UV-NLA) at different energies. The impact of the process parameters on the annealing regimes and on the relaxation of the initial compressive strain are investigated in detail. Optimised conditions to achieve pseudomorphic, defect-free structures are identified, which depend on the elastic energy stored in the recrystallized structure (Fig. 1). The impact of the structural modifications induced by UN-NLA on the efficiency of dopant activation is also discussed. Finally, Ge segregation towards the surface occurs during melt laser annealing, resulting in the formation of a Ge-rich surface layer (Fig. 2). Such pseudomorphic SiGe layers with a graded composition and a Ge-rich surface may find promising applications such as contact resistance lowering in doped layers. In the last part, some recent investigations of phosphorus-doped ultra-thin SOI layers submitted to UV-NLA will be presented. Their recrystallization is investigated as a function of the implanted dose as well as the laser energy density, while the best conditions to achieve high dopant activation (up to ~2 % at.) are identified.

As advanced CMOS scaling with FinFETs continues beyond the 10/7nm nodes, contact resistance (Rc) remains a dominant component affecting device performance. The FinFET Source/Drain (S/D) contact area has become smaller with fin pitch scaling, resulting in drastically increased Rc. To achieve higher drive currents and fully realize the performance gain from FinFET architectural changes, it is critical to continue to reduce contact resistivity (ρc) < 1.0×10−9 Ω.cm2 for both NMOS and PMOS. In this paper, we review the recent trends for ρc reduction for advanced CMOS devices and discuss approaches that have demonstrated reduction in ρc, such as in-situ heavily doped epitaxial films for S/D, advanced ion implantation and laser anneals. The implant techniques include pre-amorphization implants (PAI), dopant boosting implants, cryogenic (−100oC) implants for damage engineering and plasma doping (PLAD) for conformal doping of high aspect ratio (HAR) contacts. With such high levels of doping from epi and implants, advanced laser anneals are key for epitaxial regrowth and formation of metastable alloys for dopant supersaturation or segregation in top layers. Millisecond laser anneal (MSA) improves dopant activation and nanosecond laser anneal (NLA) permits superactivation, and both have become key enablers for ρc reduction. This paper also reviews two alternative contact approaches: dual silicide scheme and wrap-around contact (WAC), as potential pathways to further reduce Rc for advanced CMOS nodes.

Silicon carbide (SiC) is an attractive material for power devices owing to the availability of high-quality epitaxial wafers and superior physical properties, such as its high breakdown electric field strength, high electron mobility, and low anisotropy. Ion implantation is a key process for both n- and p-type selective doping of SiC devices. A subsequent annealing in the temperature range of 1600- 1800°C is required to remove the damage induced by the implantation process and to electrically activate the implanted dopants. The aim of this work is the investigation of the effect of thermal annealing on the damage induced by Phosphorous ion implantation to produce n-type regions.

Phosphorus has low solubility in silicon, but nonequilibrium incorporation of phosphorus exhibits unusual high strain and low contact resistance for advanced Si-based metal-oxide-semiconductor field-effect transistors. Despite recent technological breakthroughs, the origin of tensile strain and electrical deactivation in P-doped Si films is not yet fully understood. Here, by using a combination of experiments and first-principles calculations, we investigate the effect of nonequilibrium phosphorus incorporation into Si lattices and subsequent annealing on structural, electrical, and bonding properties of P-doped Si films. Quantitative structural analyses reveal that the high tensile strain is generated by the incorporation of P into Si substitutional sites irrespective of the distribution of P atoms. More importantly, we found that advanced postgrowth annealing lead to significantly enhanced electrical properties while keeping the same physical states without loss of induced strain. To explore the reason ...

We present a novel hybrid dopant activation technique for n-type silicon–germanium (SiGe) to achieve high doping concentration and ultra-shallow junction at low temperature (≤500 °C) using rapid thermal annealing and pulsed green laser post-annealing (hybrid RTA-GLA). The hybrid RTA-GLA process achieved one of the highest surface and peak doping concentrations of $1.82\times 10^{\textsf {20}}$ cm−3 and $9.27\times 10^{\textsf {20}}$ cm−3, respectively, compared with low-temperature doping techniques for n-type SiGe. In addition, the n-type SiGe films doped by the hybrid RTA-GLA process provide ultra-shallow (

We fabricated transmission-line method (TLM)-type devices for analysis of the interface uniformity between an aluminum electrode and n-type silicon by using phosphorus implantation. For the dopant activation, we adopted novel microwave irradiation (MWI) as an alternative to rapid thermal annealing (RTA). Also, we investigated the contact resistance (RC), sheet resistance (RS), transfer length (LT) and specific contact resistance (ρC) that affected the thin-film transistor’s (TFT’s) performance through the TLM, and we compared parameters for various annealing methods. MWI showed a RC (2.175 Ω) which is similar to that for RTA (1.825 Ω). Also, MWI resulted in improved LT and ρC (4.426 μm, 0.48×10−4 Ω·cm2, respectively) characteristics compared to RTA (8.238 μm, 0.752 × 10 −4 Ω·cm2, respectively). Consequently, MWI, which has a lower thermal budget showed improved uniformity compared to RTA, and the total processing time was lower. Thus, we expect the MWI method to be an excellent choice for high-performance poly-Si TFT applications and to have various advantages.

Ultra-wide band-gap nitrides have huge potential in micro- and optoelectronics due to their tunable wide band-gap, high breakdown field and energy density, excellent chemical and thermal stability. However, their application has been severely hindered by the low p-doping efficiency, which is ascribed to the ultrahigh acceptor activation energy originated from the low valance band maximum. Here, a valance band modulation mode is proposed and a quantum engineering doping method is conducted to achieve high-efficient p-type ultra-wide band-gap nitrides, in which GaN quantum-dots are buried in nitride matrix to produce a new band edge and thus to tune the dopant activation energy. By non-equilibrium doping techniques, quantum engineering doped AlGaN:Mg with Al content of 60% is successfully fabricated. The Mg activation energy has been reduced to about 21 meV, and the hole concentration reaches higher than 1018 cm−3 at room temperature. Also, similar activation energies are obtained in AlGaN with other Al contents such as 50% and 70%, indicating the universality of the quantum engineering doping method. Moreover, deep-ultraviolet light-emission diodes are fabricated and the improved performance further demonstrates the validity and merit of the method. With the quantum material growth techniques developing, this method would be prevalently available and tremendously stimulate the promotion of ultra-wide band-gap semiconductor-based devices.

The effect of thickness of Ga doped ZnO (GZO) layer on the performance of GZO/p-Si heterojunctions fabricated by reactive co-sputtering of Zn–GaAs target is investigated. GZO films were deposited at 375 °C with 0.5% GaAs area coverage of Zn target and 5% O2 in sputtering atmosphere. X-ray diffraction and X-ray photoelectron spectroscopy show that c-axis orientation of crystallites, Ga/Zn ratio and oxygen related defects depend substantially on the thickness of films. The 200–350 nm thick GZO films display low carrier concentration ∼1017 cm−3, which increases to >1020 cm−3 for thicker films. The diodes fabricated with >500 nm thick GZO layers display non-rectifying behaviour, while those fabricated with 200–350 nm thick GZO layers display nearly ideal rectification with diode factors of 1.5–2.5, along with, turn-on voltage ∼1 V, reverse saturation current ∼10−5 A, barrier height ∼0.4 eV and series resistance ∼200 Ω. The drastically improved diode performance is attributed to small Ga/Zn ratio (∼0.01) and extremely low dopant activation (∼0.3%), owing to diffusion and non-substitutional incorporation of Ga in thin GZO layers, which cause self-adjustment of doping concentration. These factors, together with c-axis orientation and chemisorbed oxygen at grain boundaries, facilitate ideal diode characteristics, not reported earlier for GZO/p-Si heterojunctions.

New free electron lasers, such as SLAC’s LCLS-II, will provide unique scientific imaging opportunities. In order to fully utilize these facilities, we need to develop detectors with shallow entrance windows that will enable detection of soft x-rays from 250eV-1.5KeV. Achieving adequately shallow entrance windows is challenging because the high temperature anneal needed to activate the dopant for the diode termination also drives the dopant profile deeper, growing the region that is insensitive to soft x-rays. A new microwave annealing technology provides an efficient way to achieve shallow entrance windows in fully depleted high-resistivity silicon sensors. The micro-wave anneal technique can activate dopants at low substrate temperature, with minimal dopant diffusion, and can be used to fabricate both n-type and p-type entrance windows. SRP and SIMS measurements were used to verify dopant activation with negligible dopant diffusion. We then applied the microwave anneal process to a planar sensor device wafer, using the new process to create the backside diode contact. Electrical test of the resulting sensors shows good reverse bias diode characteristics. The sensors have been bump-bonded to a read-out ASIC and used successfully to measure an Fe-55 x-ray spectrum. Process and device simulations were performed to characterize the quantum efficiency of the entrance window for soft x-rays. This technique is useful for other sensor applications requiring a shallow entrance window, including detectors for UV photons, low energy ions and low energy electrons.

The solid phase recrystallization of partially amorphized SOI structures using a pulsed Ultra-Violet Nanosecond Laser Annealing (UV-NLA) is reported. It is shown that combining UV-NLA process with a heating chuck at low temperature (450 °C) results in the perfect recrystallization of the amorphized portion of the silicon layer. Actually, sub-melt multi-pulse UV-NLA enables obtaining the total crystal recovery and a very high dopant activation rate, comparable to melt laser annealing approaches or high temperature rapid thermal annealing, with a very low overall thermal budget. This approach is a great alternative to traditional solid phase epitaxial regrowth process, which reach it limits, in terms of recrystallization rate, at temperatures lower than 500 °C. The process presented here is thus suitable for integration paths in which the thermal budget must be limited as for example 3D sequential integration. Besides the high activation rate, another benefit of the solid phase recrystallization, compared to an equivalent laser anneal in the melt regime, is the almost unchanged surface roughness. Furthermore, the use of an in-situ metrology based on Time Resolved Reflectometry (TRR) enables the monitoring of the crystalline seed thickness evolution during UV-NLA and the estimation of the recrystallization rate.

This paper is selected as Featured This paper presents comprehensive density functional theory-based simulations to understand the characteristics of dopant atoms in the core and on the surface of ultra-thin sub-5 nm Si films. Quantum confinement-induced bandgap widening has been investigated for doped Si films considering two different doping concentrations. Thickness-dependent evolution of dopant formation energy is also extracted for the thin films. It is evident from the results that doping thinner films is more difficult and that dopant location at the surface is energetically more favorable compared to core dopants. However, the core dopant generates a higher density of states than the surface dopant. Projecting the carrier states in the doped Si film onto those of a reference intrinsic film reveals dopant-induced states above the conduction band edge, as well as perturbations of the intrinsic film states. Furthermore, to experimentally evaluate the ab initio predictions, we have produced ex situ phosphorus-doped ultra-thin-Si-on-oxide with a thickness of 4.5 nm by the beam-line ion implantation technique. High-resolution transmission electron microscopy has confirmed the thickness of the Si film on oxide. Transfer length method test structures are fabricated, and the temperature-dependent electrical characterization has revealed the effective dopant activation energy of the ion-implanted phosphorus dopant to be ≤ 13.5 meV, which is consistent with our theoretical predictions for comparable film thickness. Ultra-thin Si films are essential in the next generation of Si-based electronic devices, and this study paves the way toward achieving that technology.

Progressing miniaturization and the development of semiconductor integrated devices ask for advanced characterizations of the different device components with ever-increasing accuracy. Particularly in highly doped layers, a fine control of local conduction is essential to minimize access resistances and optimize integrated devices. For this, electrical Atomic Force Microscopy (AFM) are useful tools to examine the local properties at nanometric scale, for the fundamental understanding of the layer conductivity, process optimization during the device fabrication and reliability issues. By using Scanning Capacitance Microscopy (SCM) and Scanning Spreading Resistance Microscopy (SSRM), we investigate a highly in situ doped polycrystalline silicon layer, a material where the electrical transport properties are well known. This film is deposited on a oxide layer as a passivating contact. The study of the nano-MIS (SCM) and nano-Schottky (SSRM) contacts allows to determine the distribution and homogeneity of the carrier concentration (active dopants), especially by investigating the redistribution of the dopants after an annealing step used for their activation. While the chemical analysis by Secondary Ions Mass Spectroscopy (SIMS) quantifies only the dopant concentration in the polycrystalline layer, the comparison with macroscopic characterization techniques as Hall effect measurements, supported with XRD characterization, shows that careful SCM and SSRM measurements can be used to highlight the dopant activation. This analysis gives a complete investigation of the local electrical properties of the passivating contact when the parameters (applied voltages and applied forces) of the AFM nano-contacts are correctly controlled.

Due to the dramatic downscaling of device features in recent technology nodes, characterizing the electrical properties of these structures is becoming ever more challenging as it often requires metrology able to probe local variations in dopant and carrier concentration with high accuracy. As no existing technique is able to meet all requirements, a correlative metrology approach is generally considered a solution. In this article, we study size-dependent effects on the dopant activation in nanometer-wide Si fins using a novel correlative approach. We start by showing that the micro four-point probe technique can be used to precisely measure the resistance of B doped and (laser) annealed Si fins. Next, we use transmission electron microscopy and scanning spreading resistance microscopy to show that the observed width dependence of the apparent sheet resistance of these fins can be explained by either a partially or a fully inactive region forming along the top of the fin sidewalls according to the annealing conditions.

UV laser annealing (UV-LA) enables surface-localized high-temperature thermal processing to form abrupt junctions in emerging monolithically stacked devices, where applicable thermal budget is restricted. In this work, UV-LA is performed to regrow a SOI layer partially amorphized by arsenic ion implantation and to activate the dopants. In a microsecond scale (~10^-6 s to ~10^-5 s) UV-LA process, monocrystalline solid phase recrystallization and dopant activation without junction deepening is evidenced, thus opening various applications in low thermal budget integration flows., Comment: Accepted Paper for 20th International Workshop on Junction Technology (IWJT2021)

This chapter presents a review of the most relevant experimental results demonstrating the ability of nanosecond laser annealing to achieve dopant activation well above the solid solubility limit. Several distinctive materials science issues related to laser kinetics in the melt regime are reviewed, including melt temperature differences between amorphous and crystalline phases, melt front propagation, melt duration, recrystallization velocity, and solute trapping. Finally, the morphology, crystalline nature, and residual damage of Si, Ge, and SiGe materials submitted to nanosecond laser anneals in the melt regime are discussed according to the material fabrication history as well as the laser anneal conditions. Due to the richness and relevance of numerous seminal works published in the late 1970s–the early 1980s in this domain, the results reported in this chapter are mainly presented in the form of a historical review and perspective. In particular, the concepts of above-equilibrium solubility and thermal stability are first discussed in general for Si and Ge, while for both materials, the main results are structured in terms of Group III elements (p-type dopants) and Group V elements (n-type dopants). Group VI elements for n-type doping of Si are also considered.

Due to the ever-increasing shrinking of semiconductor technology nodes, phenomena such as parasitic and transient enhanced diffusion preclude the use of traditional annealing methods. To face these issues novel annealing techniques with steep temperature gradients are coming into the forefront of semiconductor processing. One of these is laser annealing which presents a series of attractive characteristics such as high power density, localized heating as well as the ability to tune the effective heating depth. This chapter presents basic aspects of laser-matter interaction from the point of view of the main group IV semiconductors, silicon and germanium, and deals with the radiation absorption mechanisms and processes using deep infrared wavelengths as a use case of particular industrial relevance. The effect of heavy extrinsic doping, typical in semiconductor processing, on absorption coefficient is also analyzed. The predominant effect of the interaction between semiconductor and laser radiation is the heating of the former and as such heating mechanisms and heat diffusion are then discussed. The generalized heat equation for a time-modulated beam as well as key parameters for silicon and germanium are also presented. Finally this chapter discusses diffusion and activation kinetics while dealing with the differences between different wavelengths (infrared to ultraviolet) and timescales (ms–ns). Indicative simulation results are also presented and compared to actual experimental data that exhibit minimal diffusion with high degrees of dopant activation close to the maximum theoretical solid solubility limits.

For the first time, ultrafast laser annealed BEOL gate-all-around (GAA) transistor and FeFET memory were demonstrated with monolithic 3D near-memory-computing (NMC) circuit. The GAA MOSFETs employing ultrafast picosecond visible laser dopant activation exhibit record-high Ion (nFETs=407 uA/um, pFETs=345 uA/um). The BEOL FeFETs memory exhibits large memory window ΔV th = 1.2V, more than 106 cycle endurance. Moreover, the 3D stackability of the GAA MOSFETs and FeFET memory bit cell enable reduces the area of the NMC circuitry and improve the readout throughput.

An impurity doping in semiconductors is an important irreversible process of manipulating the electrical properties of advanced electron devices. Here, we report an unusual reversible dopant activation/deactivation phenomenon, which emerges at an interface between indium tin oxide (ITO) and single-crystalline oxide channel. We found that the interface electrical resistance between ITO electrodes and single-crystalline oxide nanowire channel can be repeatedly switched between a metallic state and a near-insulative state by applying thermal treatments in air or vacuum. Interestingly, this electrical switching phenomenon disappears when the oxide nanowire changes from the single-crystalline structure to the lithography-defined polycrystalline structure. Atmosphere-controlled annealing experiments reveal that atmospheric oxygen induces repeatable change in the interfacial electrical resistance. Systematic investigations on metal cation species and channel crystallinity demonstrate that the observed electrical switching is related to an interface-specific reversible Sn-dopant activation/deactivation of ITO electrode in contact with a single-crystalline oxide channel.

Raising the Curie temperature ${T}_{\mathrm{C}}$ of the highly spin-polarized semiconductor EuO by doping it with rare-earth elements is a strategy to make EuO more technologically relevant to spintronics. The increase of ${T}_{\mathrm{C}}$ with free carrier density $n$ and the surprisingly low dopant activation $p$, found in Gd-doped EuO thin films [Mairoser et al., Phys. Rev. Lett. 105, 257206 (2010)], raised the important question of whether ${T}_{\mathrm{C}}$ could be considerably enhanced by increasing $p$. Using a low-temperature growth method for depositing high-quality Lu-doped EuO films we attain high dopant activation ($p$) values of up to 67%, effectively more than doubling $p$ as compared to adsorption-controlled growth of Lu- and Gd-doped EuO. Relating $n, p$, and lattice compression of La- and Lu-doped EuO films grown at different temperatures to the ${T}_{\mathrm{C}}$ of these samples allows us to identify several different mechanisms influencing ${T}_{\mathrm{C}}$ and causing an experimental maximum in ${T}_{\mathrm{C}}$. In addition, scanning transmission electron microscopy in combination with electron energy loss spectroscopy measurements on La-doped EuO indicate that extensive dopant clustering is one, but not the sole reason for dopant deactivation in rare-earth doped EuO films.

One option in enhancing metal-oxide-semiconductor transistor devices is by replacing silicon with high-mobility material of germanium. However, fabrication of Ge np junction faces low dopant activation problem due to the interaction between dopant and defect that was originated from ion implantation, during thermal annealing process results in dopant deactivation. Eventually, series resistance of np junction between source and drain regions will increase and affect the device drive current. Therefore, minimizing junction resistance remains an important issue to be solved. In this work, ultrafast/high temperature excimer laser of KrF was adopted for post-implantation annealing process in order to achieve high activation level. Laser energy fluences and shot numbers were varied between 100–2000 mJ/cm2 and 1–1000 shots, respectively to investigate the influence of laser parameter to the np junction resistance value, surface morphology and recrystallization. It is found that resistance lower than 300 Ω can be obtained when annealing the substrate between 500–1000 mJ/cm2 with shot number up to two. Taking into consideration on the morphological and structural analyses leads to the conclusion that an optimum parameter for LTA in the sample implanted with phosphorus at higher energy/dose concentration of 40 keV/6.0×1014 cm−2 is 700 mJ/cm2, with shot number of two.

We report in this paper on the development of thin passivating poly-crystalline Silicon (poly-Si) on silicon oxide (SiO x ) stacks, with poly-Si films deposited by Low Pressure Chemical Vapor Deposition (LPCVD) and doped by Plasma Immersion Ion Implantation (PIII). Such advanced passivating contacts can be integrated, in combination with In-free TCO layers, at both the front and rear sides of high efficiency solar cells via simple fabrication processes. High iV oc values close to 700 mV were obtained just after the annealing step required for the poly-Si crystallization and dopant activation. The first cell integration demonstrated photovoltaic (PV) conversion efficiencies of 21.2% for this approach. Moreover, we demonstrated that the poly-Si layers elaboration process provides efficient external gettering effects on cast-mono wafers, with bulk carrier lifetime exceeding 3 ms after the poly-Si (n+)/SiO x stack formation. These results are therefore encouraging for the use of low cost, low carbon footprint Si materials, in double-side passivated contacts high efficiency cell structures.

In-situ doping of CdTe/CdSeTe films with arsenic is performed using pre-doped source material prepared by high pressure Bridgman (HPB) melt growth. Arsenic level in the source material is varied from 1018-1020 cm−3. Correspondingly, dopant incorporation in the films prepared using vapor transport deposition (VTD) varied from 3×1017 cm−3-1×1018cm−3. In this range, dopant activation is found to inversely correlate with the dopant incorporation, suggesting compensation. The results from this study indicate film properties can be adjusted by source material.

Top tier devices in a 3D sequential integration are optimized using a low temperature process flow $( . Bi-axial tensile strained silicon is transferred without strain relaxation to boost the top tier nmos device performance by 40-50% over the unstrained silicon devices, recovering the performance loss from the low temperature processing when using extension-less device integration. Excimer laser anneal is also shown to effectively activate both n-type and p-type dopants in the extension of thin silicon film devices using optimized, CMOS compatible, laser exposure conditions. Laser anneal is fully compatible with a replacement metal gate (RMG) process flow and with selective source/drain (SD) epitaxy. The dopant activation level is preserved during the entire process flow which results in similar $\mathrm{I}_{\mathrm{on}}-\mathrm{I}_{\mathrm{off}}$ device performance for devices with laser and spike anneals. Excimer laser anneal benefits also from improved control short channel effects over spike annealing due to low dopant diffusion.

Positron annihilation spectroscopy in the Doppler and coincidence Doppler mode was applied on Ge 1 − xSn x epitaxial layers, grown by chemical vapor deposition with different total As concentrations ( ∼ 10 19– 10 21 cm − 3), high active As concentrations ( ∼ 10 19 cm − 3), and similar Sn concentrations (5.9%–6.4%). Positron traps are identified as mono-vacancy complexes. Vacancy-As complexes, V-As i, formed during the growth were studied to deepen the understanding of the electrical passivation of the Ge 1 − xSn x:As epilayers. Larger mono-vacancy complexes, V-As i ( i ≥ 2), are formed as the As doping increases. The total As concentration shows a significant impact on the saturation of the number of As atoms ( i = 4) around the vacancies in the sample epilayers. The presence of V-As i complexes decreases the dopant activation in the Ge 1 − xSn x:As epilayers. Furthermore, the presence of Sn failed to hinder the formation of larger V-As i complexes and thus failed to reduce the donor-deactivation.

We apply a stochastic version of an optimally tuned range-separated hybrid functional to provide insight on the electronic properties of P- and B- doped Si nanocrystals of experimentally relevant sizes. We show that we can use the range-separation parameter for undoped systems to calculate accurate results for dopant activation energies. We apply this strategy for tuning functionals to study doped nanocrystals up to 2.5 nm in diameter at the hybrid functional level. In this confinement regime, the P- and B- dopants have large activation energies and have strongly localized states that lie deep within the energy gaps. Structural relaxation plays a greater role for B-substituted dopants and contributes to the increase in activation energy when the B dopant is near the nanocrystal surface.

Ge/Si core-shell nanowires (NWs) have huge potential for the realization of high mobility channels in NW field-effect transistors. Thermal annealing is a crucial process for optimizing electrical properties in many applications because it affects the NWs' morphology, crystallinity, dopant activation, and interface intermixing. In this study, we investigated the structural transformation of core-shell NWs at the interface and their thermal stability. The intermixing of Ge and Si atoms at the interface closely depends on, and is enhanced by, the temperature and pressure during annealing, while no intermixing occurred at pressures lower than 6 × 10-6 Pa.

This work describes the development of a new method for ion implantation induced crystal damage recovery using multiple XeCl (308 nm) laser pulses with a duration of 30 ns. Experimental activity was carried on single phosphorus (P) as well as double phosphorus and aluminum (Al) implanted 4H-SiC epitaxial layers. Samples were then characterized through micro-Raman spectroscopy, Photoluminescence (PL) and Transmission Electron Microscopy (TEM) and results were compared with those coming from P implanted thermally annealed samples at 1650&ndash, 1700&ndash, 1750 &deg, C for 1 h as well as P and Al implanted samples annealed at 1650 &deg, C for 30 min. The activity outcome shows that laser annealing allows to achieve full crystal recovery in the energy density range between 0.50 and 0.60 J/cm2. Moreover, laser treated crystal shows an almost stress-free lattice with respect to thermally annealed samples that are characterized by high point and extended defects concentration. Laser annealing process, instead, allows to strongly reduce carbon vacancy (VC) concentration in the implanted area and to avoid intra-bandgap carrier recombination centres. Implanted area was almost preserved, except for some surface oxidation processes due to oxygen leakage inside the testing chamber. However, the results of this experimental activity gives way to laser annealing process viability for damage recovery and dopant activation inside the implanted area.

Distinct from conventional diaphragm-type pressure sensors, a silicon-based bulk-type high pressure sensor has been analyzed, realized, and characterized. External hydrostatic pressure acting on the sensor is converted to a biaxial compression inside an all-silicon encapsulated vacuum cavity. The stress anisotropy is analytically modeled and numerically simulated. The biaxial compression is measured using two pairs of piezoresistors oriented to optimally utilize the anisotropy of silicon piezoresistance. An improved pressure seal in the test-package allowed extended testing of the sensor up to a pressure of 200 MPa and a temperature of 175 °C. Reported also is a zero-offset of the sensor, largely attributed to the tensile stress induced by the insulating cover oxide after cooling from the high-temperature dopant activation anneal. [2017-0253]

A Ge0.955Sn0.045 nMOSFET with a record high mobility of 440 cm2/V $\cdot $ s is demonstrated in this letter by a gate-first process. By low-temperature chemical vapor deposition, high-quality GeSn films were epitaxially grown. The ambipolar leakage is effectively suppressed by the low-thermal-budget microwave annealing (MWA) step. Furthermore, the peak mobility in the device after the MWA step is enhanced by a factor of two compared with those after rapid thermal annealing. This can be attributed to the weaker Coulomb scattering at the oxide interface after the MWA step, suggesting that MWA is effective for dopant activation and a better oxide interface quality at the same time.

The currently dominant thermoelectric (TE) materials used in low to medium temperature range contain Tellurium that is rare and mild-toxic. Silicon is earth abundant and environment friendly, but it is characterized by a poor TE efficiency with a low figure of merit, ZT . In this work, we report that ZT of amorphous silicon (a-Si) thin films can be enhanced by 7 orders of magnitude, reaching ∼0.64 ± 0.13 at room temperature, by means of arsenic ion implantation followed by low-temperature dopant activation. The dopant introduction employed represents a highly controllable doping technique used in standard silicon technology. It is found that the significant enhancement of ZT achieved is primarily due to a significant improvement of electrical conductivity by doping without crystallization so as to maintain the thermal conductivity and Seebeck coefficient at the level determined by the amorphous state of the silicon films. Our results open up a new route towards enabling a-Si as a prominent TE material for cost-efficient and environment-friendly TE applications at room temperature.

Numerous researches for making steep tunnel junction within tunnel field-effect transistor (TFET) have been conducted. One of the ways to make an abrupt junction is source/drain silicidation, which uses the phenomenon often called silicide-induced-dopant-segregation. It is revealed that the silicide process not only helps dopants to pile up adjacent to the metal-silicon alloy, also induces the dopant activation, thereby making it possible to avoid additional high temperature process. In this report, the availability of dopant activation induced by metal silicide process was thoroughly investigated by diode measurement and device simulation. Metal-silicon (MS) diodes having p+ and n+ silicon formed on the p- substrate exhibit the characteristics of ohmic and pn diodes respectively, for both the samples with and without high temperature annealing. The device simulation for TFETs with dopant-segregated source was also conducted, which verified enhanced DC performance.

The response of silicon-based microelectromechanical systems resonators to proton irradiation is determined by the combined effects of displacement damage and total ionizing dose (TID). Displacement damage (DD) can lead to carrier removal, which tends to decrease the carrier concentration, and TID leads to dopant activation and/or surface charging effects, which tend to increase the carrier concentration. These competing effects lead to changes in carrier concentration that alter Young’s modulus, and consequently the resonance frequency. For higher flux 2-MeV proton irradiation to 1014/cm2, TID effects dominate at low fluence, leading to a decrease in resonance frequency, which is offset by displacement damage effects at higher fluence. Fast recovery is observed as TID effects anneal out and DD effects remain. For lower-flux 0.8-MeV proton irradiation to $7 \times 10^{12}$ /cm2, DD effects are relatively more significant than for 2-MeV proton irradiation, and an increase in resonance frequency is observed at all fluences. Stopping and range of ions in matter calculations reinforce these conclusions.

A method to reduce the thermal conductivity in Si thin-films by at least an order of magnitude is shown, successfully demonstrating the up-scaling of this technique from Si nano-films. High energy self implantation of Si is used to create a supersaturation of lattice vacancy concentrations that remain following post implant rapid thermal annealing producing a disruption in phonon mode thermal transport. This method demonstrates an approach for micro-harvesting thermoelectric device applications without the difficulties faced for dimensional up-scaling in alternative Si thermoelectric approaches. Challenges surrounding the thermal budget required for post implant dopant activation in p-type Si are also shown.

Nanosecond ultra-violet (UV) laser annealing was introduced to overcome the thermal degradation of the bottom layer device during top layer device junction formation in monolithic 3D integration. A simulation was performed to predict the thermal effects and the temperature distribution of the top and bottom layers during laser annealing. The dopant distribution, surface morphology, and crystallinity were characterized after laser annealing. The electrical properties were identified from the sheet resistance and current-voltage characteristics. A single crystal silicon phase was observed after applying top-hat shaped single pulse UV laser with the optimal fluence of 1.4 J/cm2. With a much lower thermal budget, the laser-annealed junction achieved an abrupt doping profile and low sheet resistance and low leakage current that were comparable to rapid thermal annealing or solid-phase epitaxial regrowth.

Integrating III-V semiconductors into next-generation silicon-based transistors is a promising alternative being considered as a route to faster and more energy-efficient electronic devices. These III-V materials will be doped, typically with Si as a dopant. However, dopant activation remains an issue, compounded by the fact there is still insufficient knowledge of the ease and preferred mechanistic pathways by which dopants, like Si, become activated within the III-V matrix. Using Density Functional Theory calculations, we have determined many of these critically important properties, namely, the energy barriers associated with the diffusion of both intrinsic point defects and silicon impurities in a prototypical ternary III-V material, here a CuAuI-ordered In0.5Ga0.5As. Refuting assumptions in the current literature, vacancy-assisted diffusion was found to be an unfavorable mechanism for this ordered ternary alloy, unlike in GaAs. Hence, substitutional Si atoms are essentially immobile on experimental timescales. While vacancies are nearly immobile, interstitials, especially split interstitials, can move easily within the crystal lattice. These defects become significant at high Si concentration leading to the unexpected phenomenon of enhanced diffusion of Si at high concentrations, which explains experimental observations.

First-principles calculations are used to systematically investigate the impact of surface effects on the energetic cost to incorporate point defects near the growing surface [Ge(001)] and its consequence on the dopant activation in P-doped Ge layers. We illustrate the formation enthalpy Delta H-f for the incorporation of a mono-vacancy, which is the dominant point defect responsible for the electrically inactive dopant incorporation in P-doped Ge. The calculated values point toward a significant lowering of Delta H-f near the growing surface in comparison to the bulk cubic Ge supercell. The impact of the surface almost vanishes beyond the sixth atomic monolayer located below the surface and the calculated Delta H-f values overlap with the ones computed for a bulk cubic Ge supercell. For epitaxial Ge:P layers, grown at low growth temperatures (