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This study investigates the properties of a onetransistor- one-capacitor (1T1C) device that includes a transistor and ferroelectric random access memory (FeRAM) at the nanoscale. The hysteresis characteristics are presented. A simultaneous measurement of writing and reading was used. A difference was observed between the forward and reverse transconductance (gm) −VG curves, and the reason can be explained by the relationship between the operating voltage and coercive voltages. According to the relationship between gm and polarization, the polarization signal can be obtained using gm at the nano-scale. The remnant polarization of the 1T1C device per unit ferroelectric-layer area was confirmed by the polarization value of FeRAM via the Positive Up Negative Down method. Finally, the P–V loops obtained using gm values with different measurement ranges are also reported. [ABSTRACT FROM AUTHOR]

In this study, abnormal on-current (Ion) degradation in n-type lateral double-diffused metal-oxide-semiconductor transistor (LDMOS) after non-conductive stress (NCS) is investigated. The degradation is caused by electron injection into the insulator layer (IL) during stress. Moreover, Ion degradation reaches saturation within a short time after stress. Experimental data and technology computer aided design (TACD) simulations show that, after NCS, the contact field plate (CFP) induces carriers to inject into the IL above the drift region. It increases the overall on-resistance (Ron) and results in Ion degradation during turn-on. [ABSTRACT FROM AUTHOR]

In this study, a one transistor one resistor (1T1R) structure combining a fin‐like low‐temperature polycrystalline‐silicon (LTPS) transistor and a resistive random access memory (RRAM) is successfully fabricated. For the fin‐like LTPS transistor, both n‐type and p‐types show excellent electrical output characteristics. Fin‐like structure produces more stable output characteristics. Also, the forming and current–voltage (I–V) characteristics are measured in this study, and the RRAM exhibits a forming voltage of about −1.9 V. As for the I–V switching property, the devices are stable and show excellent performance, with the set and reset voltages showing only minimal change over 100 cycles. Moreover, combining the fin‐like LTPS transistor and RRAM into a 1T1R structure results in favorable operation over 100 cycles, with excellent retention and endurance. According to these results, RRAM can be successfully combined with a fin‐like LTPS transistor for application in current integrated circuit processes without difficulty. [ABSTRACT FROM AUTHOR]

This article explains the difference in the reset processes between single RRAM and 1T1R RRAM structures. In the single RRAM, as the reset voltage increases, the off-state resistance increases. This is a normal RRAM operation. However, in the 1T1R structure, the reset voltage increases while the OFF-state resistance does not increase. This may be caused by either current or voltage being insufficient to switch the RRAM to its higher resistance state. The measurements of real voltage indicate that the insufficient voltage is in fact the main cause. For the 1T1R RRAM structure, if it is to be reset to a higher resistance state, it is best done by increasing the gate voltage to increase the OFF-state resistance. Therefore, we provide a method to reduce the misjudgment in the array, and it would be beneficial for the development of high-density memory. [ABSTRACT FROM AUTHOR]