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In this study, the influence of the thickness of the channel layer on the electrical properties and stability of tungsten-doped indium oxide (IWO) thin-film transistors (TFTs) was investigated. Although oxide-semiconductor TFTs, particularly indium gallium zinc oxide, are promising, problems related to oxygen vacancies have led to their instability. In contrast, IWO has proven to be a compelling alternative because of its robust resistance to oxygen vacancies. IWO TFTs with varying channel thicknesses (10, 20, and 30 nm) were fabricated, and the device parameters, such as threshold voltage (Vth), subthreshold swing (SS), field-effect mobility (μFE), and on/off current ratio (Ion/Ioff), were analyzed. It was found that as the channel thickness increased, Vth exhibited a negative shift and SS increased, indicating an increase in carrier concentration. This phenomenon is attributed to the bulk trap density, in particular to oxygen vacancies. Negative bias stress tests confirmed the influence of the oxygen vacancies, with thicker channels showing more pronounced shifts. Low-frequency noise measurements were consistent with the carrier number fluctuation model, indicating that defects within the channel region contribute to the observed noise. The study concludes that identifying an optimal channel thickness during device manufacturing is crucial for improved TFT performance, with 20 nm devices characterized by high μFE and comparable trap density to 10 nm. This study provides valuable insight into the nuanced relationship between the channel thickness, trap density, and electrical performance of IWO TFTs. [ABSTRACT FROM AUTHOR]

Electrical double-layer (EDL) synaptic transistors based on organic materials exhibit low thermal and chemical stability and are thus incompatible with complementary metal oxide semiconductor (CMOS) processes involving high-temperature operations. This paper proposes organic–inorganic hybrid synaptic transistors using methyl silsesquioxane (MSQ) as the electrolyte. MSQ, derived from the combination of inorganic silsesquioxanes and the organic methyl (−CH3) group, exhibits exceptional thermal and chemical stability, thus ensuring compatibility with CMOS processes. We fabricated Al/MSQ electrolyte/Pt capacitors, exhibiting a substantial capacitance of 1.89 µF/cm2 at 10 Hz. MSQ-based EDL synaptic transistors demonstrated various synaptic behaviors, such as excitatory post-synaptic current, paired-pulse facilitation, signal pass filtering, and spike-number-dependent plasticity. Additionally, we validated synaptic functions such as information storage and synapse weight adjustment, simulating brain synaptic operations through potentiation and depression. Notably, these synaptic operations demonstrated stability over five continuous operation cycles. Lastly, we trained a multi-layer artificial deep neural network (DNN) using a handwritten Modified National Institute of Standards and Technology image dataset. The DNN achieved an impressive recognition rate of 92.28%. The prepared MSQ-based EDL synaptic transistors, with excellent thermal/chemical stability, synaptic functionality, and compatibility with CMOS processes, harbor tremendous potential as materials for next-generation artificial synapse components. [ABSTRACT FROM AUTHOR]

The primary objective of neuromorphic electronic devices is the implementation of neural networks that replicate the memory and learning functions of biological synapses. To exploit the advantages of electrolyte gate synaptic transistors operating like biological synapses, we engineered electric double-layer transistors (EDLTs) using phosphorus-doped silicate glass (PSG). To investigate the effects of phosphorus on the EDL and synaptic behavior, undoped silicate spin-on-glass-based transistors were fabricated as a control group. Initially, we measured the frequency-dependent capacitance and double-sweep transfer curves for the metal-oxide-semiconductor (MOS) capacitors and MOS field-effect transistors. Subsequently, we analyzed the excitatory post-synaptic currents (EPSCs), including pre-synaptic single spikes, double spikes, and frequency variations. The capacitance and hysteresis window characteristics of the PSG for synaptic operations were verified. To assess the specific synaptic operational characteristics of PSG-EDLTs, we examined EPSCs based on the spike number and established synaptic weights in potentiation and depression (P/D) in relation to pre-synaptic variables. Normalizing the P/D results, we extracted the parameter values for the nonlinearity factor, asymmetric ratio, and dynamic range based on the pre-synaptic variables, revealing the trade-off relationships among them. Finally, based on artificial neural network simulations, we verified the high-recognition rate of PSG-EDLTs for handwritten digits. These results suggest that phosphorus-based EDLTs are beneficial for implementing high-performance artificial synaptic hardware. [ABSTRACT FROM AUTHOR]

In this study, a transparent and flexible synaptic transistor was fabricated based on a random-network nanowire (NW) channel made of indium gallium zinc oxide. This device employs a biocompatible chitosan-based hydrogel as an electrolytic gate dielectric. The NW structure, with its high surface-to-volume ratio, facilitated a more effective modulation of the channel conductance induced by protonic-ion polarization. A comparative analysis of the synaptic properties of NW- and film-type devices revealed the distinctive features of the NW-type configuration. In particular, the NW-type synaptic transistors exhibited a significantly larger hysteresis window under identical gate-bias conditions. Notably, these transistors demonstrated enhanced paired-pulse facilitation properties, synaptic weight modulation, and transition from short- to long-term memory. The NW-type devices displayed gradual potentiation and depression of the channel conductance and thus achieved a broader dynamic range, improved linearity, and reduced power consumption compared with their film-type counterparts. Remarkably, the NW-type synaptic transistors exhibited impressive recognition accuracy outcomes in Modified National Institute of Standards and Technology pattern-recognition simulations. This characteristic enhances the efficiency of practical artificial intelligence (AI) processes. Consequently, the proposed NW-type synaptic transistor is expected to emerge as a superior candidate for use in high-efficiency artificial neural network systems, thus making it a promising technology for next-generation AI semiconductor applications. [ABSTRACT FROM AUTHOR]

In this study, optoelectronic synaptic transistors based on indium–gallium–zinc oxide (IGZO) with a casein electrolyte-based electric double layer (EDL) were examined. The casein electrolyte played a crucial role in modulating synaptic plasticity through an internal proton-induced EDL effect. Thus, important synaptic behaviors, such as excitatory post-synaptic current, paired-pulse facilitation, and spike rate-dependent and spike number-dependent plasticity, were successfully implemented by utilizing the persistent photoconductivity effect of the IGZO channel stimulated by light. The synergy between the light stimulation and the EDL effect allowed the effective modulation of synaptic plasticity, enabling the control of memory levels, including the conversion of short-term memory to long-term memory. Furthermore, a Modified National Institute of Standards and Technology digit recognition simulation was performed using a three-layer artificial neural network model, achieving a high recognition rate of 90.5%. These results demonstrated a high application potential of the proposed optoelectronic synaptic transistors in neuromorphic visual systems. [ABSTRACT FROM AUTHOR]

This study aimed to propose a silicon-on-insulator (SOI)-based charge-trapping synaptic transistor with engineered tunnel barriers using high-k dielectrics for artificial synapse electronics capable of operating at high temperatures. The transistor employed sequential electron trapping and de-trapping in the charge storage medium, facilitating gradual modulation of the silicon channel conductance. The engineered tunnel barrier structure (SiO2/Si3N4/SiO2), coupled with the high-k charge-trapping layer of HfO2 and high-k blocking layer of Al2O3, enabled reliable long-term potentiation/depression behaviors within a short gate stimulus time (100 μs), even under elevated temperatures (75 and 125 °C). Conductance variability was determined by the number of gate stimuli reflected in the maximum excitatory postsynaptic current (EPSC) and the residual EPSC ratio. Moreover, we analyzed the Arrhenius relationship between the EPSC as a function of the gate pulse number (N = 1–100) and the measured temperatures (25, 75, and 125 °C), allowing us to deduce the charge trap activation energy. A learning simulation was performed to assess the pattern recognition capabilities of the neuromorphic computing system using the modified National Institute of Standards and Technology datasheets. This study demonstrates high-reliability silicon channel conductance modulation and proposes in-memory computing capabilities for artificial neural networks using SOI-based charge-trapping synaptic transistors. [ABSTRACT FROM AUTHOR]

In this study, we enhance the synaptic behavior of artificial synaptic transistors by utilizing nanowire (NW)-type polysilicon channel structures. The high surface-to-volume ratio of the NW channels enables efficient modulation of the channel conductance, which is interpreted as the synaptic weight. As a result, NW-type synaptic transistors exhibit a larger hysteresis window compared to film-type synaptic transistors, even within the same gate voltage sweeping range. Moreover, NW-type synaptic transistors demonstrate superior short-term facilitation and long-term memory transition compared with film-type ones, as evidenced by the measured paired-pulse facilitation and excitatory post-synaptic current characteristics at varying frequencies and pulse numbers. Additionally, we observed gradual potentiation/depression characteristics, making these artificial synapses applicable to artificial neural networks. Furthermore, the NW-type synaptic transistors exhibit improved Modified National Institute of Standards and Technology pattern recognition rate of 91.2%. In conclusion, NW structure channels are expected to be a promising technology for next-generation artificial intelligence (AI) semiconductors, and the integration of NW structure channels has significant potential to advance AI semiconductor technology. [ABSTRACT FROM AUTHOR]

The potassium (K+) ion is an essential mineral for balancing body fluids and electrolytes in biological systems and regulating bodily function. It is associated with various disorders. Given that it exists at a low concentration in the human body and should be maintained at a precisely stable level, the development of highly efficient potassium-selective sensors is attracting considerable interest in the healthcare field. Herein, we developed a high-performance, potassium-selective field-effect transistor-type biosensor platform based on an amorphous indium gallium zinc oxide coplanar-gate thin-film transistor using a resistive coupling effect with an extended gate containing a potassium-selective membrane. The proposed sensor can detect potassium in KCl solutions with a high sensitivity of 51.9 mV/dec while showing a low sensitivity of <6.6 mV/dec for NaCl, CaCl2, and pH buffer solutions, indicating its high selectivity to potassium. Self-amplification through the resistive-coupling effect enabled an even greater potassium sensitivity of 597.1 mV/dec. Additionally, we ensured the stability and reliability of short- and long-term detection through the assessment of non-ideal behaviors, including hysteresis and drift effects. Therefore, the proposed potassium-sensitive biosensor platform is applicable to high-performance detection in a living body, with high sensitivity and selectivity for potassium. [ABSTRACT FROM AUTHOR]

This study proposed a biocompatible polymeric organic material-based synaptic transistor gated with a biopolymer electrolyte. A polyvinyl alcohol (PVA):chitosan (CS) biopolymer blended electrolyte with high ionic conductivity was used as an electrical double layer (EDL). It served as a gate insulator with a key function as an artificial synaptic transistor. The frequency-dependent capacitance characteristics of PVA:CS-based biopolymer EDL were evaluated using an EDL capacitor (Al/PVA: CS blended electrolyte-based EDL/Pt configuration). Consequently, the PVA:CS blended electrolyte behaved as an EDL owing to high capacitance (1.53 µF/cm2) at 100 Hz and internal mobile protonic ions. Electronic synaptic transistors fabricated using the PVA:CS blended electrolyte-based EDL membrane demonstrated basic artificial synaptic behaviors such as excitatory post-synaptic current modulation, paired-pulse facilitation, and dynamic signal-filtering functions by pre-synaptic spikes. In addition, the spike-timing-dependent plasticity was evaluated using synaptic spikes. The synaptic weight modulation was stable during repetitive spike cycles for potentiation and depression. Pattern recognition was conducted through a learning simulation for artificial neural networks (ANNs) using Modified National Institute of Standards and Technology datasheets to examine the neuromorphic computing system capability (high recognition rate of 92%). Therefore, the proposed synaptic transistor is suitable for ANNs and shows potential for biological and eco-friendly neuromorphic systems. [ABSTRACT FROM AUTHOR]

In this paper, we propose a fully transparent and flexible high-performance pH sensor based on an amorphous indium gallium zinc oxide (a-IGZO) thin-film transistor (TFT) transducer with a coplanar dual-gate structure on polyimide substrates. The proposed pH sensor system features a transducer unit consisting of a floating gate (FG), sensing gate (SG), and control gate (CG) on a polyimide (PI), and an extended gate (EG) sensing unit on a separate glass substrate. We designed a capacitive coupling between (SG) and (CG) through the FG of an a-IGZO TFT transducer to contribute to sensitivity amplification. The capacitance ratio (CSG/CCG) increases linearly with the area ratio; therefore, the amplification ratio of the pH sensitivity was easily controlled using the area ratio of SG/CG. The proposed sensor system improved the pH sensitivity by up to 359.28 mV/pH (CSG/CCG = 6.16) at room temperature (300 K), which is significantly larger than the Nernstian limit of 59.14 mV/pH. In addition, the non-ideal behavior, including hysteresis and drift effects, was evaluated to ensure stability and reliability. The amplification of sensitivity based on capacitive coupling was much higher than the increase in the hysteresis voltage and drift rate. Furthermore, we verified the flexibility of the a-IGZO coplanar dual-gate TFT transducer through a bending test, and the electrical properties were maintained without mechanical damage, even after repeated bending. Therefore, the proposed fully transparent and highly sensitive a-IGZO coplanar dual-gate TFT-based pH sensor could be a promising wearable and portable high-performance chemical sensor platform. [ABSTRACT FROM AUTHOR]

In this study, we propose the use of artificial synaptic transistors with coplanar-gate structures fabricated on paper substrates comprising biocompatible and low-cost potato-starch electrolyte and indium–gallium–zinc oxide (IGZO) channels. The electrical double layer (EDL) gating effect of potato-starch electrolytes enabled the emulation of biological synaptic plasticity. Frequency dependence measurements of capacitance using a metal-insulator-metal capacitor configuration showed a 1.27 μF/cm2 at a frequency of 10 Hz. Therefore, strong capacitive coupling was confirmed within the potato-starch electrolyte/IGZO channel interface owing to EDL formation because of internal proton migration. An electrical characteristics evaluation of the potato-starch EDL transistors through transfer and output curve resulted in counterclockwise hysteresis caused by proton migration in the electrolyte; the hysteresis window linearly increased with maximum gate voltage. A synaptic functionality evaluation with single-spike excitatory post-synaptic current (EPSC), paired-pulse facilitation (PPF), and multi-spike EPSC resulted in mimicking short-term synaptic plasticity and signal transmission in the biological neural network. Further, channel conductance modulation by repetitive presynaptic stimuli, comprising potentiation and depression pulses, enabled stable modulation of synaptic weights, thereby validating the long-term plasticity. Finally, recognition simulations on the Modified National Institute of Standards and Technology (MNIST) handwritten digit database yielded a 92% recognition rate, thereby demonstrating the applicability of the proposed synaptic device to the neuromorphic system. [ABSTRACT FROM AUTHOR]

In this study, we propose tunable pH sensors based on the electric-double-layer transistor (EDLT) with time-dependent sensitivity characteristics. The EDLT is able to modulate the drain current by using the mobile ions inside the electrolytic gate dielectric. This property allows the implementation of a device with sensitivity characteristics that are simply adjusted according to the measurement time. An extended gate-type, ion-sensitive, field-effect transistor consisting of a chitosan/Ta2O5 hybrid dielectric EDLT transducer, and an SnO2 sensing membrane, were fabricated to evaluate the sensing behavior at different buffer pH levels. As a result, we were able to achieve tunable sensitivity by only adjusting the measurement time by using a single EDLT and without additional gate electrodes. In addition, to demonstrate the unique sensing behavior of the time-dependent tunable pH sensors based on organic–inorganic hybrid EDLT, comparative sensors consisting of a normal FET with a SiO2 gate dielectric were prepared. It was found that the proposed pH sensors exhibit repeatable and stable sensing operations with drain current deviations <1%. Therefore, pH sensors using a chitosan electrolytic EDLT are suitable for biosensor platforms, possessing tunable sensitivity and high-reliability characteristics. [ABSTRACT FROM AUTHOR]

We propose an ambipolar chitosan synaptic transistor that effectively responds to binary neuroplasticity. We fabricated the synaptic transistors by applying a chitosan electric double layer (EDL) to the gate insulator of the excimer laser annealed polycrystalline silicon (poly-Si) thin-film transistor (TFT) with Ni-silicide (NiSi) Schottky-barrier source/drain (S/D) junction. The undoped poly-Si channel and the NiSi S/D contact allowed conduction by electrons and holes, resulting in artificial synaptic behavior in both p-type and n-type regions. A slow polarization reaction by the mobile ions such as anions (CH3COO− and OH−) and cations (H+) in the chitosan EDL induced hysteresis window in the transfer characteristics of the ambipolar TFTs. We demonstrated the excitatory post-synaptic current modulations and stable conductance modulation through repetitive potentiation and depression pulse. We expect the proposed ambipolar chitosan synaptic transistor that responds effectively to both positive and negative stimulation signals to provide more complex information process versatility for bio-inspired neuromorphic computing systems. [ABSTRACT FROM AUTHOR]

In this study, we proposed a synaptic transistor using an emerging biocompatible organic material, namely, the casein electrolyte as an electric-double-layer (EDL) in the transistor. The frequency-dependent capacitance of the indium-tin-oxide (ITO)/casein electrolyte-based EDL/ITO capacitor was assessed. As a result, the casein electrolyte was identified to exhibit a large capacitance of ~1.74 μF/cm2 at 10 Hz and operate as an EDL owing to the internal proton charge. Subsequently, the implementation of synaptic functions was verified by fabricating the synaptic transistors using biocompatible casein electrolyte-based EDL. The excitatory post-synaptic current, paired-pulse facilitation, and signal-filtering functions of the transistors demonstrated significant synaptic behavior. Additionally, the spike-timing-dependent plasticity was emulated by applying the pre- and post-synaptic spikes to the gate and drain, respectively. Furthermore, the potentiation and depression characteristics modulating the synaptic weight operated stably in repeated cycle tests. Finally, the learning simulation was conducted using the Modified National Institute of Standards and Technology datasets to verify the neuromorphic computing capability; the results indicate a high recognition rate of 90%. Therefore, our results indicate that the casein electrolyte is a promising new EDL material that implements artificial synapses for building environmental and biologically friendly neuromorphic systems. [ABSTRACT FROM AUTHOR]

With the growing demand for bio- and eco-friendly artificial synapses, we propose a novel synaptic transistor using natural bovine-milk-based biocompatible polymers as an electrical double layer (EDL). A method for forming an EDL membrane, which plays a key role in synaptic devices, was established using a milk-based biocompatible polymer. The frequency-dependent capacitance of a milk-based polymer-EDL was evaluated by constructing an EDL capacitor (EDLC) with indium-tin-oxide (ITO) electrode. As a result, a significantly large capacitance (1.48 μF/cm2 at 1 Hz) was identified as an EDL effect due to the proton charge of the bovine-milk-based polymer, which is much more superior compared to conventional insulating materials such as SiO2. Subsequently, by using a milk-based polymer-EDL membrane in the fabrication of electronic synaptic transistors, we successfully implemented important synaptic functions, such as paired-pulse facilitation, dynamic filtering, and synaptic-weight-integration-based logic operations. Therefore, the proposed milk-based biocompatible polymer-EDL membrane offers new opportunities for building eco-friendly and biodegradable artificial synaptic systems. [ABSTRACT FROM AUTHOR]

In this study, we propose a polysilicon (poly-Si) channel thin-film synaptic transistor based on an organic-inorganic hybrid electric-double-layer (EDL) structured gate dielectric. To implement the hybrid EDLs, which play a key role in artificial synaptic transistors, a protonic mobile ion-based bio-inspired chitosan electrolyte and a high- ${k}$ Ta2O5 dielectric thin-film were applied. Synaptic modulation was realized on the poly-Si channels by the polarization reaction of mobile protonic ions in the organic chitosan electrolyte. The chemically and mechanically stable inorganic Ta2O5 dielectric capping layer prevented deterioration of the organic electrolyte due to the patterning and etching processes, enabling the fabrication of large-scale integrated circuits. The fabricated EDL field-effect transistors (FETs) verified essential synaptic behavior. Therefore, polarization and depolarization in EDLs, paired-pulse facilitation, and excitatory post-synaptic current modulation were successfully emulated by applying pre-synaptic stimulation spikes. As a result, the proposed CMOS-compatible poly-Si thin-film synaptic FETs based on hybrid EDLs are suitable for emerging neuromorphic systems and compact artificial neural networks. [ABSTRACT FROM AUTHOR]

Highlights • We evaluated the effect of extended-gate filed-effect transistor (EGFET) sensors. • We used a dual gate structure transducer to overcome the theoretical Nernstian limit. • We found that the Ta 2 O 5 sensing membrane has the highest sensitivity of 478.0 mV/pH. Abstract Sensing properties of various high-k sensing membrane, such as SnO 2 , HfO 2 , ZrO 2 , and Ta 2 O 5 , in dual gate extended-gate field-effect transistor (EGFET) were investigated. By adapting the dual-gate structure, high sensitivity exceeding the conventional Nernstian limit on sensitivity (59.15 mV/pH at 25 °C) was realized due to capacitive coupling effect. As a results, it was confirmed that dual-gate EGFET with Ta 2 O 5 sensing membrane which has high permittivity shows the highest sensitivity of 478.0 mV/pH as well as excellent hysteresis voltage and drift rate characteristics. [ABSTRACT FROM AUTHOR]

This work describes the construction of a sensitive, stable, and label-free sensor based on a dual-gate field-effect transistor (DG FET), in which uniformly distributed and size-controlled silicon nanowire (SiNW) arrays by nanoimprint lithography act as conductor channels. Compared to previous DG FETs with a planar-type silicon channel layer, the constructed SiNW DG FETs exhibited superior electrical properties including a higher capacitive-coupling ratio of 18.0 and a lower off-state leakage current under high-temperature stress. In addition, while the conventional planar single-gate (SG) FET- and planar DG FET-based pH sensors showed the sensitivities of 56.7 mV/pH and 439.3 mV/pH, respectively, the SiNW DG FET-based pH sensors showed not only a higher sensitivity of 984.1 mV/pH, but also a lower drift rate of 0.8% for pH-sensitivity. This demonstrates that the SiNW DG FETs simultaneously achieve high sensitivity and stability, with significant potential for future biosensing applications. [ABSTRACT FROM AUTHOR]

Amorphous InGaZnO junctionless thin-film transistors (a-IGZO JL-TFTs) with different active layer thicknesses and thermal treatments were fabricated. The unique feature of a-IGZO JL-TFTs is that all of the active layer and source/drain (S/D) electrodes are realized by the deposition of the InGaZnO thin film. A quantitative analysis to completely deplete the active layer when the device is turned OFF has been performed according to the active layer thickness. The impact of active layer thickness and thermal treatment on the performance of a-IGZO JL-TFTs has been investigated. With the increase in active layer thickness and annealing temperature, the transfer curves shifted to the negative direction. From the effects of S/D series resistance on the performance of a-IGZO JL-TFTs, the series resistance cannot be a serious problem when the contact size is small enough and the active layer is thick enough. To completely deplete the active layer, the impacts of the key device design parameters such as gate oxide thickness, gate workfunction, and high- $\kappa $ dielectrics on the device performance have been investigated using device simulation. [ABSTRACT FROM PUBLISHER]

Capacitorless single transistor dynamic random-access memory (1T-DRAM) cells on silicon–germanium-on-insulator (SGOI) substrates with various Ge mole fractions in the relaxed-SiGe layers were investigated. SGOI substrates with strained-Si channels showed higher on-currents and carrier mobility than a silicon-on-insulator (SOI) substrate with unstrained-Si channels. SGOI 1T-DRAM devices had larger memory windows than a similar device with SOI; memory window increased with increasing Ge mole fraction in the relaxed-SiGe layer. The SGOI 1T-DRAMs showed degraded retention times. High-temperature annealing reduced the effects of crystalline defects and thus improved the electrical properties of the SGOI substrates, leading to higher carrier mobility, larger memory window, and longer data retention. [ABSTRACT FROM AUTHOR]

Improved sensing performance, larger pH sensitivity that breaches the Nernst response limit with excellent stability, was realized on polycrystalline silicon based dual-gate (DG) ion-sensitive field-effect transistors. The capacitive coupling between the top and bottom gate oxides for a DG operation amplified its sensitivity to as high as 325.8 mV/pH. In particular, the SiO2/HfO2/Al2O3 (OHA) layer, proposed as an engineered sensing membrane, significantly reinforced the sensing margin of devices as well as the chemical stability for long-term use. The sensing characteristics of the OHA and conventional SiO2 layer were evaluated for single gate and DG operation modes, respectively. [ABSTRACT FROM AUTHOR]

In this study, the efficient fabrication of nickel silicide (NiSix) Schottky barrier thin-film transistors (SB-TFTs) via microwave annealing (MWA) technology is proposed, and complementary metal-oxide-semiconductor (CMOS) inverters are implemented in a simplified process using ambipolar transistor properties. To validate the efficacy of the NiSix formation process by MWA, NiSix is also prepared via the conventional rapid thermal annealing (RTA) process. The Rs of the MWA NiSix decreases with increasing microwave power, and becomes saturated at 600 W, thus showing lower resistance than the 500 °C RTA NiSix. Further, SB-diodes formed on n-type and p-type bulk silicon are found to have optimal rectification characteristics at 600 W microwave power, and exhibit superior characteristics to the RTA SB-diodes. Evaluation of the electrical properties of NiSix SB-TFTs on excimer-laser-annealed (ELA) poly-Si substrates indicates that the MWA NiSix junction exhibits better ambipolar operation and transistor performance, along with improved stability. Furthermore, CMOS inverters, constructed using the ambipolar SB-TFTs, exhibit better voltage transfer characteristics, voltage gains, and dynamic inverting behavior by incorporating the MWA NiSix source-and-drain (S/D) junctions. Therefore, MWA is an effective process for silicide formation, and ambipolar SB-TFTs using MWA NiSix junctions provide a promising future for CMOS technology. [ABSTRACT FROM AUTHOR]

In this study, we propose the fabrication of sol-gel composite-based flexible and transparent synaptic transistors on polyimide (PI) substrates. Because a low thermal budget process is essential for the implementation of high-performance synaptic transistors on flexible PI substrates, microwave annealing (MWA) as a heat treatment process suitable for thermally vulnerable substrates was employed and compared to conventional thermal annealing (CTA). In addition, a solution-processed wide-bandgap amorphous In-Ga-Zn (2:1:1) oxide (a-IGZO) channel, an organic polymer chitosan electrolyte-based electric double layer (EDL), and a high-k Ta2O5 thin-film dielectric layer were applied to achieve high flexibility and transparency. The essential synaptic plasticity of the flexible and transparent synaptic transistors fabricated with the MWA process was demonstrated by single spike, paired-pulse facilitation, multi-spike facilitation excitatory post-synaptic current (EPSC), and three-cycle evaluation of potentiation and depression behaviors. Furthermore, we verified the mechanical robustness of the fabricated device through repeated bending tests and demonstrated that the electrical properties were stably maintained. As a result, the proposed sol-gel composite-based synaptic transistors are expected to serve as transparent and flexible intelligent electronic devices capable of stable neural operation. [ABSTRACT FROM AUTHOR]

In this study, we applied microwave annealing (MWA) to fabricate amorphous In-Ga-Zn-O (a-IGZO) thin-film transistors (TFTs) without thermal damage to flexible polyimide (PI) substrates. Microwave energy is highly efficient for selective heating of materials when compared to conventional thermal annealing (CTA). We applied MWA and CTA to a-IGZO TFTs on PI substrate to evaluate the thermal damage to the substrates. While the PI substrate did not suffer thermal damage even at a high power in MWA, it suffered severe damage at high temperatures in CTA. Moreover, a-IGZO TFTs were prepared by MWA at 600 W for 2 min, whereas the same process using CTA required 30 min at a temperature of 300 °C, which is a maximum process condition in CTA without thermal damage to the PI substrate. Hence, MWA TFTs have superior electrical performance when compared to CTA TFTs, because traps/defects are effectively eliminated. Through instability evaluation, it was found that MWA TFTs were more stable than CTA TFTs against gate bias stress at various temperatures. Moreover, an MWA TFT-constructed resistive load inverter exhibited better static and dynamic characteristics than the CTA TFT-constructed one. Therefore, MWA is a promising thermal process with efficient energy conversion that allows the fabrication of high-performance electronic devices. [ABSTRACT FROM AUTHOR]

We proposed a synaptic transistor gated using a Ta2O5 barrier-layered organic chitosan electric double layer (EDL) applicable to a micro-neural architecture system. In most of the previous studies, a single layer of chitosan electrolyte was unable to perform lithography processes due to poor mechanical/chemical resistance. To overcome this limitation, we laminated a high-k Ta2O5 thin film on chitosan electrolyte to ensure high mechanical/chemical stability to perform a lithographic process for micropattern formation. Artificial synaptic behaviors were realized by protonic mobile ion polarization in chitosan electrolytes. In addition, neuroplasticity modulation in the amorphous In–Ga–Zn-oxide (a-IGZO) channel was implemented by presynaptic stimulation. We also demonstrated synaptic weight changes through proton polarization, excitatory postsynaptic current modulations, and paired-pulse facilitation. According to the presynaptic stimulations, the magnitude of mobile proton polarization and the amount of weight change were quantified. Subsequently, the stable conductance modulation through repetitive potential and depression pulse was confirmed. Finally, we consider that proposed synaptic transistor is suitable for advanced micro-neural architecture because it overcomes the instability caused when using a single organic chitosan layer. [ABSTRACT FROM AUTHOR]

• A silicon nanowire-based dual-gate transistor is proposed. • Silicon nanowires are fabricated via electrospinning, a low-cost and simple technique. • Superior electrical characteristics and higher capacitive-coupling ratios are observed than in film-type devices. • Ultra-high-pH sensitivity is observed than film-type devices. • Dual-gate mode of the silicon nanowire-type device exhibited excellent reliability and stability. In this study, we fabricated a silicon nanowire (SiNW)-based ultra-high-sensitivity dual-gate (DG) pH ion-sensitive field-effect transistor (pH-ISFET) using polyvinylpyrrolidone (PVP) nanofibers (NFs) as a template for SiNW fabrication. By comparing the electrical properties, capacitive coupling, pH sensitivity, and non-ideal effects, such as drift or hysteresis voltages with a silicon film channel-type DG pH-ISFET, the effectiveness of the SiNW channel was verified. The SiNW-type DG FET exhibited better electrical properties, such as higher mobility, smaller sub-threshold slopes, and larger on-off current ratios, than the conventional silicon film-type DG FET. It also showed an increased capacitive-coupling ratio between the top and bottom gates. Through pH-ISFETs, which have an extended gate connected to the fabricated DG FETs, the sensing performance of the SiNW channel and silicon film channel can be compared. In the single-gate sensing mode, the film-type and SiNW-type devices showed a sensitivity of 56.6 mV/pH and 56.3 mV/pH, respectively. Meanwhile, in the DG sensing mode, the film-type device showed a sensitivity of 938.4 mV/pH, and the SiNW-type device has a sensitivity of 1438.8 mV/pH, indicating that the pH sensitivity in the SiNW channel was significantly amplified. Non-ideal effects were also evaluated, and the SiNW-type device showed more stable performance with a smaller hysteresis voltage and drift rate than the film-type device. Therefore, pH-ISFETs based on the SiNW-type DG FET using PVP nanofiber pattern template transfer, which involve a simple and low-cost process, show their potential in future bio-sensing applications owing to their high sensitivity and excellent stability. [ABSTRACT FROM AUTHOR]

• Double gate (DG) TFT-based chemical sensors using In-Ga-Zn-O nanofibers or films are manufactured. • IGZO channel and DG structure greatly enhance sensitivity with high capacitive coupling due to the large upper surface area of IGZO nanofibers. • IGZO nanofiber chemical sensors have 17.82 times higher sensitivity and reduced non-ideal behavior than conventional ISFETs. • This sensor is expected to be a promising transparent and wearable biosensor platform. Herein, a high sensitivity In-Ga-Zn-O (IGZO) nanofiber channel double gate (DG) field-effect transistor (FET)-based chemical sensor is described. Transparent and flexible IGZO nanofiber channels were fabricated by electrospinning, and IGZO film channels were prepared for comparison via spin coating. We connected a separative extended gate (EG) with a chemical sensing membrane to the fabricated IGZO FETs to test their applicability to pH sensing applications. The effectiveness of the IGZO nanofiber channel was verified by comparing the pH sensitivity and non-ideal effects such as drift and hysteresis voltage with the IGZO film channel. The nanofiber channel showed much higher sensitivity in the dual gate ion-sensitive field-effect transistor (DG ISFET) than the film channel as it has an increased capacitive coupling effect due to an increase in the upper channel surface area and a decreased channel bottom surface area. The sensitivity of the DG ISFET with an IGZO nanofiber channel was 998 mV/pH at room temperature, surpassing the 384 mV/pH of the IGZO film channel, which itself far exceeded the Nernstian limit of 59.16 mV/pH. Furthermore, the nanofiber channel had a lower hysteresis voltage and drift rate compared to its amplified sensitivity, and exhibited a more stable performance than the film channel. Therefore, IGZO nanofiber-based DG FET chemical sensors are expected to be promising for use in transparent and wearable biosensor applications. [ABSTRACT FROM AUTHOR]

• Hot-carrier-induced device degradation in Schottky barrier ambipolar polysilicon transistors has been studied. • Competing degradation mechanism was suggested to explain Schottky barrier ambipolar transistors after hot carrier stress. • The degradation mechanism was justified by measuring gate current and transfer characteristics before and after hot carrier stress. This study experimentally investigated the hot-carrier-induced device degradations in Schottky barrier (SB) ambipolar polysilicon transistors and validated the degradation mechanism. The behavior of hot-carrier-induced device degradation in SB ambipolar transistors was different from that of a unipolar MOSFET. The phenomenon of hot-carrier generation at the source electrode, attributed to the existence of a high electric field across the reverse-biased source electrode in SB transistors and the competing degradation mechanism between the trapped charges at the gate oxide near the source edge and drain electrode, explained the experimental results. The degradation mechanism was justified by measuring the gate current and transfer characteristics in the forward and reverse modes before and after hot-carrier stress, respectively. The results can contribute to the non-volatile memory applications and aid in investigating the aging effects of multi-functional integrated circuits using reconfigurable field-effect transistors. [ABSTRACT FROM AUTHOR]