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Thin film transistors (TFTs) as the core devices for displays, are widely used in various fields including ultra-high-resolution displays, flexible displays, wearable electronic skins and memory devices, especially in terms of sensors. TFTs have now started to move towards miniaturization. Similarly to MOSFETs problem, traditional planar structure TFTs have difficulty in reducing the channel's length sub-1μm under the existing photolithography technology. Vertical channel thin film transistors (V-TFTs) are proposed. It is an effective solution to overcome the miniaturization limit of traditional planar TFTs. So, we summarize the different aspects of VTFTs. Firstly, this paper introduces the structure types, key parameters, and the impact of different preparation methods in devices of V-TFTs. Secondly, an overview of the research progress of V-TFTs' active layer materials in recent years, the characteristics of V-TFTs and their application in examples has proved the enormous application potential of V-TFT in sensing. Finally, in addition to the advantages of V-TFTs, the current technical challenge and their potential solutions are put forward, and the future development trend of this new structure of V-TFTs is proposed. [ABSTRACT FROM AUTHOR]

In this work, top-gate structured W: F co-doped Zn–Sn–O (ZTO) thin-film transistors (TFTs) with excellent stability are prepared by the solution process. Comparing with the undoped ZTO TFT, the mobility of W: F co-doped ZTO TFTs was up from 1.87 to 3.14 cm2 V−1 s−1, and the subthreshold swing decreases from 0.192 to 0.157 V/dec. Moreover, the W: F co-doped ZTO TFTs exhibit a small Vth shift of −0.09 V under negative bias illumination stress, which is close to one of the TFTs prepared by the traditional vacuum process. X-ray photoelectron spectroscopy and capacitance–voltage examination revealed that the enhanced stability is due to the fact that W: F co-doping can effectively suppress defect states in ZTO films. The results manifest that W: F co-doping may be a promising method for enhancing the stability of TFTs with the top-gate structure. [ABSTRACT FROM AUTHOR]

For organic thin‐film transistors (OTFTs) made of solution processed stacks of organic semiconductor and dielectric materials, it is a grand challenge to eliminate the leakage current paths. With a top‐gate bottom‐contact structure, this work introduces a strong dipole interfacial layer made of self‐assembled monolayer (SAM) molecules at metal‐semiconductor contacts to suppress minority carrier injection for low leakage and stable operation, while not affecting majority carrier injection. Both gate insulator (GI) leakage and parasitic leakage in the device architecture are also effectively suppressed with a sputtering‐resistant polymer GI layer and photolith patterned OSC islands, respectively. The devices present a decent mobility with a typical value of 1.98 cm2 V–1 s–1, record‐low leakage current at 10–18 A µm−1 and large ON/OFF ratio (>1010) in a wide gate voltage range (100 V), reaching the theoretical limit and also the best level of inorganic counterparts despite much lower processing temperature (120 °C). Manufacturability of the material stack is verified on a 200 mm × 200 mm substrate and the fabricated 4.7 in. active‐matrix organic light‐emitting diode display, integrating more than 150 000 OTFTs, can be operated at ultra‐low frame‐rate (0.1 Hz) for power saving. [ABSTRACT FROM AUTHOR]

The effect of light illumination intensity on the stability of In-Zn-Sn-O (IZTO) thin-film transistors (TFTs) array fabricated by solution processed is investigated. Comparison with positive bias stress, the light illumination suppresses the ${V}_{\text {th}}$ shift under positive bias illumination stress because of the increase in the free electrons induced by the ionized oxygen vacancies in the IZTO channel layer, but transfer characteristics show two-stage degradation under negative bias illumination stress (NBIS). The hump phenomenon is induced after NBIS, and the light illumination intensity is higher, the hump phenomenon becomes more serious. The hump phenomenon is relevant to ionized oxygen vacancies, which act as shallow donor-like states near the conduction-band minimum in IZTO. [ABSTRACT FROM AUTHOR]

This paper presents a oxide thin film transistors with high mobility by a new fabricate method. The high mobility TFT with ultra‐high mobility of 55cm2/Vs has been obtained, and the PBTS and NBTS has also been optimized. [ABSTRACT FROM AUTHOR]

In this letter, the performance of Zn-Sn-O (ZTO) thin film transistors (TFTs) has been greatly improved by Mo doping as an oxygen vacancy to control the residual electrons. The results show that the TFT with 3 at% Mo doping exhibits the best electrical characteristics with a high saturation mobility of 26.53 cm2 V−1 s−1, a threshold voltage of 0.18 V, a subthreshold swing of 0.32 V dec−1 and a large switching ratio of 2 × 106. The saturation mobility and switching ratio of Mo-doped Zn-Sn-O (MZTO, 3 at%) TFTs improved almost five and two orders of magnitude compared with ZTO TFTs, respectively. Therefore, the MZTO TFT has much potential for future electrical applications with its excellent properties. [ABSTRACT FROM AUTHOR]

In this article, the effects of two-step annealing at the active layer (AL) and the completed device on the electrical properties and stability of amorphous In-Ga-Zn-O (a-IGZO) thin-film transistor (TFT) are studied. The subthreshold swing (SS) and stability of a-IGZO TFT devices are greatly improved, and the hump phenomenon under the negative bias illumination stability (NIBS) is particularly well suppressed when the TFT devices are treated with an optimum two-step annealing process (200 °C of preannealing and 300 °C of postannealing). Based on the analysis of the surface morphology, internal chemical state, and electrical properties of the IGZO thin film, an improvement of two-step annealing devices may be due to hydrogen filling the oxygen vacancies in the AL and well passivating the defects between insulating layer and AL. The result illustrates that two-step annealing is a promising method for IGZO TFT, which is not only beneficial to improve the stability of the device but also suppresses the hump phenomenon in NIBS. [ABSTRACT FROM AUTHOR]

This article discusses the optimization of the photonic annealing technique for full-solution-processed oxide thin film transistors (TFTs). The use of solution techniques for TFTs has gained attention due to its low cost, transparency, and high mobility. However, previous attempts at full-solution functional layers for oxide TFTs have resulted in poor performance. To address this, the article proposes the use of photolithographic patterned technique to fabricate TFT arrays with channel lengths of less than 10 μm. Additionally, the article explores the use of photonic annealing processes, such as ultraviolet (UV) irradiation or rapid thermal annealing (RTA)-assisted laser annealing (LA) technique, to improve the stability of full-solution-processed TFTs. The results show promising potential for the photonic annealing process in enhancing the stability of TFTs. [Extracted from the article]

This work explores a strategy of Sr3+ and N3− co-doping in InSrNO thin film to simultaneously improve stability and electrical performance of In2O3 thin film transistors (TFT). The aqueous route is proposed for low-temperature (<300 °C) thin film fabrication and accurate control of dopant composition. The influences of Sr–N co-doping on the chemical and structure of the InSrNO thin films are investigated by x-ray diffraction and x-ray photo electron spectroscopy measurements. The stability of InSrNO TFTs under the bias/illumination stress has been tested. The optimized InSrNO TFT (Sr: 0.5 mol%, N: 10 mol%) exhibits both the superior electrical performance and stability (a µ of 16.38 cm2 V−1 s−1, VTH of 2.91 V, SS of 0.24 V dec−1, a ΔVTH of 1.54 V under the positive bias stress, and a ΔVTH of −1.02 V under the negative bias illumination stress). The results demonstrate that Sr–N co-doping can improve electrical performance and stability of In2O3 TFT, which is attributed to the decrease of oxygen-related defects. [ABSTRACT FROM AUTHOR]

In this paper, the Sr‐doped In2O3 thin film is fabricated by aqueous route and the stability of InSrO thin film transistor under negative bias illumination stress (NBIS) is investigated. It is found that Sr can effectively improve the stability of In2O3 TFTs under NBIS, which is due to the reduction of oxygen vacancies. The XPS measurement is tested to analyze the variation of oxygen vacancy concentration. The density of states is calculated to further confirm the decrease of total trap state caused by Sr doping. [ABSTRACT FROM AUTHOR]

Flexible pressure sensors are important components in the future rollable touch screens, health care devices, electronic skins, and more. However, large-area array pressure sensors with small-size, good sensitivity, and the ability of detecting high-frequency dynamic force remain the key challenges for their practical applications. In this letter, we proposed a novel flexible piezoelectric pressure sensor system combined with a P(VDF-TrFE)/AgNWs thin film and an a-IGZO TFT. The doping of AgNWs into the P(VDF-TrFE) can improve the piezoelectric performance of P(VDF-TrFE) without high-voltage polarization and pressure stretching process, which are harmful to the performance of the TFT. With the combination of the a-IGZO TFT, this pressure sensor can be arrayed 4 $\times$ 4 in an active-matrix design with a dynamic force detecting ability (a response of 1100 mV/N), exhibiting good flexibility, fast response speed, high amplification, and lower energy consumption. [ABSTRACT FROM AUTHOR]

In this paper, a TiO2/Al2O3/TiO2/Al2O3/TiO2 (TATAT) stacked structure was developed as a gate dielectric for amorphous ZnSnO (ZTO) thin-film transistor (TFT) applications. The TATAT insulator has a relative permittivity and leakage current density of 11 and 4.44 × 10-7 A/cm2 at 1 MV/cm, respectively. As compared with the AlTiO (ATO) compound dielectric, the ZTO TFT device with a TATAT stacked dielectric exhibited a lower threshold voltage of 0.56 V, a higher Ion/Ioff current ratio of 1.2x 10-8, a larger field-effect mobility of 86.6 cm2/Vs, and a smaller subthreshold swing of 0.2 V/decade. Furthermore, the positive shift of threshold voltage is less than 0.15 V under positive bias stress. The results suggest that stack TATAT films is a promising gate dielectric for solution-processed TFT devices with high mobility and stability. [ABSTRACT FROM AUTHOR]

The development of flexible and highly sensitive pressure sensors is critical for the realization of wearable health monitors and electronic skins. However, the sensitivity, flexibility, and large-area fabrication of pressure sensors remain the key challenges for their practical applications. In this letter, we present a novel pressure sensing system in an amorphous indium-gallium-zinc oxide (a-IGZO) thin film transistor (TFT) configuration comprised of a microstructured polydimethylsiloxane (PDMS) capacitor fabricated on a 200 mm $\times200$ mm flexible substrate. The microstructured PDMS thin film shows the average sensitivity of 0.1 kPa−1 and response time of <190 ms for the pressure of 12 kPa. Through the amplification effect of the a-IGZO TFT, the device shows a high sensitivity in the subthreshold region for ultra-low-pressure regime (≤1.5 kPa) detection and good linearity in the linear region for low-pressure regime (≤7 kPa) detection. These results demonstrate a novel approach to pressure-sensing intelligent products. [ABSTRACT FROM AUTHOR]

Amorphous InAlZnO (a-IAZO) films were grown by pulsed laser deposition at room temperature and annealed at various temperatures. The amorphous state of a-IAZO films is thermally stable at high temperatures up to 700 °C. The films exhibit a high visible transmittance above 95% and an appropriate resistivity on the order of 10^6~\Omega \cdot \text cm . As the annealing temperature increases, the optical bandgap and resistivity decrease in general. The microcracks form in films at an annealing temperature above 500 °C. The a-IAZO films annealed at 400 °C are suitable for channel layers of thin-film transistors (TFTs) and the devices demonstrate good performances with an on/off ratio of 10^8 and field-effect mobility of 2.2 \text cm^2\cdot \text V^-1\cdot \text s^-1 . The observations will provide useful physical insight into film properties and also offer basic design guideline for a-IAZO TFTs. [ABSTRACT FROM AUTHOR]

Amorphous zinc-niobium-tin-oxide (a-ZNTO), a new amorphous oxide semiconductor, was proposed for fabricating thin-film transistors (TFTs). a-ZNTO thin films were grown by magnetron sputtering and used as channel layers of TFTs. The effects of niobium content on film properties and device behaviors were investigated in detail. Nb could serve as a carrier suppressor by reducing oxygen vacancies in a-ZNTO films and lower the interfacial trap states in a-ZNTO TFTs. The enhanced performances of a-ZNTO TFTs were achieved at an optimized Nb content of $x=0.2$ for a Nb:Zn:Sn atomic ratio of x$ :4:7. The reduced channel sizes are very effective to improve TFT performances, with an ON/OFF current ratio of \sim 10^{8} and a field-effect mobility of 13.2 cm2/Vs. The indium-free a-ZNTO TFTs may have the potential for applications in next-generation displays. [ABSTRACT FROM AUTHOR]

We report a solution-processed a top gate indium-gallium-zinc oxide thin film transistors (IGZO TFTs) with high-k zirconium oxide (ZrOx) dielectric. Both the dielectrics and electrodes were fabricated by spin coating or screen printing. The ZrOx exhibits an amorphous structure and smooth enough to be used as a gate insulator for TFT. The TFT with maximum process temperature of 300 ^\circC had a saturation mobility of 0.2 cm^2/\V\cdot\s, an on/off ratio of \10^3, a threshold voltage of 0.3 V, and the subthreshold swing is 0.34 V/decade. [ABSTRACT FROM PUBLISHER]

It was demonstrated that low-operating-voltage bottom-gate top-contact (BGTC) structure thin-film transistors (TFTs) were fabricated using solution-processed amorphous zinc indium tin oxide (ZITO) and hafnium aluminum oxide (HAO) films. Due to the excellent chemical stability of ZITO film and high etching selectivity between ZITO and indium tin oxide (or between ZITO and Mo), the manufacture of BGTC structure requires only traditional lithography and wet etching. The usage of high- k HAO films lowered the operating voltage (below 2 V) of the TFT devices. TFT devices based on ZITO and HAO films annealing at 500 °C showed a saturated field-effect mobility of 13.5 cm ^{\mathrm {\mathbf {2}}} V ^{\mathrm {\mathbf {-1}}} s ^\mathrm \mathbf -1 , a ^^^^ small subthreshold swing of 87 mV/decade, a large ON-to-OFF current ratio of 7.2\times 10^\mathrm \mathbf 6 , and a threshold voltage of −0.6 V. The hysteresis (0.14 V) of TFT devices confirmed further that the ZITO and HAO films could be the promising candidates for TFT devices. [ABSTRACT FROM PUBLISHER]

We investigate the electrical properties of ZnO thin-film transistors (TFTs) under the ultraviolet (UV) light illumination to clarify the device reliability. The ON/OFF current ratio of ZnO TFTs shows an evident reduction due to the creation of UV photo-induced current. This behavior degradation becomes severe for devices exposed to a short-wavelength UV light. The persistent photoconductivity is observed in ZnO TFTs under the UV illumination with a much slower decay for the ON-state than the OFF-state, which is attributed to the reduced recombination under a positive gate bias. The UV light instabilities of ZnO TFTs can be explained on the basis of UV photoexcited oxygen vacancies. A feasible mechanism model is proposed in this paper. These observations and analytical model not only provide useful physical insight into the device behaviors, but also offer basic design guideline for oxide TFTs. [ABSTRACT FROM PUBLISHER]

Bottom-gate transparent IGZO–TFT had been successfully fabricated at relatively low temperature (200°C). The devices annealing for 4h at 200°C exhibit good electrical properties with saturation mobility of 8.2cm2V−1s−1, subthreshold swing of 1.0V/dec and on/off current ratio of 5×106. The results revealed that the stability of TFT devices can be improved remarkably by post-annealing treatment. After applying positive gate bias stress of 20V for 5000s, the device annealing for 1h shows a larger positive V th shift of 4.7V. However, the device annealing for 4h exhibits a much smaller V th shift of 0.04V and more stable. [ABSTRACT FROM AUTHOR]

Abstract: Organic heterojunction thin-film transistors are fabricated based on copper phthalocyanine (CuPc) and hexadecafluorophtholocyaninatocopper (F16CuPc) as double active layers, which exhibit typical ambipolar conduction. Several substrate temperatures are utilized to tune film morphology, which results in a remarkable change on the electric characteristics of organic transistors. The highest balanced mobility value of 2.91×10−2 cm2/Vs for hole and 1.04×10−2 cm2/Vs for electron are obtained by depositing F16CuPc at 150°C and CuPc at 200°C, respectively, which are comparable to those conventional single-layer devices. This result demonstrates that the growth conditions of organic heterojunctions play a crucial role in ambipolar devices. [ABSTRACT FROM AUTHOR]

Solution-processed thin film transistors (TFTs) used in flexible electronics require them to be fabricated under low temperature. Ultraviolet (UV) treatment is an effective method to transform the solution precursors into dense semiconductor films. In our work, high-quality indium zinc oxide (IZO) thin films were prepared from nitrate-based precursors after UV treatment at room temperature. After UV treatment, the structure of IZO thin films was gradually rearranged, resulting in good M–O–M network formation and bonds. TFTs using IZO as a channel layer were also fabricated on Si and Polyimide (PI) substrate. The field effect mobility, threshold voltage (Vth), and subthreshold swing (SS) for rigid and flexible IZO TFTs are 14.3 and 9.5 cm2/Vs, 1.1 and 1.7 V, and 0.13 and 0.15 V/dec., respectively. This low-temperature processed route will definitely contribute to flexible electronics fabrication. [ABSTRACT FROM AUTHOR]

In this letter, we report a solution-processed hafnium indium zinc oxide (HIZO) thin-film transistors (TFTs) with an Al-doped ZrO2 (AZO) gate dielectric. The AZO thin films were identified as an amorphous phase up to the annealing temperature of 600 ^\circC and had a smooth surface with root-mean-square roughness of <0.35~nm . The relative dielectric constant of AZO thin film annealed at 400 ^\circC is 19.67. And HIZO TFTs with AZO gate oxide exhibited a high saturation field-effect mobility of 18.1 cm^2 /Vs, a small subthreshold swing of 0.4 V/decade, and a high ON/OFF ratio of 10^7 , which can satisfy the backplate requirements for flat panel displays. [ABSTRACT FROM AUTHOR]

• TFT with Tungsten zinc tin oxide active layer and HfAlO dielectric layer using power ultrasound technology is reported. • Power ultrasound technology can greatly reduce the preparation time of precursor solution and improve the TFT performance. • The HfAlO films prepared by PUT obtain excellent electrical properties. In this paper, power ultrasound technology (PUT) is employed to prepare the high-k hafnium-aluminum oxide (HAO) dielectric and thin film transistor (TFT). The continuous propagation of high-intensity ultrasonic waves in the metal oxide precursor solution can improve the dissolution efficiency of the solute and speed up the formation of the HAO precursor solution. The prepared HAO films have a smooth surface roughness of 0.36 nm and high optical transmittance of 85 %. Moreover, HAO films obtain excellent electrical properties with a relative permittivity of 15.9 and a leakage current density of 9.1 × 10−8 A/cm2 at 2 MV/cm as well. Finally, we successfully fabricate TFT with HAO dielectric using PUT, these TFTs exhibit switch characteristics with field effect mobility of 18.7 cm2v−1s−1, threshold voltage (V th) of −0.47 V, and Vth shift of 0.35 V under positive gate bias stress. The results show that the PUT is a promising method that can remarkably decrease the preparation time of the precursor solution and improve the TFT performance. [ABSTRACT FROM AUTHOR]

Thin film transistors (TFTs) using solution-processed aluminum indium zinc oxide (AIZO) as a channel layer were fabricated in this study. Influence of annealing temperatures on solution processed AIZO thin films surface, structural and chemical properties had been intensively investigated. The AIZO films existed in an amorphous phase even through the annealing temperature reach up to 500 °C. The as-prepared AIZO films with surface root-mean-square roughness values less than 0.6 nm were uniform and smooth. As the annealing temperatures exceeded 400 °C, the impurities and hydroxyl groups in the AIZO films had almost no change, demonstrating that the AIZO oxide formation was almost completed. Above all, the solution processed AIZO TFTs exhibit excellent device performance with high saturation mobility of 20.8 cm 2 /V s, threshold voltage of −0.39 V, small subthreshold swing of 0.13 V/dec and high on/off current ratio of 5 × 10 6 . [ABSTRACT FROM AUTHOR]