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In this paper, nano-silver and nano-silver coated tin solder joints with hot pressing bonding conditions of 250 °C, 2 min and 15 MPa were selected to study the shear strength of solder joints and their service reliability under hot cycling conditions. The main conclusions are as follows: The addition of nano-tin plays a dispersion strengthening role, which increases the shear strength of nano-silver solder joint from 40 MPa to 50 MPa. After thermal cycling, the main failure mode of the nano-silver-coated tin solder joints is ductile fracture. The main failure mode of the nano-silver solder joints is brittle fracture, firstly, the delamination appears at the interface, and then the crack passes through the outer side of the solder joints, showing cleavage fracture of the grain. The thermal fatigue life of the nano-silver solder joint is 145 cycles, and the thermal fatigue life of the nano-silver-coated tin solder joint is 175 cycles. [ABSTRACT FROM AUTHOR]

With the advancement of high-integration and high-density interconnection in chip manufacturing and packaging, Cu bumping technology in wafer- and panel- level packaging is developed to micrometer-sized structures and pitches to accommodate increased I/O numbers on high-end integrated circuits. Driven by this industrial demand, significant efforts have been dedicated to Cu electroplating techniques for improved pillar shape control and solder joint reliability, which substantially depend on additive formulations and electroplating parameters that regulate the growth morphology, crystal structure, and impurity incorporation in the process of electrodeposition. It is necessary to investigate the effect of an additive on Cu pillar electrodeposition, and to explore the Kirkendall voids formed during the reflowing process, which may result from the additive-induced impurity in the electrodeposited Cu pillars. In this work, a self-synthesized polyquaterntum (PQ) was made out with dual suppressor and leveler effects, and was combined with prototypical accelerator bis- (sodium sulfopropyl)-disulfide (SPS) for patterned Cu pillar electroplating. Then, Sn96.5/Ag3.0/Cu0.5 (SAC305) solder paste were screen printed on electroplated Cu pillars and undergo reflow soldering. Kirkendall voids formed at the joint interfaces were observed and quantified by SEM. Finally, XRD, and EBSD were employed to characterize the microstructure under varying conditions. The results indicate that PQ exhibits significant suppressive and levelled properties with the new structure of both leveler and suppressor. However, its effectiveness is dependent on liquid convection. PQ and SPS work synergistically, influencing the polarization effect in various convective environments. Consequently, uneven adsorption occurs on the surface of the Cu pillars, which results in more Kirkendall voids at the corners than at the center along the Cu pillar surface. [ABSTRACT FROM AUTHOR]

This article investigates the failure mode and mechanism of copper pillar solder joints in temperature cycling experiments, focusing on a Cu/nano Ag/Cu solder joint structure. The hot pressing bonding condition at 300 °C with insulation for 10 s is chosen for the experiments. Based on the life test results, the thermal cycling fatigue life of the nanosilver solder joint is determined to be 2050 cycles. To gain further insights, finite element software ANSYS is employed to simulate nanosilver solder joints in flip chips, revealing the stress–strain distribution within the solder joints. The simulation utilizes the Anand viscoplastic constitutive model for the solder joint, providing a reasonable representation of the stress–strain behavior under thermal cycling load. Notably, the simulation highlights that the maximum stress and strain occur in the contact area between the solder joint and the copper column. To enhance accuracy, the calculation equation is refined using relevant experience, resulting in a prediction of the thermal fatigue life of nanosilver solder joints. This prediction aligns closely with the experimental results. The research outcomes not only contribute valuable insights into the behavior of nanosilver solder but also serve as a reference for its application in electronic packaging. [ABSTRACT FROM AUTHOR]

A new type of copper (Cu)‑rhodium (Rh)‑alloy, Cu(Rh), films is developed by co‑sputtering copper and rhodium onto silicon (Si) substrates under an argon (Ar) atmosphere. The new films are next annealed at 600 and 670 °C, or alternatively at 100 and 450 °C, for 1 h. Longer annealing to the films, for up to 8 days, is also conducted to explore resistivity variation. The resistivity of the new 300‑nm‑thick film is 2.19 μΩ cm after annealing at 670 °C for 1 h and drifts to 2.26 and 2.14 μΩ after annealing at 400 and 450 °C, respectively, for 200 h. A 2.7‑μm‑thick Sn layer is then thermally evaporated atop the new film for stable flip‑chip solder joints; their metal and Cu‑Sn intermetallic compound (IMC) growth processes vs. various annealing periods are tested. After annealing at 670 °C, the new 300‑nm‑thick film’s adhesive strength reaches 44.2 ± 0.01 MPa, which is 11 ~ 12‑fold that of their pure Cu counterpart. Some key test results of the new film are disclosed herein, including its X‑ray diffraction (XRD) patterns, transmission electron microscopy (TEM) images, secondary‑ion mass spectrometry (SIMS), time‑dependent dielectric‑breakdown (TDDB) lifetime curves, and adhesive strength. The new film’s antibacterial efficacy arrives at an antibacterial ratio of approximately 100% against Staphylococcus aureus (S. aureus) BCRC 10451 for the 300‑nm‑thick film and approximately 99.82% for the 8 nm film, far superior to that of a pure Cu film, which is 0 with the same annealing temperature range. The new film, hence, seems to be a remarkable candidate material for various industrial applications, such as ultra‑large‑scale integrated circuits (ULSIC), micro‑electronic circuits, printed circuits, flip‑chip technology, medical care concerning antibacteria, and the like. [ABSTRACT FROM AUTHOR]

In this paper, we analyze the residual stress of different components of the crystal structures of electronic device materials following exposure to elevated temperatures using a combination of experimental tests and finite element simulations. X-ray diffraction (XRD) and LXRD micro-area residual stress analyzer were employed to determine the residual strain and stress of the CBGA sample encapsulation cover and solder joints. Subsequently, the experimental data were utilized to verify the accuracy of the simulation. The discrepancy between experimental measurements and simulation outcomes of the residual stress following reflow soldering of CBGA-assembled micro-solder joints is below 14%. The analysis also included thermal warping deformation of the CBGA encapsulation cover and how the residual stress was influenced by the diameter, spacing, and height of the solder joints. The study reveals that the residual stress following reflow soldering of BGA solder joints is non-uniformly distributed within the array. Within a single solder joint, residual stress gradually increases in distribution from its middle to the point where it make contact with the PCB and chip, with the highest level of residual stress observed where the solder joint contacts the chip. The variation in material parameters, such as the coefficient of thermal expansion, is the primary cause of thermal warping deformation on the surface of CBGA encapsulation covers. Three primary factors significantly impact the residual stress on BGA solder joints: solder joint diameter, spacing, and height. The maximum value is inversely proportional to the height of the solder joints and the residual stress. Conversely, the diameter and spacing of the joints are positively proportional to the highest value. When the diameter of the solder joint is increased from 0.55 mm to 0.75 mm, the maximum residual stress in the BGA solder joint increases from 37.243 MPa to 36.835 MPa. Conversely, increasing the height of the solder joint from 0.36 mm to 0.44 mm reduces the stress from 39.776 MPa to 36.835 MPa. [ABSTRACT FROM AUTHOR]

In this work, rapid failure of a few minutes was observed in real ball grid array solder joints under high current density (8 × 103 and 1 × 104 A cm−2) at room temperature. For each test condition, the failure solder joint was detected at the same position of the daisy chain by computed tomography technology. Furthermore, the open failure for all solder joints was caused by the chip side (anode side) Cu dissolution. Microstructure evolution for a pair of electrically connected solder joints was investigated. In both solder joints, Cu atoms on the chip side were dissolved to the board side with the formation of intermetallic compound particles in solder matrix. Finite element simulation was introduced to calculate the current density, temperature, and heat flux distribution. The temperature gradient along the direction of Cu migration in solder joint was developed due to the accumulation of Joule heating. Thermomigration was confirmed as the dominant mechanism of chip side Cu dissolution. [ABSTRACT FROM AUTHOR]

Scanning acoustic microscopy (SAM) technique has been applied to defect inspection in electronic devices. With the increase of packaging density, detection of the micro-defects in high density devices becomes more and more challenging. The SAM test is suffering from sacrificing the spatial resolution to reach a certain penetration depth of the ultrasonic waves. So it is necessary to enhance the resolution level of the SAM image. In this paper, a wavelet based resolution enhancement technique was investigated to reconstruct a high quality image for SAM test of the flip chip packages. The stationary wavelet transform was adopted to decompose the captured SAM image into four frequency subbands, and the high frequency subbands were enhanced by adding the difference matrix in the intermediate stage, and a super resolution SAM image was derived from combining all the subbands by using the Inverse Discrete Wavelet Transform. Then the solder joints segmented from the SR-SAM image were classified by using the SVM algorithm. The results validated that the proposed technique is effective to improve the detection accuracy of SAM test. • An intelligent system is developed to inspect the solder joints of flip chip. • The SAM image is decomposed into four different frequency components. • High resolution SAM image is reconstructed with the wavelet-based method. • The solder joints are segmented from the SR-SAM image. • The SR-SAM image has high accuracy for defect recognition. [ABSTRACT FROM AUTHOR]

Purpose: Statistical modeling has been successfully applied to integrated circuit (IC) solder joint inspection. However, there are some inherent problems in previous statistical modeling methods. This paper aims to propose an adaptive statistical modeling method to further improve the inspection performance for IC solder joints. Design/methodology/approach: First, different pixels in the IC solder joint image were modeled by different templates, each of which was composed of the hue value of the pixel and a proposed template significance factor. Then, the potential defect image was obtained by adaptive template matching and the potential defect threshold for each pixel. It was noted that the number of templates, matching distance threshold, potential defect threshold and updating rate were adaptively updated during model training. Finally, the trained statistical model was used to inspect the IC solder joints by means of defect degree. Findings: Experimental results indicated that the proposed adaptive schemes greatly contributed to the inspection performance of statistical modeling. Also, the proposed inspection method achieved better performance compared with some state-of-the-art inspection methods. Originality/value: The proposed method offers a promising approach for IC solder joint inspection, which establishes different numbers of templates constructed by pixel values and template significance factors for different pixels. Also, some important parameters were adaptively updated with the updating of the model, which contributed to the inspection performance of the model. [ABSTRACT FROM AUTHOR]

With the rapid development of microelectronic interconnection technology, the reliability requirements of electronic products are becoming higher and higher. Among them, temperature has the greatest impact on electronic devices. Due to the different coefficients of thermal expansion (CTE) between the many materials of a chip, the inside of a solder joint is subjected to cyclic temperature action. Under the effect of cyclic temperature, the solder joints are subject to internal fracture resulting in the failure of the solder joint. Therefore, it is necessary to find a more reliable material for the solder joint. In this paper, the advantages and disadvantages of pure silver material and low silver material are compared by finite element simulation analysis of nano-silver pure silver material and SAC305 low silver material, and the fatigue life prediction of nano-silveris predicted by a life prediction model. Then, using the Electric Power Research Institute estimation method to estimate the fatigue life of solder joints, the results are compared with those calculated by the finite element method. [ABSTRACT FROM AUTHOR]

The integrity of solder joints of components in an electronic device is critical to the device reliability. The miniaturisation trend in the development of electronic products has continued to challenge the shear strength of the solder joints in these devices and necessitates implementation of optimal reflow profiles to achieve maximum joint strength. This study proposes an optimal parameter combination of reflow profile factors which demonstrate potential for delivering maximum shear strength of solder joints. The Taguchi design of experiment (DoE) is employed to generate eight orthogonal array designs of L24 reflow profiles. The factors/parameters investigated are preheat gradient, time above liquidus (TAL), peak temperature and cooling rate. Three test vehicles of varying solder joint sizes are made from R1206, R0805 and R0603 resistors. Reflow profile number 3 constituting 1.2°C/s preheat, 45 s TAL, 245°C peak temperature and 60% cooling rate is optimal because it yielded joints with the highest strength and ca. 4 µm intermetallic compound thickness. The solder joint shear strength decreased with a decrease in the size of the lead-free joint irrespective of the reflow profile implemented. These results will be useful for electronic packaging and reliability engineers faced with challenges of improving device operational mechanical performance in the continuing trend of product miniaturisation. [ABSTRACT FROM AUTHOR]

Gallium nitride (GaN) power devices have many benefits, including high power density, small footprint, high operating voltage, and excellent power gain capability. However, in contrast to silicon carbide (SiC), its performance and reliability can be negatively impacted by its low thermal conductivity, which can cause overheating. Hence, it is necessary to provide a reliable and workable thermal management model. In this paper, a model of a flip-chip packing (FCP) GaN chip was established, and it was assigned to the Ag sinter paste structure. The different solder bumps and under bump metallurgy (UBM) were considered. The results indicated that the FCP GaN chip with underfill was a promising method because it not only reduced the size of the package model but also reduced thermal stress. When the chip was in operation, the thermal stress was about 79 MPa, only 38.77% of the Ag sinter paste structure, lower than any of the GaN chip packaging methods currently in use. Moreover, the thermal condition of the module often has little to do with the material of the UBM. Additionally, nano-silver was found to be the most suitable bump material for FCP GaN chip. Temperature shock experiments were also conducted with different UBM materials when nano-silver was used as bump. It was found that Al as UBM is a more reliable option. [ABSTRACT FROM AUTHOR]

New diamond chip resistors have been used in high-power devices widely due to excellent heat dissipation and high-frequency performance. However, systematic research about their solder joint reliability is rare. In this paper, a related study was conducted by combining methods between numerical analysis and laboratory reliability tests. In detail, the shape simulation and thermal cycling finite element simulation for solder joints with different volumes were carried out. The optimized solder volume was 0.05 mm3, and the maximum thermal cycling stress under the optimized shape was 38.9 MPa. In addition, the thermal cycling tests with current and high temperature storage tests were carried out for the optimized solder joint, which showed good agreement with the simulation results, clarified the growth and evolution law of intermetallic compound at the interconnection interface, and proved the optimized solder joint had great anti-electromigration, temperature cycling and high temperature storage reliability. In this work, an optimized solder joint structure of a diamond chip resistor with high reliability was finally obtained, as well as providing considerable reliability data for the new type of diamond chip resistors, which would boost the development of power devices. [ABSTRACT FROM AUTHOR]

Flip-chip bonding technology has been extensively applied in the semiconductor packaging field given the recent increase in demand for electronic products requiring miniaturization and high performance. In this study, a high-temperature long-term reliability evaluation was performed to evaluate the metallurgical reaction and mechanical properties at the Sn-2.3Ag (wt%) flip-chip solder bump joints. Isothermal aging was performed for up to 2000 h at 150 °C. A Ni 3 Sn 4 intermetallic compound (IMC) was formed at the interface of the solder joints, and the thickness of the IMC layer increased as the isothermal aging time increased; however, the thickness of Ni under bump metallization (Ni UBM) layer was decreased during the growth of the IMC. Linear regression analysis showed that the growth thickness of the IMC layer and the consumption thickness of the Ni UBM layer varied linearly as functions of the square root of the isothermal aging time. Based on this analysis, the growth rate constant of the IMC layer and consumption rate constant of the Ni UBM layer were 0.000756 and 0.000303 μm/s1/2, respectively. Thereafter, shear tests were performed to evaluate the mechanical properties of the solder joints. As the isothermal aging time increased, the variation of shear strength was not large. However, the shear strength decreased slightly and then remained constant. As a result of the analysis of the fractured surface, most conditions exhibited ductile fracture behavior inside the solder bump, while in the case of specimens isothermally aged for 500, 1000, 1500, and 2000 h, cratering occurred. By observing the changes in the fracture mode, the ductile fracture behavior became less prominent, and the occurrence of cratering tended to become more prominent as the isothermal aging time increased. [Display omitted] • We assessed the long-term reliability of Sn-2.3wt.%Ag flip-chip solder bump joints. • Isothermal and shear tests evaluated the solder joints' mechanical properties. • The thickness of the IMC (solder-joint interface) increased as aging time increased. • The shear strength decreased and then remained constant as aging time increased. • Aging time led to more/less prominent ductile fracture behavioral/cratering responses. [ABSTRACT FROM AUTHOR]

The rapid development of semiconductor packaging technology has accelerated the applications of flip-chip bonding technology using fine-pitch micro bumps and Cu pillar bumps. These micro-bump systems are composed of metallic Cu and Sn. The properties of the Cu- and Sn-based bonding materials applied in these technologies have a significant effect on the mechanical properties and long-term reliability of micro-joints. This study focuses on the effects of the grain size and orientation of the Cu substrate on the formation and growth of intermetallic compounds (IMCs) at the Sn/Cu interface. The Cu substrate was annealed from 200 to 1000 °C to alter its grain size, which was measured via electron backscatter diffraction analysis. Sn-3.0Ag-0.5Cu (SAC) solder paste was printed onto the Cu substrate, and the Sn/Cu interfacial microstructure was observed by scanning electron microscopy and energy-dispersive X-ray spectroscopy after the reflow soldering process. A thin IMC formed on substrates with small grain sizes, whereas larger grain sizes resulted in the formation of thick and elongated IMCs. In addition, the IMC growth exhibited a specific directional preference in the (2 1 ̅ 1 ̅ 0) direction on substrates annealed at 1000 ℃. The effects of the Cu grain size and orientation on the interfacial reactions and growth of IMCs were compared and analyzed by observing IMCs formed at the SAC/Cu interface. Microstructural analysis revealed that controlling the Cu grain size and orientation significantly impacts the reliability of the solder joints. This study shows that the effect of grain size and orientation can be utilized to micro-solder joints, which can significantly enhance their mechanical strength and reliability. [Display omitted] • EBSD used to analyze annealed Cu substrate from 200–1000 °C to alter grain size. • Printed Sn-3.0Ag-0.5Cu (SAC305) solder paste onto the Cu substrate. • Observed SAC305/Cu interfacial microstructure by SEM and EDS. • IMC growth exhibited a specific directional preference in the (2 1 ̅ 1 ̅ 0) direction. • Compared effects of Cu grain size and orientation on interfacial reactions of IMCs. [ABSTRACT FROM AUTHOR]

In this study, we report the effect of temperature on the microstructural evolution of flip chip solder joints under a temperature gradient of 2580 °C/cm at ambient temperatures of 100 °C, 125 °C, 150 °C, 160 °C, and 175 °C. The experimental results show that no microstructural evolution of un-stressed solders was found for samples tested at ambient temperatures of 100 °C and 125 °C, whereas thermomigration induced phase separation was observed for the samples tested at 150 °C, 160 °C, and 170 °C, suggesting that the thermomigration only occurred when the ambient temperature was higher than 150 °C. The theoretical derivation indicates that the threshold temperature difference needed to trigger thermomigration is found to be decreased with an increase in the ambient temperature. In addition, at a temperature gradient of 2580 °C/cm, the theoretical calculation indicated that a threshold temperature to trigger thermomigration is about 150 °C [ABSTRACT FROM AUTHOR]

In this subject, thermosonic flip-chip technology was introduced to conduct low-temperature bonding of Ag paste and chip interconnection experiments with micro solder joints. The coating and printing method is used to realize the uniform coating of the Ag paste on the micro Cu pillars, and the thickness of the coated Ag paste can be controlled. During flip-chip bonding, different power, pressure, temperature, and bonding time will affect the shear resistance of the solder joint after bonding. Therefore, this article controls the above factors and only studies the impact of ultrasonic power and pressure on the shear force of the solder joint interface. The experiment found that before reaching the maximum shear force, as the ultrasonic power increases, the shear resistance of the solder joint also gradually increased. After that, as the ultrasonic power increased, the shear resistance of the solder joints gradually decreased. It shows that when using thermosonic flip-chip technology for chip bonding, the ultrasonic power should be maintained in an appropriate range to make the bonded flip-chip solder joints obtain a maximum shear strength. The bonding pressure is proportional to the shear strength of the solder joint. [ABSTRACT FROM AUTHOR]

The current trend of electrical devices development is progressing towards miniaturization, multi-function and high density, device integration and fine pitch in a smaller package size. This led to the invention of copper pillar bumps which acts as a connection between the dies to its corresponding substrate, which allows the fabrication of smaller semiconductor devices. The dies were mounted onto the substrate by undergoing mass reflow process where the SAC305 solder from the copper pillar bumps and substrate bumps will melt together and solidify to form a solder joint. The quality of the solder joint is influenced by the parameters that govern the reflow profile, which are ramp rate, soak time, time above liquidus time, peak temperature and cooling rate. If the reflow profile is not properly optimized, defects such as voids in the solder joint can pose a reliability issue for the packaged unit. Therefore, in this paper, ramp rate, soak time and time above liquidus of reflow profiles for die utilizing copper pillar bumps with SAC305 as its solder material was studied and optimized in finding the recommended range of each parameter of the reflow profiles that yield the least voiding in the solder joint. The experiment was conducted by varying the reflow profile parameter which are ramp rate, soak time and time above liquidus, which the solder joint cross section and X-ray images were then analysed to study its influences. Additional experiment that investigates flux outgassing rate of different flux activity levels and the influence of component standoff height and mis-alignment offset towards solder-creeping defect were conducted in this article. [ABSTRACT FROM AUTHOR]

The method of introducing ultrasonic action was used to bond the flip chip with copper pillar solder joints, and the influence of ultrasonic vibration on the structure evolution and mechanical properties of the solder joint was studied. The three-dimensional finite element analysis method was used to simulate the vibration distribution of the chip and the sound pressure distribution in the solder joints. The results indicate that the introduction of ultrasound will cause the intermetallic compound (IMCs) at the upper interface of the solder joint to be broken and thin, and the IMCs at the lower interface will grow and thicken on the original basis. At the same time, the shear strength of the solder joints first increases and then decreases with the increase of the ultrasonic power, and has little relationship with the ultrasonic action time. The introduction of ultrasound in the middle stage of the bonding process will increase the strength of the solder joint, and, in the final stage of the bonding process, will cause larger cracks in the solder joints, which will affect their strength. Simultaneously, the simulation results show that the amplitude at the edge of the upper surface of the chip is larger than that in the middle, and that the sound pressure of the solder joints at the boundary is larger than that of the middle solder joints. [ABSTRACT FROM AUTHOR]

Purpose: This study aims to study the mechanical, photoelectric, and thermal reliability of SAC307 solder joints with Ni-decorated MWCNTs for flip-chip light-emitting diode (LED) package component during aging. By adding nanoparticles (Ni-multi-walled carbon nanotubes [MWCNTs]) to the solder paste, the shear strength and fatigue resistance of the brazed joint can be improved. However, the aging properties of Ni-modified MWCNTs composite solder joints have not been deeply studied. In this research, the mechanical, photoelectric and thermal reliability of SAC307 packaged flip-chip LEDs with Ni-MWCNTs added during aging were studied. Design/methodology/approach: Compared with SAC solder alloys, the effects of different contents (0, 0.05, 0.1 and 0.2 Wt.%) of Ni-MWCNTs on the photoelectric and thermal properties of composite solder joints were examined. To study the aging characteristics of composite solder joints, the solder joints were aged at 85°C/85% relative humidity. Findings: The addition of an appropriate amount of reinforcing agent Ni-MWCNTs reduces the density of the composite solder to 96% of the theoretical value of the SAC solder alloy. In addition, the microhardness increases and the wetting angle decreases. Two different phase compositions were observed in the solder joints with Ni-MWCNTs reinforcement: Cu3Sn and (Cu, Ni)6Sn5. The solder joints of SAC307-0.1Ni-MWCNTs exhibit the highest luminous flux and luminous efficiency of flip-chip LED filaments, the lowest steady-state voltage and junction temperature. And with the extension of the aging time, its aging stability is the best. In short, when the addition amount of Ni-MWCNTs is 0.1 Wt.%, the solder joints exhibit the best wettability and the thinnest intermetallic compound layer. And the shear strength of the tested solder joints is the best, and the void ratio is the lowest. At this time, the enhancement effect of Ni-MWCNTs on the composite solder has been best demonstrated. Research limitations/implications: The content range of enhancer Ni-MWCNTs needs to be further reduced. Practical implications: The authors have improved the performance of Ni-modified MWCNTs composite solder joints. Originality/value: Composite solder with high performance has great practical application significance for improving the reliability and life of the whole device. [ABSTRACT FROM AUTHOR]

An accelerated reliability testing via thermal cycling test (TCT) was used to test ball grid array (BGA) components’ reliability. Five variables were observed; control sample J and samples K, L, M, and N were BGA component samples that have been exposed to TCT between 500 and 1250 cycles with the TCT profile in the range of 0 °C–100 °C. The crack orientation of the individual solder joint was analyzed along with the propagation path pattern on the solder array of the BGA component pad by analyzing the dye and pull test results that were then mapped and analyzed using the cardinal and ordinal directions approach. This is to determine the crack propagation path direction in the solder array and track the potential of warpage on the BGA package as the TCT cycles progressed. A cross section was performed on sample M with the 3-D X-ray and scanning electron microscopy (SEM) analysis to observe the solder joints’ fracture lines and surface topographies. The results showed that individual solder joint crack orientation is correlated to the crack propagation location on the BGA package. The solder joint from northwest (NW), northeast (NE), southeast (SE), and southwest (SW) of the BGA package is prone to solder crack compared to the solder joint array in the middle. A solder grain structure coarsening occurred at the crack propagation due to the high cyclic strain from the TCT. [ABSTRACT FROM AUTHOR]

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This paper reviewed the state-of-art copper pillar technology in flip-chip packaging, driven by the semiconductor industry's demands for thinner and faster data transmission. This technology with area array feature is a surface mount technology process used to form interconnection bonding between ball grid array chip and printed circuit board (PCB) by the reflow soldering process. The conversion of the flip-chip interconnection bump from the solder ball to the Cu pillar bump with the solder cap and the joint performance within the reflow oven are presented in this review. The simulation tools have recently facilitated the Cu pillar bump research during the PCB assembly process. Thus, this review focuses on the simulation modeling of the PCB assembly within a reflow oven using different numerical approaches. The thermal and air flow aspects of the reflow process are reviewed. The temperature distribution and the thermal stress condition of the PCB assembly within the reflow oven are predicted to understand better the fluid–structure interaction in the reflow oven. The considerations of air flow and thermal effects enhanced the study of fluid flow on the PCB assembly. Moreover, the Cu pillar technology challenges are also highlighted in this review. This review paper is expected to provide necessary information and direction to future researchers and industrial engineers when designing a brand-new surface-mounted component. [ABSTRACT FROM AUTHOR]

The mechanical and fatigue properties of microelectronic interconnection materials are important issues in critical applications in the life of electronic assemblies. Due to the growth in the applications of electronic components in new technological products used in tough conditions, evaluating the reliability of solder alloys has become crucial to the prediction of product life. SAC (Sn-Ag-Cu) solder alloys are common lead-free alloys used to form solder joints. In the current study, the reliability of individual SAC305 solder joints in actual setting conditions with an organic solderability preservative (OSP) surface finish was examined using an accelerated shear fatigue test at different load levels (16 MPa, 20 MPa, and 24 MPa). Four operating temperature levels (−10, 25, 60, and 100 °C) were also used. Seven samples were utilized at each experimental condition. An orthogonal array (L12) was employed for this experiment. The fatigue behavior of the SAC305 solder joints in actual setting conditions was described by a two-parameter Weibull distribution. The characteristic life and the shape parameter were extrapolated from the Weibull distribution for each experimental condition. Characteristic life was employed to represent the fatigue resistance of the solder joints. For each sample, the inelastic work per cycle and plastic deformation were determined. The results indicated a notable increase in the inelastic work per cycle and the plastic strain as a result of increasing either the stress load or the working temperature. Combinations of stress amplitude, working temperature, inelastic work, and plastic deformation were applied as inputs to the fuzzy system for computing a comprehensive output measure (COM-Value) using the Mamdani method. A negative relationship was observed between the solder life and the four fuzzy inputs. To fuzzify the inputs of the fuzzy system, two membership functions, "MFs", were formed for each input, and five MFs were set for the output. The center-of-gravity (COG) theorem was utilized as a defuzzification method in the fuzzy inference system. The characteristic life of the solder joints was predicted by the COM-Value, which was used as an independent variable. Finally, The COM-Value was used to generate a general predicted reliability model for SAC305 solder joints with an acceptable model adequacy index. [ABSTRACT FROM AUTHOR]

Solder joints of Au-20wt%Sn (Au-20Sn) between real light-emitting diode Si chips and AlN substrates were fabricated using thermo-compression (TC) bonding. We investigated the microstructure of TC-bonded solder joints using scanning electron microscopy, transmission electron microscopy (TEM), and scanning transmission electron microscopy (STEM) and its effect on shear strength. The metallization system for the Au-20Sn solder consisted of Pt/Ti thin films on Si chips and an electroless Ni/Pd/Au layer on AlN substrates. The TC bonding was carried out at 280, 290, 300, and 310 °C for 0.2, 0.6, and 1.2 s. Samples were aged at 200 °C for up to 1000 h in a conventional oven. The performance of the solder joints was sensitive to joining temperature. When the solder joint was formed at a relatively low temperature, shear strength was low due to the unbonded regions in the solder joints. The shear strength increased with joining temperature and time. When the solder joints were formed at a relatively high temperature, shear strength was high. The solder joints were composed of δ-phase at both interfaces and ζ'-phase at the center. After aging at 200 °C for up to 1000 h, shear strength slightly decreased. The main fracture modes before and after aging were Si cohesive fracture and interfacial fracture between Si and Ti, respectively. TEM and STEM clearly indicated that the Pt layer remained at the solder interface after aging. The high shear strength was attributed to the strong interface between Pt and the Au-20Sn solder. [ABSTRACT FROM AUTHOR]

This paper investigates the influence of the welding process on the microstructure and mechanical properties of Au/Sn–3.0Ag–0.5Cu/Cu solder joints. In this study, the flip-chip LED chip and the substrate were connected by a heating platform, hot air reflow, and vacuum reflow soldering methods to form Au/Sn–Ag–Cu/Cu composite solder joints. Sn–3.0Ag–0.5Cu is selected as the solder. The microstructure of the solder joint interface and the inferred surface is studied to characterize the influence of different welding methods on the intermetallic compound (IMC) interface. The void ratio of the flip-chip solder layer was tested to characterize the effect of the effective connection area between the chip and the solder joint on the shear strength. The experimental results show that the void ratio of the solder joints welded by the heating platform is as high as 26%, the IMC interface thickness is higher, and the diffusion coefficient of the solder is the lowest. The void distribution of hot air reflow soldering joints is relatively uniform, and there is less solder residue on the fractured surface. Vacuum reflow soldering has the lowest void rate in the solder joints, and the solder joints have flat cross sections with almost no solder residues. The fracture occurs at the lower layer of solder. Considering comprehensively, when the soldering method is vacuum reflow, the IMC layer of the flip-chip solder joint is the thinnest, and the diffusion coefficient of the solder is the highest. There are almost no voids in the solder layer, and the mechanical properties of the solder joint are the best. At this time, the photo-thermoelectric parameters of the filament are the best, and the performance is the most stable and reliable. [ABSTRACT FROM AUTHOR]

High entropy alloy (HEA) receives noticeable attention in the electronic industry, and one of the best ways to incorporate HEA with the existing assembly setup is to reinforce HEA particles in Pb-free solder. This paper investigates the properties of Sn3.5Ag0.5Cu (SAC 305) solder reinforced with HEA particles. FeCoCrNiCu particle was synthesized via ball milling and dispersed in SAC 305 paste by powder mixing technique. DSC analysis confirms a reduction in melting temperature and undercooling with the addition of HEA. The dispersion of HEA in the solder resulted in a significant refinement in β-Sn grain size, Ag3Sn, and Cu6Sn5 IMC particle size. Also, SAC 305 with 0.2 wt% HEA noted a better spreading performance and lowest contact angle. 1608 chip capacitor/HEA reinforced solder joint was assembled, subjected to − 40 to + 125 °C thermal shock, and tested for the shear strength. The reliability analyzed through Weibull analysis showed a 30% increase in the 75% survival probability strength for HEA-added joints. Also, HEA addition till 0.1 wt% suppressed the growth of (Cu, Ni)6Sn5 IMC after thermal shock cycles. After 1000 thermal shock cycles, 0.1 wt% HEA-added solder retained the shear strength of 22.5 MPa, equivalent to the strength exhibited by the SAC 305 in the as-reflow condition. [ABSTRACT FROM AUTHOR]

In order to control the interfacial intermetallics of the commonly used soldering joint in the electronics packaging products, copper and nickel-plated copper were selected as the substrates, SAC305 was selected as the solder, and a series of experiments were conducted. The pure copper was plated with nickel and then the nickel-plated copper substrate was heat-treated before reflow soldering. Effects of substrate heat treatment on reflow soldering and aging of the soldered joints were studied. The results show that the heat treatment of nickel-plated copper substrate before reflow soldering can enhance the adhesion between the substrate and the plated coating and it can inhibit the growth of interfacial intermetallic compound (IMC). In the aging process, the IMC layer thickness of the soldered joint without heat treatment on the substrate before reflow is thicker than that of the soldered joint with heat treatment before reflow. The IMC growth rate of the interfacial layer of the soldered joint without heat treatment on the substrate before reflow is 5.854 × 10–17 m2 s−1; the IMC growth rate of the interfacial layer of the soldered joint with the substrate heat-treated before reflow soldering is 3.193 × 10–17 m2 s−1. In the shear test, the shear strength of the solder joints with heat treatment on the substrate before reflow soldering is higher than that of the solder joints without heat treatment before reflow soldering. [ABSTRACT FROM AUTHOR]

The viscoplastic Anand model contains the nine parameters: HT ht , According to the formula derivation, the parameters of the constitutive equation model of the nanosilver matrix are as follows5: 9.81, 5709, 0.6572, 0.00326, 11, 67.389, 15,800, 2.768, and 1. It is shown that the fatigue life of silver tin paste solder joints is significantly higher than that of pure nanosilver paste solder joints. For equation (c), the initial crack size is I a i SB I 0 i sb integral to critical dimension I a i SB I c i sb ; there is11: HT ht (d); the fatigue life HT ht can be obtained from equation (d). [Extracted from the article]

The main purpose of this paper is the analysis of the electrical resistivity of solder joints depending on various surface finishes and on the number of reflow processes. The electrical resistivity was determined after 1, 2, 3, 5 and 6 reflow cycles as a replacement for the basic accelerated aging test. In this article, various surface finishes are compared by measuring electrical resistivity of solder joints between two soldering pads. The influence of standard surface finishes (ENIG, Lead HASL, Lead-free HASL, Cu, ImSn) with the new developed surface finish based on SnAg7 is also compared. Measurements show that the electrical resistivity is dependent on surface finish type and the thickness of the solder joint. The results prove that the new developed surface finish based on SnAg7 is stable against multiple reflows and comparable to the surface finish based on Au. The new developed surface finish based on SnAg7 can be recommended as a replacement for other conventional surface finishes. [ABSTRACT FROM AUTHOR]

In the actual production process, soldering is a key step in the flip-chip packaging process. The reliability of the interconnection interface of flip-chip LED chips is considered to be one of the most important reliability issues. This paper studies the influence of different soldering temperatures on the microstructure and shear behavior of the Au/Sn-3.0Ag-0.5Cu/Cu solder joints of flip-chip LED chips. The lead-free solder Sn-3.0Ag-0.5Cu was selected as the solder. The microstructure of the intermetallic compound (IMC) interface and the inferred surface of the solder joint is observed, and the microstructure evolution of the solder joint is analyzed. The void ratio of the solder joints at 250°C, 260°C, 270°C, 280°C, and 290°C soldering temperature was tested to characterize the influence of the contact area between the chip and the solder joint on the shear stress. In addition, the solder joints were aged for 1000 hours in an environment with a relative humidity of 85°C/85%, and a shear test was performed to evaluate the influence of the interface reaction on the mechanical reliability of the solder joints during the isothermal aging process. The research show that when the soldering temperature is 270°C, the Au on the bottom of the chip, and the solder and Cu on the substrate have fully reacted, and the solder joints have high shear resistance. The shear strength of the aging solder joints increases first and then decreases, because the high temperature repairs the defects in the solder layer caused by the low soldering temperature to a certain extent. With the extension of aging, cracks and voids gradually appear at the fracture interface, and the effective contact area decreases. The shear strength of the solder joint decreases, and the fracture mode becomes brittle. [ABSTRACT FROM AUTHOR]

In the 3D integrated circuit package industry, the remelting of solder joints during repeated stacking processes can cause electrical failure and low bonding strength. Transient liquid phase sintering (TLPS) bonding based on forming full intermetallic compounds (IMCs) in the solder joint to increase the remelting point has emerged as a potential solution to this issue. Here, pressureless TLPS Cu-Cu bonding was conducted with Sn-3.0Ag-0.5Cu solder powders and various Ag flake powder content (15 wt.%, 30 wt.%, 45 wt.%, and 60 wt.%). The TLPS paste was screen-printed and the bonding process was conducted at 255°C for 2 h in an air atmosphere without bonding pressure. Additionally, this study investigated the microstructural evolution and fracture modes of the TLPS joints after the shear tests were investigated. High-temperature storage tests were conducted at 300°C for 24 h, 48 h, and 96 h, and a shear test was then performed to evaluate bonding strength. A differential scanning calorimetry analysis of the TLPS paste was conducted to investigate the thermal behavior of the paste during the bonding process. No residual solder was found in TLPS joints with an Ag flake content above 45 wt.% The highest bonding strength in a TLPS joint with full IMC layers was 27.3 MPa, representing an approximately 9% decrease after 96 h of high-temperature storage test. TLPS bonding with an optimal composition was resistant to the remelting of solder joints due to the full IMC layers, i.e., it represents a reliable interconnection method for 3D stacking. [ABSTRACT FROM AUTHOR]

• The paper introduces a novel approach to enhance the accuracy and speed of detecting void defects in chip resistor solder joints. • Addressing the challenges of current deep learning-based methods for chip resistor void defect detection, a deep convolutional neural network named CA-net is devised, incorporating multiscale convolutional attention and edge supervision. • The study proposes an MSCA module that integrates multiscale feature fusion, large-kernel convolution, and convolutional attention. • To tackle the issue of deep networks attenuating edge features, an edge supervision method is proposed to enhance the extraction and utilization of edge features by the network. • The presented method consistently maintains a high level of accuracy in chip resistor void defect detection, even when applied to different models of chip resistors, ensuring a consistently high level of precision. The presence of voids inside solder joints in chip resistors can affect the stability and reliability of the product. Therefore, accurate void and spot segmentation is crucial for performance evaluation. In this study, we propose Convolutional Attention Network (CA-net) with edge supervision for void and spot segmentation based on X-ray images of chip resistors. First, CA-net has an encoder-decoder architecture and use skip connections to aggregate low-level features and high-level features. Second, the multi-scale convolutional attention modules (MSCA) are employed at each encoder and decoder to capture multi-scale feature maps of voids and spots. Finally, adding edge-supervised branch to the encoder allows the network to focus more on edge information, so that the response area of the network will be more focused on pads and empty areas. Experimental results show that CA-net outperforms other methods in void and spot segmentation, achieving 96.56 % MIOU and 97.44 % mean DIC. These results indicate that CA-net is a promising approach for accurate void and spot segmentation in chip resistors based on X-ray images. [ABSTRACT FROM AUTHOR]

This paper investigates the effect of grain size on the evolution and shear behavior of lead-free solder joints. The grain size of the solder is 2-11 μm, 5-15 μm, 15-25 μm, respectively. The interface structure of the solder joint and the microstructure of the inferred surface are analyzed. The void ratio of the flip-chip solder layer is tested. In order to study the change of shear strength and fracture surface, the solder/copper joint was subjected to isothermal aging treatment (1000 h) under the environment of relative humidity of 85 °C/85%. The results show that the smaller the solder crystal grains, the larger the surface area of the crystal grains per unit mass. Because of the action of the liquid bridge force, tin powder agglomeration is prone to occur, which leads to a high void rate of the solder layer. At this time, a higher activity flux is required to remove oxides. Highly active flux (NC559-TPF) was added and verified. When the grain size is 5-15 μm, the solder paste has the best soldering performance. After the filament is aged for 1000 h, the junction temperature is the lowest. Secondly, the blue light flux is the highest. [ABSTRACT FROM AUTHOR]

The influence of the soldering temperature on the performance of flip-chip light-emitting diodes (FC-LED) filaments soldered with SAC0307 has been investigated. Scanning electron microscopy (SEM) images, void rates, shearing force, junction temperature, steady-state voltage, blue light luminous flux, and luminous efficiency were measured to characterize the filament performance. The microstructure of the fracture surface after shear failure of the FC-LED filament joints soldered at 250°C and 270°C showed the lowest percentage of voids and was smoother than for the other groups. The shearing force of the FC-LED filament solder joints formed at 250°C and 270°C was higher than that for the other three groups, but the shearing force of all five groups of solder joints exceeded 200 gf. The steady-state voltage and junction temperature of the 250°C and 270°C FC-LED filaments were lower than those of the other three groups, and the blue light luminous flux of the 250°C and 270°C FC-LED filaments was higher than for the other three groups. In conclusion, the FC-LED filaments exhibited good photoelectric performance and thermal reliability when using soldering temperatures between 250°C and 270°C. [ABSTRACT FROM AUTHOR]

Purpose: The purpose of this paper is to find the optimum inverter type as the solder joint reliability point of view. Design/methodology/approach: In this paper, finite element model(ing) simulations supported with power cycling aging experiments were used to demonstrate the best inverter type as the solder joint reliability point of view. Findings: It was found that inverter types highly affect the solder joint health during its nominal operating. Originality/value: The authors confirm the originality of this paper. [ABSTRACT FROM AUTHOR]

Void formation is a critical reliability concern for solder joints in electronic packaging. The control of microstructures and the quantity of impurities in Cu electroplated films significantly affect void formation at the joint interface, but studies investigating these factors are rare. In this study, three Cu films (denoted as A, B, and C) are fabricated using an electroplating process. The Cu A film has a faceted grain texture embedded with twin boundaries, while Cu B and C films have similar columnar textures. After thermal aging at 200 °C for 1000 h, the SAC 305 (Sn-3.0Ag-0.5Cu) solder joints with Cu A and B films exhibit robust interfacial structures without voids. However, microstructural collapse is observed in the solder joint of SAC 305/Cu C, where many crevices are formed parallel to the interface. Based on the microanalysis, the concentration of impurities is higher in Cu C than in Cu A and B. Moreover, discrete voids rather than continuous crevices are present in the SAC305/Cu C system when the impurity concentration in Cu C is reduced. The findings demonstrate that impurity control in Cu electroplated film is critical for the control of void/crevice formation in electronic solder joints. [ABSTRACT FROM AUTHOR]

Thermal compression bonding (TCB) has been widely used in flip chip bonding processes for three-dimensional integrated packaging. Therefore, studying the TCB process and solder joint structure is significant for improving reliability. In this study, a Ni layer was deposited between the Cu/Sn-3.5Ag solder bumps of upper and lower chips, and TCB process tests were carried out at different bonding temperatures, forces and times. The solder height at the top and bottom of the copper pillar were recorded. Through the establishment of a mathematical analysis model, the relationship between the solder joint height and maximum stress was analyzed theoretically, and the trend of the shear stress and solder joint height was obtained from die shear tests. Then, the solder joint morphology, strength and microstructure composition of the microbumps were observed after aging. Our results showed that the growth rate of intermetallic compounds (IMCs) for Cu/Sn-3.5Ag microbumps with a 25 μm diameter was 2.5 times those with a 100 μm diameter and that the Ni barrier layer prevented the diffusion of Cu in Sn-3.5Ag solder. In addition, the Ni layer improved the strength of the Cu/Sn-3.5Ag joints after aging. Finally, with extended aging time, the fracture site was found to move from the solder region to the Cu6Sn5 layer for the Cu/Sn-3.5Ag samples, while it remained at the Sn-3.5Ag/IMC interface for the Cu/Ni/Sn-3.5Ag samples. [ABSTRACT FROM AUTHOR]

The capability to standardize the fracture strength of solder joints is an effective tool to investigate the reliability of electronic devices. To achieve this purpose, in this research, the influences of joint arrangement (loading arm and load sharing) on the level of constraint imposed on joint deformation, fracture energy, and generally, fracture behavior of solder joints were investigated. Fracture behavior of solder joints using double-cantilever-beam (DCB) specimens as a function of loading arm and load sharing (i.e., the distance between two solder joints) was studied under mode I loading conditions at a strain rate of 0.03 s−1. By increasing the loading arm, the fracture force, Fci, decreased linearly, while the critical strain energy release rate for crack initiation, Jci, increased from a loading arm of 12.7 mm to 38.1 mm and then remained almost unchanged for loading arms of 38.1 mm to 71.1 mm. Plastic deformation in the solder layer and criteria such as opening stress (i.e., the predominant stress component in DCB specimen) and stress triaxiality factor were calculated. It was shown that for the larger loading arms (from 38.1 mm to 71.1 mm), the fracture behavior was as a normal DCB specimen (i.e., the normal stress caused by bending was predominant and normal stress caused by tensile loading could be ignored). For the loading arm of less than 38.1 mm, the fracture behavior was similar to that of tensile-type specimens (i.e., the normal stress caused by bending decreased significantly by decreasing the loading arm and normal stress caused by tensile loading became considerable). Variations in the distance between two solder joints did not affect the Jci value, while Fci was influenced by the joint arrangement. This behavior was attributed to stress distribution in the solder layer. [ABSTRACT FROM AUTHOR]

This paper investigates the effect of soldering temperature on solder joint voids and reliability of flip-chip LED chips during reflow soldering. Lead-free solder SAC305 was used as solder paste. The void ratio of the flip-chip LED solder joint at 250°C, 260°C, 270°C, 280°C, and 290°C reflow soldering temperatures was detected by x-ray detector. Shear tests were conducted to evaluate the influence of interfacial reactions on the mechanical reliability of solder joints. The distribution of voids in the shear section was observed by scanning electron microscope (SEM). Next, the photoelectric and thermal properties of FC-LED filament were tested and analyzed. Finally, a high-temperature and high-humidity aging experiment was carried out to test the reliability of the LED filament. The results show that the void ratio of the LED filament soldering joint is the lowest when the soldering temperature is 270°C. The small void ratio of the solder joints results in lower steady-state voltage and junction temperature of the flip-chip LED filament. As the void density in the solder joint decreases, the shear strength of the solder joint increases. At this time, the shear resistance and mechanical reliability are the highest. [ABSTRACT FROM AUTHOR]

The influence of Al2O3 nanoparticles addition in trace amounts and electroless Ni–P substrate coating on the microstructure development and bond shear strength of Sn-3.0Ag–0.5Cu (SAC305) solder joint were investigated. The performance and reliability of the 2220-capacitor joints with Al2O3 nanoparticle reinforced nanocomposites reflowed on Cu and Ni–P coated substrate were analyzed under varying high-temperature environments. The addition of nanoparticles enhanced the wettability and microhardness of the solder and considerably refined the joint microstructure. The dispersion and adsorption of Al2O3 nanoparticles resulted in the suppression of intermetallic (IMC) growth at the interface and refinement of the β-Sn grains as well as IMC precipitates into the matrix. The Ni–P coating on the substrate significantly retarded the IMC growth kinetics resulting in the formation of a thin and uniform IMC layer at the joint interface. The thermal stability and performance of the joint under high-temperature environments were enhanced due to the Ni–P coating on the substrate. Compared to the unreinforced SAC305 solder joint with bare Cu substrate, joints with SAC305 + 0.05Al2O3 composite showed about 17% higher shear strength with bare Cu substrate and about 27% higher strength with Ni–P coated substrate. The Weibull distribution analysis indicates a significant improvement in joint reliability of the 2220-capacitor/SAC305 solder assembly using SAC305 + 0.05Al2O3 nanocomposite and Ni-coated substrate. The ANOVA study suggests that the solder joint performance majorly depends on the operating environment, solder composition, and the substrate finish. [ABSTRACT FROM AUTHOR]

Due to the increased complexity and optimization in microprocessor packaging from 2D to 3D packages, the size of solder joints is being reduced significantly. This trend currently leads to an increased amount of current density across flip-chip solder joints as well as microbumps and causes electromigration-oriented void formation and subsequent failure of the solder joints. It has been observed from literature that solder material undergoes microstructure evolution and subsequent degradation of mechanical properties under isothermal aging conditions. The current study is based on the effects of material property degradation due to thermal aging of flip-chip Sn-Ag-Cu (SAC) solder joints on electromigration-oriented failure. Finite element analysis has been used to analyze the diffusion characteristics of a SAC solder joint under isothermal aging conditions of 100°C for a period of 1–20 days, and electromigration simulation has been performed at two different temperatures of 100°C and 125°C for 100 h at an input current range of 0.01–0.05 A. The effect of intermetallic compound (IMC) layer thickness is analyzed to reveal the impact on electromigration-oriented failure in isothermally 60 days long aged solder bumps. Results have revealed that resistance to electromigration-oriented failure is higher in the case of aged components compared to unaged components along with the increment of time to failure with IMC formation in the SAC solder joint. [ABSTRACT FROM AUTHOR]

Purpose: This paper focuses on the reliability of the solder joint after the self-alignment phenomenon during reflow soldering. The aim of this study is to analyse the joint quality of the self-alignment assemblies of SnAg alloy solder joints with varying silver content. Design/methodology/approach: The shear strength assessment was conducted in accordance with the JIS Z3 198-7 standard. The standard visual inspection of IPC-A-610G was also performed to inspect the self-alignment features of the solder joint samples. Statistical analysis was conducted to determine the probabilistic relationship of shear strength of the misalignment components. Findings: The results from the mechanical reliability study indicate that there were decreasing trends in the shear strength value as misalignment offset increased. For shift mode configuration in the range of 0-300 µm, the resulting chip assembly inspection after the reflow process was in line with the IPC-A-610G standard. The statistical analysis shows that the solder type variation was insignificant to the shear strength of the chip resistor. The study concluded that the fracture occurred partially in the termination metallization at the lower part of the chip resistor. The copper content of the joint on that area shows that the crack occurred in the solder joint, and high silver content on the selected zone indicated that the fracture happened partially in the termination structure, as the termination structure of the lead-free chip resistor consists of an inner layer of silver and an outer layer of tin. Practical implications: This study's findings provide valuable guidelines and references to engineers and integrated circuit designers during the reflow soldering process in the microelectronics industry. Originality/value: Studies on the effect of component misalignment on joint mechanical reliability are still limited, and studies on solder joint reliability involving the effect of differing contents of silver on varying chip component offset are rarely reported. Thus, this study is important to effectively bridge the research gap and yield appropriate guidelines in the potential industry. [ABSTRACT FROM AUTHOR]

In order to improve the mechanical behavior of the low-temperature Sn 5 8 Bi (SnBi) lead-free solder joint, the Sn 0. 7 Ag 0. 5 Cu 3. 5 Bi 0. 0 5 Ni (SACBN) solder ball with the diameter of 400  μ m was pre-soldered on Cu to obtain the SnBi/SACBN/Cu composite joint. The microstructure and shear behavior of the solder joints were investigated. Experimental results indicate that SnBi solder is well bonded on the SACBN bump due to the elemental diffusion and dissolution between the molten SnBi and solid SACBN bump during the soldering process. The addition of the SACBN bump shows a significant effect on the formation and growth of the β -Sn grains in the SnBi bulk. Compared with the SnBi/Cu joint, the SnBi bulk in the composite joint shows enlarged β -Sn dendritic grains. Meanwhile, the interfacial intermetallic compound (IMC) layer transforms from Cu6Sn5 into (Cu, Ni)6Sn5. Among these three solder joints, the shear strength of the SACBN/Cu joint is the highest, reaching 86.7 MPa. The shear strength of the SnBi/Cu solder joint is enhanced by the SACBN bump from 68.2 MPa to 75.2 MPa. Additionally, the addition of the SACBN bump shows a positive effect on suppressing the brittleness of the SnBi/Cu solder joint. [ABSTRACT FROM AUTHOR]

In this study, the effect of appropriate Nd addition on improving the high-temperature reliability of Sn-3.8Ag-0.7Cu (SAC387)/Cu solder joint after aging treatment was investigated. The interfacial microstructure of solder joint was refined with proper addition of Nd. This phenomenon could be explained as the adsorbing-hindering effect of surface-active Nd atoms which blocked the growth of brittle intermetallic compounds (IMCs) in the solder joint. Theoretical analysis indicated that 0.05 wt. % addition of Nd could distinctly decrease the growth constant of Cu6Sn5 IMCs and slightly decrease the growth constant of Cu3Sn IMCs respectively. The shear force of SAC387-0.05Nd/Cu solder joint was evidently improved compared with the origin solder joint. In addition, SAC387-0.05Nd/Cu solder joint maintained excellent mechanical property compared with SAC387/Cu solder joint even after 1440 h aging treatment. [ABSTRACT FROM AUTHOR]