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The influence of SiO2 and SiNx cover layers on the dopant distribution as well as microstructure of high fluence Ga implanted Si after thermal processing is investigated. The annealing temperature determines the layer microstructure and the cover layers influence the obtained Ga profile. Rapid thermal annealing at temperatures up to 750°C leads to a polycrystalline layer structure containing amorphous Ga-rich precipitates. Already after a short 20?ms flash lamp annealing, a Ga-rich interface layer is observed for implantation through the cover layers. This effect can partly be suppressed by annealing temperatures of at least 900°C. However, in this case, Ga accumulates in larger, cone-like precipitates without disturbing the surrounding Si lattice parameters. Such a Ga-rich crystalline Si phase does not exist in the equilibrium phase diagram according to which the Ga solubility in Si is less than 0.1 at. %. The Ga-rich areas are capped with SiOx grown during annealing which only can be avoided by the usage of SiNx cover layers. [ABSTRACT FROM AUTHOR]

Flash lamp annealing in the millisecond regime of heteroepitaxial silicon carbide on silicon structures involves melting the silicon below the SiC layer, but the deep faceted nature of the liquid-solid interface leads to unacceptable surface roughness. This paper describes a method of controlling melting by implanting a high dose of carbon at a controlled depth below the Si/SiC interface, which significantly alters the melting characteristics of the silicon. This technology has also been applied to SiC and Si multilayer heterostructures. Results confirm the effectiveness of this approach for increasing surface uniformity, making liquid phase processing compatible with standard device fabrication techniques. A thermal model has also been developed to describe this process and results indicate that the theoretical work is consistent with the experimental evidence. The model is a valuable tool for predicting the onset of melting, maximum temperatures, and process windows for controlled liquid phase epitaxy. [ABSTRACT FROM AUTHOR]

This paper describes the development of a thermal model for flash lamp processing of 3C-SiC on silicon substrates in the millisecond regime, the FLASiC process. The model is a numerical solution of the enthalpy equation, using a modified implicit Crank-Nicholson scheme to combine accurate prediction of melt depths with reasonable computation times. The model has been calibrated against experiments and then used to compute the temperature distribution in the wafer during annealing. The results show the time and extent of melting as a function of layer thickness, wafer preheat temperature, and pulse intensity and duration. The kinetics of melting and regrowth have also been considered. [ABSTRACT FROM AUTHOR]

Abstract: In this paper, we use large area light pulse induced melting of deposited thin silicon films on oxidised silicon wafers to prepare coarse grained dendritic crystal structures. The results show that the addition of carbon prevents the agglomeration of the molten silicon films and largely influences the crystallisation process. The low solubility of carbon in liquid silicon and its effect on the silicon melting temperature induces a distinctive lateral dendritic grain growth. XTEM, SEM, AFM and ToF-SIMS investigations have been performed to study the crystallisation process and to characterise the resulting film structure. [Copyright &y& Elsevier]

Systematic features of endotaxial growth of intermediate germanium layers at the bonding interface in the silicon-on-insulator structure consisting of buried SiO2 layer implanted with Ge+ ions are studied in relation to the annealing temperature. On the basis of the results for high-resolution electron microscopy and thermodynamic analysis of the Si/Ge/SiO2 system it is assumed that the endotaxial growth of the Ge layer occurs via formation of a melt due to enhanced segregation and accumulation of Ge at the Si/SiO2 interface. Effect of germanium at the bonding interface on the Hall mobility of holes in silicon layers with nanometer-scale thickness is studied. It is found that the structures including the top silicon layer with the thickness 3–20 nm and incorporating germanium feature the hole mobility that exceeds by a factor of 2–3 the hole mobility in corresponding Ge-free silicon-on-insulator structures. [ABSTRACT FROM AUTHOR]

Abstract. The lattice damage of silicon produced by ion implantation at extremely high current density of 0.8 A/cm[sup 2] (2.5 x 10[sup 18] cm[sup -2] s[sup -1]) was investigated. In a focused ion beam system, implantation was carried out with 70 kev Co ions, fluences of 1.2 x l0[sup 16]cm[sup -2] and 6.7 x 10[sup 15]cm[sup -2] into Si (111) at room temperature and elevated temperatures between 355 Celsius and 400 Celsius. Radiation damage measurements were performed by Rutherford backscattering/channeling spectroscopy and micro-Raman analysis. The radiation damage was studied as a function of pixel dwell-time and implantation temperature. The critical temperature for amorphization increases with current density. Although the fluence of the focused ion implantation was constant, crystalline layers were obtained for short and amorphous layers for long pixel dwell-times. The critical dwell-time of crystalline/amorphous transition increases with implantation temperature. From the results a typical time for deflect annealing of 10[sup-5] s at 400 Celsius and an activation energy of (2.5 +/- 0.6) eV were deduced. [ABSTRACT FROM AUTHOR]

We report on superconducting properties of gallium-enriched silicon layers in commercial (100) oriented silicon wafers. Ion implantation and subsequent rapid thermal annealing have been applied for realizing gallium precipitation beneath a silicon-dioxide cover layer. Depending on the preparation parameters, we observe a sharp drop to zero resistance at 7 K. The critical-field anisotropy proofs the thin-film character of superconductivity. In addition, out-of-plane critical fields of above 9 T and critical current densities exceeding 2 kA/cm2 promote these structures to be possible playgrounds for future microelectronic technology. [ABSTRACT FROM AUTHOR]

It is generally believed that the 1.5 μm Er luminescence is enhanced by transferring energy from Si nanocrystals to the nearest Er3+ ions in Er-doped Si-rich SiO2 layers during optical pumping. Here, the influence of Ge nanocrystals instead of excess Si in the same environment is studied using electroluminescence technique on metal-oxide-semiconductor structures. An increase of the 400 nm electroluminescence intensity with a concomitant reduction of the Er-related emission is observed. This is explained in the light of an inverse energy transfer process from Er3+ to the Ge-related oxygen-deficiency centers. [ABSTRACT FROM AUTHOR]

Heavily Ga implanted Si nanolayers covered with a thin SiO2 layer exhibit a superconductor-insulator transition in dependence on annealing conditions. The transition characteristics resemble those of ultrathin quench-condensed metal films although the implanted layer differs clearly in composition, width, and nanostructure. This implies a general physical mechanism for the superconductor-insulator transition in thin, disordered layers which is supposed to be a quantum phase transition between dual states-the superconducting and the superinsulating one. There is a resistance criterion for the phase transition closely associated with a critical hole concentration. [ABSTRACT FROM AUTHOR]

Abstract: Thin polycrystalline silicon films are attractive for the fabrication of active matrix liquid crystal displays. We propose the use of flash lamp annealing to crystallize amorphous silicon layers on glass substrates as a low-cost manufacturing route. In this process, amorphous silicon can be crystallized both by solid phase crystallization (SPC) and in the super lateral growth (SLG) regime. We present a thermal model which incorporates the phase transitions during annealing and we have shown that predictions from the model are in good agreement with experimental observations. In addition, the model is a valuable aid to optimizing the process conditions. [Copyright &y& Elsevier]

Abstract: The use of 3C-SiC wafers for device fabrication has been restricted by the high defect density in the substrates. Flash lamp annealing (the FLASiC process) has been shown to reduce the defect density in 3C-SiC by at least an order of magnitude. This process involves melting a layer of silicon in contact with the 3C-SiC layer on a time scale of milliseconds and the subsequent regrowth of the SiC layer by liquid phase epitaxy. This paper shows how the transport of carbon in the liquid silicon is determined by the structure of the starting substrate and process conditions. The movement of carbon controls the dissolution and regrowth of the SiC and determines the morphology of the regrown film. [Copyright &y& Elsevier]

Ga-rich layers in Si were fabricated by 80 keV Ga implantation through a 30 nm SiO2 cover layer and subsequent rapid thermal annealing for 60 s in a temperature range between 500 °C and 1000 °C. Fluences of 2x1016 cm-2 and 4x1016 cm-2, leading to Ga peak concentrations of 8 at. % and 16 at. %, are chosen. Residual damage in the implanted layers and the Ga distribution were investigated by Rutherford-backscattering spectrometry in combination with ion channeling, cross-sectional electron microscopy, and x-ray photoelectron spectroscopy. Temperature-dependent Hall-effect measurements were carried out in order to determine the electrical properties of the implanted layers. It is shown that annealing at temperatures up to 800 °C leads to the formation of polycrystalline layers containing random distributed amorphous clusters. At the Si/SiO2 interface a dense and narrow band of Ga-rich clusters is observed. For 4 x 1016 cm-2 the amount of mobile Ga is higher than for 2x1016 cm-2 and an increase of the cluster density at the Si/SiO2 interface was found. Due to the higher cluster density for 4x1016 cm-2 this interface layer can become superconducting below 7 K with critical fields exceeding 9 T at optimized annealing conditions. Critical currents are above 1 kA/cm² and therefore this seems to be a possible material system for future microelectronic applications. After annealing at 900 °C and above, the implanted layers are single crystalline and no amorphous precipitates were detected. [ABSTRACT FROM AUTHOR]

Abstract: Flash-lamp annealing (FLA) on a millisecond time scale has been shown to be a promising tool in the preparation of high-quality semiconducting materials. The process imposes time varying through-thickness temperature profiles on the substrates being processed, and consequently thermal stresses. A combined thermal and optical model has been developed to predict the substrate temperature distribution and this model has been linked to a structural model to compute stresses and deflections. The paper shows how these models can be used to explore process conditions in flash lamp annealing, with particular regard to the annealing of ion implants in silicon and the crystallization of amorphous silicon layers on glass substrates. [Copyright &y& Elsevier]

Abstract: The paper gives an overview of our recent work in the field of thermal processing of advanced semiconductor structures by millisecond flash lamp annealing (FLA). Topics covered include ultra-shallow junction (USJ) formation and heteroepitaxial growth of improved quality thin films of cubic silicon carbide (3C-SiC). The latter is a new development, which opens up promising 3C-SiC growth possibilities and may lead to wider application of FLA. The so-called FLASiC process (Flash LAmp Supported Deposition of SiC) is based on a new type of nanoscale liquid-phase epitaxy at the SiC/Si interface resulting in the formation of a thin, low-defect density seed layer of SiC onto which thicker epitaxial SiC layers can be grown. [Copyright &y& Elsevier]