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This paper demonstrates that—for high-electric fields and drain current levels—the electroluminescence (EL) versus VGS curves of GaN-on-Si radio frequency HEMTs significantly deviate from the well-known bell-shape, due to the turn-on of a secondary EL process that has not been described so far in the literature. Based on the combined EL measurements, electrical characterization, and thermal analysis, we demonstrate that: 1) for moderate gate and drain voltages, the EL versus VGS curve has the characteristic bell shape, and light emission originates from hot electrons injected from the source; EL signal is stronger at the edges of the gate, due to the higher electric field; 2) at high drain/gate bias and temperature, a second process induces a monotonic increase in the EL versus VGS curve; in this case, the EL signal is stronger at the center of the gate, and the EL intensity is directly correlated with the gate leakage current. Based on the experimental evidence collected within this paper, the secondary luminescence process is ascribed to: 1) the injection of carriers from the gate metal to the channel; 2) the acceleration of these electrons by the high gate–drain field; and c) the subsequent radiative emission.

Dynamic on-resistance (RON) in heavily carbon-doped AlGaN/GaN high electron mobility transistors is shown to be associated with the semi-insulating carbon-doped buffer region. Using transient substrate bias, differences in RON dispersion between transistors fabricated on nominally identical epilayer structures were found to be due to the band-to-band leakage resistance between the buffer and the 2-DEG. Contrary to normal expectations, suppression of dynamic RON dispersion in these devices requires a high density of active defects to increase reverse leakage current through the depletion region allowing the floating weakly p-type buffer to remain in equilibrium with the 2-DEG.

The relationship between proton-induced defects and gate-lag in GaN high-electron mobility transistors (HEMTs) is examined using simulations and experiments. Surface traps are primarily responsible for the pre-irradiation gate-lag. Experimental data and detailed two-dimensional device simulations demonstrate that bulk traps increase the amount of observed gate-lag after irradiation to high-proton fluences.

We investigate how X-ray exposure impact the long term reliability of 130-nm NMOSFETs as a function of device geometry and irradiation bias conditions. This work focuses on electrical stresses on n-channel MOSFETs performed after irradiation with X-ray up to 136 Mrad(SiO2) in different bias conditions. Irradiation is shown to negatively affect the degradation during subsequent hot carrier injection. Increasing the bias during irradiation slightly reduces the impact on following electrical stress in core MOSFETs. Through device simulations, we attribute these effects to an enhanced impact ionization at the bulk-STI interfaces due to radiation-induced trapped charge and defects.

This paper studies the impact of C-doped GaN buffers on the dynamic performance and reliability of InAlN/GaN high electron mobility transistors. The analysis carried out on two different families of devices with different doping levels shows that carbon induces negligible differences in DC characteristics, which can be mainly ascribed to process variability. However, carbon doping is found to have a strong impact on the trapping characteristics: pulsed evaluation shows a significant current collapse, as well as dynamical shift in threshold voltage and transconductance drop. Drain current transient investigation reveals two main traps with apparent activation energy of 0.89 eV ( T 2 ) and 1.05 eV ( T 1 ), whose amplitudes are found to be correlated with carbon doping. A more detailed analysis suggests that trap T 2 is located in the buffer layer. And that traps behave as a line defect. Finally, the reliability tests demonstrate that the use of high carbon doping does not significantly influence the robustness of the devices with respect to DC OFF-state stress.

AlGaN/GaN field effect transistors (FETs) have shown tremendous advances in performance and reliability over recent years. They are unique in that they operate under the presence of a high density of defects, imperfect surfaces and interfaces. We review key challenges related to defects in these transistors, and recent novel characterization techniques and approaches to study the impact of these imperfections on the device thermal characteristics and reliability, as basis for developing devices with an increased safe operating area (SOA). This includes the development of a nanometer resolution junction temperature analysis using SiC solid immersion lenses, results on hot electron effects and on the role of dislocations and point defects for device reliability. In addition techniques such as dynamic transconductance to access traps near the channel are presented. The approaches shown take advantage of the complementary nature of electrical, optical and microstructural device analysis, combined with thermal and electrical device simulations.

Dynamic transconductance dispersion measurements coupled with device physics simulations were used to study the deep level acceptor center in iron-doped AlGaN/GaN high electron mobility transistors (HEMT). From the extracted frequency dependent trap-conductance, an energy level 0.7 eV below the conduction band and a capture cross section of 10(-13) cm(2) were obtained. The approach presented in this work avoids the non-equilibrium electrical or optical techniques that have been used to date and extracts the device relevant trap characteristics in short channel AlGaN/GaN HEMTs. Quantitative prediction of the trap induced transconductance dispersion in HEMTs is demonstrated.

Complementary studies of atom probe tomography, secondary ion mass spectrometry, and vertical current-voltage measurements are carried out in order to unravel the influence of C-doping of GaN on the vertical leakage current of AlN/AlGaN/GaN:C heterostructures. A systematic increment of the vertical blocking voltage at a given current density is observed in the structures, when moving from the nominally undoped conditions—corresponding to a residual C-background of ∼1017 cm−3—to a C-content of ∼1019 cm−3 in the GaN layer. The value of the vertical blocking voltage saturates for C concentrations higher than ∼1019 cm−3. Atom probe tomography confirms the homogeneity of the GaN:C layers, demonstrating that there is no clustering at C-concentrations as high as 1020 cm−3. It is inferred that the vertical blocking voltage saturation is not likely to be related to C-clustering.

Using the dynamic transconductance frequency dispersion technique, we characterize unstressed and hot-electron stressed short-channel AlGaN/GaN high-electron-mobility transistors. The results reported in this letter demonstrate that the stress-induced degradation in dc and pulsed characteristics is unlikely to be ascribable to sizable trap generation at the AlGaN/GaN interface.

We have investigated the effects of biased and unbiased X-ray irradiation on the subsequent time-dependent dielectric breakdown (TDDB) of 130-nm MOSFETs irradiated up to 1Mrad(SiO2). We found a small but measurable increase in TDDB lifetime after irradiation at the worst-case irradiation bias. The influence of radiation bias on subsequent TDDB is more significant in the PMOSFETs than the NMOSFETs. The increased TDDB lifetime and the irradiation-bias dependence are attributed to the influence of radiation-induced traps on the stressing current during the reliability testing.

We present new experimental results about channel hot carrier degradation of enclosed layout transistors as a function of previous accumulated total ionizing dose, stress temperature, and transistor geometry. We show that the parametric degradation follows a power law, whose exponent is higher than in conventional open layout transistors, possibly due to a different diffusion geometry of hydrogen. Through physical simulation we attribute this effect to the electric field at the device corners, which leads to a non-uniform impact ionization. Previous irradiation reduces the channel hot carrier degradation in MOSFETs with 5.2-nm gate oxide, while having a minor influence with 2.2-nm gate dielectric.

We present the first experimental report of dose-enhancement effects due to interconnects in deep-submicron CMOS, using ad hoc designed MOSFETs with different metal layouts. We demonstrate that the presence of metal-1 tracks in the proximity of the device active areas may significantly modify the response to X-rays. The impact of the secondary electron emission from metal-1 layers is strongly dependent on the relative position to the transistor lateral isolation and LDD spacers.

We investigated the combined effect of heavy-ion irradiation and large applied bias on the dielectric breakdown of ultra-thin gate oxides, analyzing the impact of border regions through dedicated test structures. We found that the irradiation bias polarity plays a fundamental role, with inversion being more detrimental than accumulation for the onset of gate rupture. Moreover, the average voltage to breakdown was, under certain conditions, lower in structures more closely resembling real MOSFETs, as compared to those commonly used for the evaluation of Single Event Gate Rupture. These findings raise some important hardness assurance issues concerning the integrity of gate oxides in radiation environments.

We investigate how X-ray exposure impact the long term reliability of 130-nm NMOSFETs as a function of device geometry and irradiation bias conditions. This work focuses on electrical stresses on n-channel MOSFETs previously irradiated with X-ray up to 136 Mrad(SiO2) in different bias conditions. Irradiation is shown to negatively affect the degradation during subsequent hot carrier injection. Increasing the bias during irradiation slightly reduces the impact on electrical stress in core MOSFETs. We attribute these effects to an enhanced impact ionization at the bulk-STI interfaces due to radiation-induced trapped charge and defects.

The impact of foundry-to-foundry variability and bias conditions during irradiation on the Total Ionizing Dose (TID) response of commercial 130-nm CMOS technologies have been investigated for applications in High Energy Physics (HEP) experiments. n- and p-channel MOSFETs from three different manufacturers have been irradiated with X-rays up to more than 100 Mrad (SiO 2 ). Even though the effects of TID are qualitatively similar, the amount of degradation is shown to vary considerably from foundry to foundry, probably depending on the processing of the STI oxide and/or doping profile in the substrate. The bias during irradiation showed to have a strong impact as well on the TID response, proving that exposure at worst case bias conditions largely overestimates the degradation a device may experience during its lifetime. Overall, our results increase the confidence that 130-nm CMOS technologies can be used in future HEP experiments even without Hardness-By-Design solutions, provided that constant monitoring of the radiation response is carried out during the full manufacturing phase of the circuits.

The location of the time dependent degradation in OFF-state stressed AlGaN/GaN high electron mobility transistors is studied using low frequency 1/f noise measurements, with additional electroluminescence analysis. The gate bias dependence of the 1/f noise is shown to be a powerful tool to illustrate that in addition to the gate edge breakdown, progressive time-dependent trap generation occurs underneath the gate area, possibly extending in the gate-drain access region due to the electric field peak associated with the gate field plate.