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Molecular beam epitaxy (MBE) invented for the growth of compound semiconductors in the 70’s has been successfully extended to the advanced growth of metals, oxides, oxide/semiconductor interfaces and emergent topological materials by our endeavor in the past three and half decades. In the 80’s, Kwo et al. have invented metal MBE and oxide MBE methods in pioneering spintronics and high-temperature superconducting oxide films. In driving compound semiconductors for optoelectronics, Hong et al. have produced distributed Bragg reflectors with a continuously graded composition between each constituent without shutter operation, and greatly reduced the electrical resistance; this simple method has made easy manufacture of vertical-cavity surface-emitting lasers. In the 90’s, combining (In)GaAs and oxide MBE chambers via ultra-high vacuum, Hong et al. were the first to unpin the Fermi level in oxide/GaAs, which led to the first demonstration of inversion-channel (In)GaAs metal-oxide-semiconductor (MOS) field-effect transistors (MOSFETs). Integrating MBE, atomic layer deposition (ALD), and many other functions in ultra-high vacuum, advances have been made in pushing ultimate complementary MOS (CMOS) of record-high device performances and beyond in growing emergent topological materials for spintronics. Our novel method in preserving as-grown (In)GaAs surfaces and interfaces with high-κ oxides and metals enables employing in-situ synchrotron radiation photoemission to study electronic structures in an atomic scale.

The role of an atomic-layer thick periodic Y&ndash, O array in inducing the epitaxial growth of single-crystal hexagonal YAlO3 perovskite (H-YAP) films was studied using high-angle annular dark-field and annular bright-field scanning transmission electron microscopy in conjunction with a spherical aberration-corrected probe and in situ reflection high-energy electron diffraction. We observed the Y&ndash, O array at the interface of amorphous atomic layer deposition (ALD) sub-nano-laminated (snl) Al2O3/Y2O3 multilayers and GaAs(111)A, with the first film deposition being three cycles of ALD-Y2O3. This thin array was a seed layer for growing the H-YAP from the ALD snl multilayers with 900 &deg, C rapid thermal annealing (RTA). The annealed film only contained H-YAP with an excellent crystallinity and an atomically sharp interface with the substrate. The initial Y&ndash, O array became the bottom layer of H-YAP, bonding with Ga, the top layer of GaAs. Using a similar ALD snl multilayer, but with the first film deposition of three ALD-Al2O3 cycles, there was no observation of a periodic atomic array at the interface. RTA of the sample to 900 &deg, C resulted in a non-uniform film, mixing amorphous regions and island-like H-YAP domains. The results indicate that the epitaxial H-YAP was induced from the atomic-layer thick periodic Y&ndash, O array, rather than from GaAs(111)A.

Y2O3 and Al2O3 were in-situ atomic layer deposited (ALD) on pristine GaAs(001)-46 reconstructed surfaces without surface pretreatments. We have studied the border and interfacial traps in both hetero-structures using the measured electrical responses. On the basis of frequency dispersion analysis of the capacitance-voltage (CV) characteristics, we conclude that Y2O3 has effectively passivated GaAs surface with a much lower interfacial trap density (Dit) than Al2O3 as the gate dielectric. The quasi-static CV and conductance measurements are in agreement with the above conclusion. We have demonstrated an excellent ALD-Y2O3/GaAs interface with low Dit's of (0.52)1012eV1cm2 through the whole GaAs band gap without a mid-gap peak feature. Display Omitted

In-situ atomic layer deposition (ALD) Y2O3/Al2O3 in bi-layered and sub-nano-laminated structures were stacked on pristine GaAs(001) substrates for fabricating metal-oxide-semiconductor capacitors. The bi-layered Y2O3/Al2O3 showed an enhanced effective dielectric constant from 11.1 to 15.6 in capacitance-voltage characteristics with post deposition annealing to 900C. No new oxide phase formed as carefully examined using synchrotron radiation X-ray diffraction and cross-sectional high-resolution scanning tunneling electron microscopy. We designed and grew sub-nano-laminated Y2O3/Al2O3 multi-layers to simulate the mixing of gate oxides, and observed an enhanced dielectric constant of 14.8 for the as-deposited sample. Both high-temperature mixed and sub-nano-laminated ALD Y2O3/Al2O3 exhibit high dielectric constant, low leakage current ~108A/cm2 and low interfacial trap density with GaAs(001), promising for high applications in future GaAs metal-oxide-semiconductor devices. Display Omitted High dielectric constant () in 900C annealed ALD Y2O3/Al2O3 bi-layerHigh in ALD sub-nano-laminated (super-cycled) Y2O3/Al2O3 multi-layersEnhancement of dielectric constant without new structure formationExcellent CVs with low leakage current for Y2O3/Al2O3 on GaAs(001)

Oxide defects in HfO 2 and Y 2 O 3 on GaAs(001) are characterized by analyzing capacitance-voltage $(C-V)$ hysteresis of metal-oxide-semiconductor capacitor (MOSCAP) under positive and negative stress fields. The $C-Vs$ of Y 2 O 3 /GaAs have smaller hysteresis and flat-band voltage shift in both accumulation and depletion regimes. This indicates less shallow and deep traps for Y 2 O 3 , making this high-k oxide more suitable than HfO 2 for GaAs passivation in terms of reliability.

The physical investigation of surfaces and their properties crucially depends on their quality. Such investigations are commonly performed in an ultra-high vacuum environment. Thereby, the transfer of samples among different setups and under ambient conditions is desirable. The usage of a capping layer for the protection of surfaces against contaminations during long-time storage and transfer, and the subsequent temperature-controlled decapping is an established approach. However, a residual-free removal of the capping layer may present a challenge. Here, we systematically investigate the decapping process of a tellurium protected topological insulator Bi2Te3. We give evidence for the material segregation from the contaminated capping layer surface to the substrates. Therefore, a simple, temperature controlled decapping is not sufficient. We demonstrate that near perfect surfaces can be reliably obtained even after long-time storage through a combination of an initial argon ion sputtering process and a following heating for decapping. This approach is suitable for dedicated analysis systems as well as for industrial applications, large throughput of samples of arbitrary shapes, and is easily implemented in existing setups.

Display Omitted First demonstration of single-crystal atomic layer deposited oxide on GaAs(001).Attainment of very thin single crystal ALD-Y2O3 1nm thick on GaAs(001).Thin ALD-Y2O3 film with excellent crystallinity having FWHM of ~0.033?.Lowest frequency dispersion ever achieved in the ALD-oxides on n-type GaAs(001).Thermodynamic stability at high temperatures of 900?C. In situ atomic layer deposited (ALD) Y2O3 films 1-5nm thick on GaAs(001)-4i?6 reconstructed substrates were found to be single crystalline. The epitaxial growth between the oxide films and GaAs was first observed using reflective high energy electron diffraction (RHEED) and later studied using high-resolution synchrotron radiation X-ray diffraction. The Y2O3 films are of cubic phase and have (110) as the film normal; the orientation relationship between the Y2O3 films and the GaAs substrates was determined to be Y2O3(110)001] 1 ? 1 0 ]//GaAs(001)110] 1 1 ? 0 ] . The frequency dispersion of the measured capacitance-voltage (C-V) curves of the single crystal ALD-Y2O3/GaAs(001)-4i?6 is ~7% for p-GaAs and ~14% for n-GaAs (1MHz to 100Hz), lowest ever achieved in the ALD-oxides on GaAs(001).

Display Omitted Demonstration of using Al2O3/Y2O3 as common gate stacks on InGaAs, GaSb and Ge.Record high device performance of Al2O3/Y2O3 on GaSb for p-MOSFETs.Drain current of 1.5mA/µm and transconductance of 770µS/µm on InGaAs for 1µm gate length n-MOSFETs.CMOS compatible process. Y2O3, as a common high ? gate dielectric, has been directly deposited on (In)GaAs, GaSb, and Ge using electron beam evaporation in ultra-high vacuum. These semiconductors have distinctly different chemical bonding and surface electronic characteristics. No interfacial passivation layer was employed. High-quality Y2O3/semiconductor interfaces have been achieved, resulting in low interfacial trap densities and high-temperature thermal stability, essential for the CMOS compatible process. Self-aligned inversion channel n-InGaAs, p-GaSb, and p-Ge MOSFETs have been fabricated with excellent device performances.

Ga"2O"3(Gd"2O"3) [GGO] 3.5nm-thick, with an in situ Al"2O"3 cap 1.5nm thick, has been directly deposited on Ge substrate without employing interfacial passivation layers. The equivalent oxide thickness (EOT) of the gate stack is 1.38-nm. The metal-oxide-semiconductor (MOS) capacitors using Al"2O"3/GGO as the gate dielectric have given capacitance-voltage characteristics with frequency dispersions of ~4% at accumulation (10kHz-1MHz) and frequency dependent flat-band voltage shift (~30mV). The dielectric constant of the GGO remains at 14-15. Furthermore, the TiN/Al"2O"3/GGO/Ge pMOSFET with a gate length of [email protected] has given a saturation drain current density, a maximum transconductance and a field-effect hole mobility of [email protected]/@mm, [email protected]/@mm, and 300cm^2/Vs, respectively.

The integration of higher carrier mobility materials to increase drive current capability in the next CMOS generations is required for device scaling. But a fundamental issue regarding the introduction of high-mobility III–V in CMOS is the electrical passivation of the interface with the high-κ gate dielectric. In this work, we show that in situ H2S surface treatment on GaAs(001) leads to a stable and reorganized oxide/III–V interface. The exposition of the GaAs surface is monitored in situ by RHEED and the interface is characterized by XPS analyses. Finally, MOS capacitors are fabricated to extract interface state density over the band gap. These results highlight a promising re-interest in chalcogenide passivation of III–V surfaces for CMOS applications.

High-quality (0001)-oriented ZnO epitaxial films have been grown by pulsed laser deposition on Si(111) buffered with a nanometer-thick Gd2O3(Ga2O3), GGO, layer. The structural characteristics of the ZnO epi-layers were studied by X-ray diffraction and transmission electron microscopy (TEM). The in-plane epitaxial relationship between the wurtzite ZnO, cubic GGO, and cubic Si follows {1010}ZnO∥{422}Gd2O3∥{422}Si and the ZnO/GGO interface can be described by the domain matching epitaxy. TEM contrast analysis reveals that the major defect structures in the ZnO films are edge-type threading dislocations and intrinsic basal plane stacking faults. All the ZnO epi-films studied are under a tensile biaxial strain, but no cracks were found. Temperature-dependent photoluminescence results show the excellent optical properties of the obtained ZnO layers, and the origins of the spectral features are discussed.

Achievement of low interfacial densities of states, small equivalent oxide thickness, high κ values, and thermal stability at high temperatures in the high κ dielectrics on high carrier mobility semiconductors, the leading candidates for technology beyond Si CMOS, has been made using MBE. This paper reviews our recent advances in meeting the unprecedented demands in materials and physics for the new technology. Moreover, self-aligned inversion-channel InGaAs and Ge MOSFETs using MBE-Ga 2 O 3 (Gd 2 O 3 ) as the gate dielectric are compared favorably with those using the gate dielectrics made from other thin film techniques.

Self-aligned inversion-channel In 0.75 Ga 0.25 As metal-oxide-semiconductor field-effect transistors (MOSFETs) using molecular beam epitaxy (MBE) deposited Al 2 O 3 /Ga 2 O 3 (Ga 2 O 3 ) [GGO] as gate dielectrics and TiN as metal gates were fabricated. The 1-μm-gate-length In 0.75 Ga 0.25 As MOSFETs have achieved a maximum drain current of 1.23 mA/μm, a peak transconductance of 464 μS/μm, and a peak field-effect electron mobility of 1600 cm 2 /V s. A new record of maximum drain current has been set, not only for III-V MOSFETs but also for all enhancement mode MOSFETs with similar device dimensions, regardless of channel materials and device configurations.

A fundamental issue regarding the introduction of high-mobility Ge channels in CMOS circuits is the electrical passivation of the interface with the high-k gate dielectric. In this paper, we investigate the passivation of p-Ge(001) using molecular H"2S. The modification of the semiconductor surface is monitored in situ by RHEED and the interface is characterized by XPS analyses. MOS capacitors are fabricated to extract interface state density, and finally we demonstrate the efficiency of the passivation scheme using a combination with an ultra thin Al interlayer.

InGaAs and Ge MOSFETs with high @k's are now the leading candidates for technology beyond the 15nm node CMOS. The UHV-Al"2O"3/Ga"2O"3(Gd"2O"3) [GGO]/InGaAs has low electrical leakage current densities, C-V characteristics with low interfacial densities of states (D"i"t's) and small frequency dispersion in both n- and p-MOSCAPs, thermal stability at temperatures higher than >850^oC, a CET of 2.1nm (a CET of 0.6nm in GGO), and a well tuning of threshold voltage V"t"h with metal work function. Device performances in drain currents of >1mA/@mm, transconductances of >710@mS/@mm, and peak mobility of 1600cm^2/Vs at 1@mm gate-length were demonstrated in the self-aligned, inversion-channel high In-content InGaAs n-MOSFETs using UHV-Al"2O"3/GGO gate dielectrics and ALD-Al"2O"3. Direct deposition of GGO on Ge without an interfacial passivation layer has given excellent electrical performances and thermodynamic stability. Self-aligned Ge p-MOSFETs have shown a high drain current of 800@mA/@mm and peak transconductance of 420@mS/@mm at 1@mm gate-length.

High-quality Gd2O3 epi-films 5−20 nm thick have been grown on GaN (0001) using molecular beam epitaxy. A detailed structural investigation was carried out by in situ reflection high energy electron diffraction, cross sectional transmission electron microscopy, and X-ray scattering using a synchrotron radiation source. The films consist of the high-temperature monoclinic (m) phase with six rotational domains, which can be easily mistaken for being the hexagonal phase. All the domains follow the m-Gd2O3 (201)⟨020⟩ ∥ GaN (0001) orientational relationship.

Accumulation-type GaN metal-oxide-semiconductor field-effect-transistors (MOSFET's) with atomic-layer-deposited HfO"2 gate dielectrics have been fabricated; a [email protected] gate-length device with a gate dielectric of 14.8nm in thickness (an equivalent SiO"2 thickness of 3.8nm) gave a drain current of 230mA/mm and a broad maximum transconductance of 31mS/mm. Owing to a low interfacial density of states (D"i"t) at the HfO"2/GaN interface, more than two third of the drain currents come from accumulation, in contrast to those of Schottky-gate GaN devices. The device also showed negligible current collapse in a wide range of bias voltages, again due to the low D"i"t, which effectively passivate the surface states located in the gate-drain access region. Moreover, the device demonstrated a larger forward gate bias of +6V with a much lower gate leakage current.

Without using any interfacial passivation layers, high- κ dielectric Y 2 O 3 , HfO 2 , and Ga 2 O 3 (Gd 2 O 3 ) [GGO], by electron beam evaporation in ultra-high-vacuum (UHV), have been directly deposited on Ge substrate. Comprehensive investigations have been carried out to study the oxide/Ge interfaces chemically, structurally, and electronically: hetero-structures of all the studied oxides on Ge are highly thermally stable with annealing to 500 °C, and their interfaces remain atomically sharp. The electrical analyses have been conducted on metal–oxide–semiconductor (MOS) devices, i.e. MOS capacitors (MOSCAPs) and MOS field-effect-transistors (MOSFETs). Dielectrics constants of the Y 2 O 3 , HfO 2 , and GGO have been extracted to be ∼17, 20, and 13–15, respectively, indicating no interfacial layer formation with 500 °C annealing. A low interfacial density of states ( D it s), as low as 3 × 10 11 cm −2 eV −1 , has been achieved for GGO/Ge near mid-gap along with a high Fermi-level movement efficiency as high as 80%. The GGO/Ge pMOSFETs with TiN as the metal gate have yielded very high-performances, in terms of 496 μA/μm, 178 μS/μm, and 389 cm 2 /V s in saturation drain current density, maximum transconductance, and effective hole mobility, respectively. The gate width and gate length of the MOSFET are 10 μm and 1 μm.

High-performance self-aligned inversion-channel In 0.75 Ga 0.25 As n -MOSFETs using in situ ultra-high-vacuum (UHV) deposited Al 2 O 3 /Ga 2 O 3 (Gd 2 O 3 ) [GGO] and ex-situ atomic-layer-deposited (ALD) Al 2 O 3 as gate dielectrics have been fabricated. Both devices exhibit high drain currents and transconductances. A 1.2 μm-gate-length In 0.75 Ga 0.25 As MOSFET using Al 2 O 3 (2 nm-thick)/GGO (13 nm-thick) gate dielectric demonstrated a maximum drain current of 970 μA/μm, a peak transconductance of 410 μS/μm, and a peak mobility of 1560 cm 2 /V s. A maximum drain current of 740 μA/μm and a peak transconductance of 325 μS/μm were exhibited by a 1 μm-gate-length In 0.75 Ga 0.25 As MOSFET using ALD-Al 2 O 3 (6 nm-thick). A comparison between the inversion-channel InGaAs MOSFETs with gate dielectrics using the UHV- and ALD-approaches, and fabricated using the same self-aligned process, was carried out to provide insights for achieving InGaAs MOSFETs with even higher device performances. The comparison in the device performances was extended to cover representative enhancement-mode InGaAs MOSFETs, including self-aligned inversion-channel, non-self-aligned inversion-channel, and flat-band, or buried channel-type of E-mode (non inversion-channel) III–V devices.

An overview is given on scientific and device advances for InGaAs metal oxide semiconductor heterostructures and inversion channel metal oxide semiconductor field-effect transistors (MOSFETs), with emphasis on results using ultrahigh vacuum-deposited Ga2O3(Gd2O3) [GGO] as high-κ dielectrics. Regardless of the approaches used to deposit high-κ dielectrics on InGaAs, critical material and electrical parameters of fabricating inversion channel InGaAs MOSFETs must be ready for complementary MOS technology beyond the 16-nm node, and some of these parameters have been achieved. These parameters include low interfacial density of states; low electrical leakage currents; high-temperature (800–900°C) thermal stability for high-κ dielectrics/InGaAs heterostructures, where the amorphous oxide structure and atomically smooth and sharp interfaces are retained; and oxide scalability with a capacitance equivalent thickness of ≤1 nm. Interfacial chemical properties and band parameters, which are important for device design in the high κs/InGaAs, have been thoroughly studied. Representative enhancement-mode InGaAs MOSFETs are compared and correlated with the interfacial structures. Deposition methods and electrical characteristics of high-κ dielectrics on InGaA are discussed. The inversion channel InGaAs MOSFETs of 0.4–1.0 μm gate length have exhibited excellent device performance in terms of drain current and transconductance.

Ultra-high-vacuum deposited Al2O3/Ga2O3(Gd2O3) dual-layer gate dielectrics were used to fabricate metal-oxide-semiconductor capacitors (MOSCAPs) and MOS field-effect-transistors (MOSFETs). Excellent electrical properties of well-behaved C-V characteristics with very small frequency dispersions, a very low leakage current density of 2.5×10-9 A/cm2 at Vg = Vfb + 1V, and a low Dit of 2.5×1011 cm-2eV-1 near the mid-gap, have been demonstrated in In0.2Ga0.8As MOSCAPs, which were RTA to 850°. Moreover, 1μm-gate-length self-aligned inversion-channel In0.53Ga0.47As MOSFETs have achieved record-high maximum drain current of 1.05 mA/μm and peak transconductance of 714 μS/μm. Both device performances are the highest among all-types of enhancement mode MOSFETs, fabricated by self-aligned or non-self-aligned process. Various enhancement-mode MOSFETs in the configurations of inversion-channel and non-inversion-channel, fabricated with self-aligned and non-self-aligned processes are compared.

An overview is given on recent advances of science and devices of III–V based and Si MOS and MOSFET. Firstly, we have integrated molecular beam epitaxy (MBE) with atomic layer deposition (ALD) for the growth of excellent high- κ dielectrics with abrupt interfaces, critical for further complementary metal-oxide-semiconductor (CMOS) scaling beyond the 45 nm node. Secondly, we showed that epitaxial yttrium-doped HfO 2 films on GaAs(1 0 0) have stabilized the cubic phase, and led to enhancement of κ over 30. Thirdly, inelastic electron tunneling spectroscopy (IETS) was applied to probe the phonon modes and charge trappings within the high- κ dielectrics. Fourthly, scaling of the high- κ oxides approaching 1.0 nm capacitance equivalent thickness (CET) is achieved in a Ga 2 O 3 (Gd 2 O 3 )[GGO]/In 0.2 Ga 0.8 As (InGaAs) gate stack that has undergone 850 °C rapid thermal annealing, and which has unpinned the surface Fermi level of the III–V semiconductor. Finally, we have demonstrated a self-aligned inversion-channel In 0.53 Ga 0.47 As MOSFETs made of Al 2 O 3 (2 nm)/GGO(7 nm) gate oxide and TiN metal gate at 1-μm gate length, reaching a world record of drain current and transconductance.

The use of compound semiconductors as the channel material has recently drawn great attention because of its potential to solve the upcoming Si metal–oxide–semiconductor field effect transistor (MOSFET) scaling problem for device beyond 22 nm node. In this work, a method of fabricating inversion-channel enhancement-mode GaAs n-MOSFET by incorporating molecular beam epitaxy regrown source and drain regions is demonstrated. By using regrown contact layers to avoid high-temperature processes and, thus, preserve the integrity of the oxide–semiconductor interface, the structure allows the fabrication of self-aligned III–V-based MOSFET. The fabricated n-channel enhancement-mode GaAs MOSFET with a 4 μm gate length shows a record high transconductance of 75 mS/mm.

Depletion-mode In 0.2 Ga 0.8 As/GaAs metal-oxide-semiconductor field-effect transistors (MOSFETs) were fabricated with molecular beam epitaxy (MBE) grown Al 2 O 3 /Ga 2 O 3 (Gd 2 O 3 ) as the gate dielectric in two comparable processes. In the “metal-gate-last” process, a 12 μm gate-length depletion-mode n -channel InGaAs/GaAs MOSFET with a Ga 2 O 3 (Gd 2 O 3 ) gate oxide 6 nm thick shows an accumulated drain current density of 135 mA/mm at V g =2 V. In the other process of “metal-gate-first” process, the device with same gate dielectric, channel, and gate length exhibits a larger drain current density of 175 mA/mm at the same gate bias. In addition, there is a broader transfer characteristics and higher extrinsic peak transconductance of 48 mS/mm in the metal-gate-first process. MOS capacitors from both processes have exhibited excellent capacitance–voltage ( C – V ) characteristics with minor dispersion, negligible hysteresis, and κ values of 13.7–13.9 in Ga 2 O 3 (Gd 2 O 3 ).

High-quality ZnO epitaxial films have been grown by pulsed-laser deposition on Si (111) substrates using a nanothick high-k oxide Y2O3 buffer layer. Determined by X-ray diffraction and transmission electron microscopy, the epitaxial relationship between ZnO and Y2O3 follows (0001)⟨2110⟩ZnO||(111)⟨101⟩Y2O3. ZnO lattice aligns with the hexagonal O sublattice in Y2O3 and the interfacial structure can be well described by domain matching epitaxy with 7 or 8 ZnO {1120} planes matching 6 or 7 {440} planes of Y2O3 and lead to a significant reduction of residual strain. Superior optical properties were obtained even for ZnO films as thin as 0.21 μm from photoluminescence results.

Transmission electron microscopy structural characterization of HfO2/GaAs(001) heterostructures grown by molecular beam epitaxy with a film thickness of ∼ 5 nm was conducted. The study indicates that the room-temperature as-grown films are amorphous and the films crystallize into the monoclinic phase upon in situ post annealing at 540 °C in the growth chamber. Both types of films show an atomically sharp interface with GaAs(001) substrates. The crystalline monoclinic HfO2 films exhibit c-oriented epitaxy on the substrate and consist of 90° domains. The formation of 90° domains in the heterostructures, the details of the domain-wall configurations, and the possible impact of the walls and the frequently observed anti-phase boundaries in the films on electrical properties of the heterostructures are discussed.

Ga2O3(Gd2O3), a high κ gate dielectric, ultrahigh vacuum (UHV)-deposited on GaAs and InGaAs has unpinned the Fermi level in the highelectron-mobility III–V compound semiconductors for the first time. Systematic heat treatments under various gases and temperatures were studied to achieve low leakage currents of 10 −8 –10 −9 A/cm 2 and low interfacial density of states (Dit's) in the range of b10 11 cm −2 eV −1 .B y removing moisture from the oxide, thermodynamic stability of the Ga2O3(Gd2O3)/GaAs heterostructures and the interfaces were achieved with high temperature annealing, the oxide remains amorphous and the interface remains intact with atomic smoothness and sharpness. The Fermi-level unpinning in atomic layer deposition (ALD) Al2O3 ex-situ deposited on InGaAs was achieved. Recent work of extremely high-quality nano-thick single crystal oxides of gamma-Al2O3 and bixbyite cubic Sc2O3 epitaxially grown on Si (111) is discussed. Interfacial manipulation is essential in giving excellent results presented in the paper. X-ray diffraction, reflectivity, and X-ray photoelectron spectroscopy using synchrotron radiation are critical in probing the interfacial properties.

A nearly lattice-matched Gd2O3/Si(1 1 1) hetero-epitaxy was demonstrated using molecular beam epitaxy (MBE). Detailed structural studies find that the nano thick Gd2O3 films have a cubic phase with a very uniform thickness, an excellent crystallinity and atomically sharp interfaces. These features are characterized by the bright, streaky reconstructed reflection high-energy electron diffraction (RHEED) patterns at the initial oxide growth, the pronounced interference fringes in the X-ray reflectivity curve as well as in the crystal truncation rod around the substrate diffraction peaks using the high-resolution X-ray diffraction. The (1 1 1) axis of the thin oxide is oriented parallel to the substrate (1 1 1) normal with a 60° in-plane symmetry rotation.

The trap-related characteristics in depletion mode GaAs metal-oxide-semiconductor field-effect-transistors (MOSFETs) were studied using two different electrical characterization techniques of current collapse and low-frequency noise measurements. With a high-quality MBE-grown gate oxide layer Ga 2 O 3 (Gd 2 O 3 )∼30 nm thick in situ on GaAs, an extremely small drain current collapse factor Δ I max of less than 5% was observed even with a high drain bias of 16 V. In addition, no kink effect was observed in the low-frequency AC I – V characteristics. Moreover, a normalized drain noise current spectral density in the range of 10 −11 –10 −9 Hz −1 (at 10 Hz) was obtained, which is comparable to modern 0.13-μm Si complementary MOS (CMOS) technology under similar biasing conditions. The results indicate low interfacial trap densities for the studied GaAs MOSFETs.

Two depletion-mode GaAs-based metal-oxide-semiconductor field-effect transistor (MOSFETs) were made with molecular beam epitaxy (MBE) grown Ga 2 O 3 (Gd 2 O 3 ) as the gate dielectric on different channel structures. The depletion-mode GaAs MOSFETs with a gate length of 1.6 μm show an accumulated drain current density of 335mA/mm at V G up to 4V. The In 0.15 Ga 0.85 As/GaAs MOSFET, with a 4-A-thick amorphous Si cap layer exhibits a large drain current density of 510 mA/mm at V G up to 2 V. The output characteristics measured by a curve tracer show no I-V hysteresis and drain current drift. These excellent device characteristics were resulted from a high-quality, low-trap interface between Ga 2 O 3 (Gd 2 O 3 ) and the channels.

The MBE growth technique is employed to the intensively studied high κ gate dielectrics HfO2 (κ=20) and its alloy (Hf–Al)O2 in replacing conventional SiO2 for nano-CMOS applications. Typical 4.9 nm thick HfO2 films showed low leakage current density of ∼0.4 A/cm2 at 1 V, a dielectric constant κ of 20.7 and an EOT of 0.9 nm. Minor frequency dispersion is observed at C–V curves and is removed by an improved two-frequency method. An epitaxial order of (1 0 0) cubic HfO2 oxide is observed for the depositions on GaAs(1 0 0) at temperatures over 230 °C.

We demonstrate GaAs-based, metal-oxide-semiconductor field-effect transistors (MOSFETs) with excellent performance using an Al2O3 gate dielectric, deposited by atomic layer deposition (ALD). This achievement is very significant because Al2O3 possesses highly desirable physical and electrical properties as a gate dielectric. These MOSFET devices exhibit extremely low gate-leakage current, high transconductance, and high dielectric breakdown strength. A short-circuit, current-gain, cutoff frequency (fT) of 14 GHz and a maximum oscillation frequency (fmax) of 25.2 GHz have been achieved from a 0.65-µm gate-length device. The interface trap density (Dit) of Al2O3/GaAs is evaluated by the hysteresis of drain-source current, Ids, versus gate-source bias, Vgs, and the frequency dispersion of transconductance, gm.

Photoreflectance (PR) and Raman spectra were employed to investigate the interfacial characteristics of a series of oxide films on GaAs. The barrier heights across the interfaces and the densities of interfacial states are determined from the PR intensity as a function of the pump power density. The oxide-GaAs structures fabricated by in situ molecular beam epitaxy exhibit low interfacial state densities in the low 1011 cm−2 range. The density of the interface states of the Ga2O3(Gd2O3)–GaAs structure is as low as (1.24±0.14)×1010 cm−2. The Ga2O3(Gd2O3) dielectric film has effectively passivated the GaAs surface. Additionally, Raman spectra were used to characterize the structural properties of the oxide films.

Employing Ga 2 O 3 (Gd 2 O 3 ) as gate dielectric and Si-doped GaAs as conducting channel, depletion-mode GaAs MOSFETs were fabricated. DC I – V and transfer curves show no pinch-off and drain current hysteresis. Etching a thin layer from the top of Ga 2 O 3 (Gd 2 O 3 ) in the gate region before gate metal deposition leads to full pinch-off and significantly reduces the drain current hysteresis. This process may remove the contaminated Ga 2 O 3 (Gd 2 O 3 ) due to exposure to chemicals and prior processes, and thus results in a clean gate metal to oxide interface. The clean gate metal to Ga 2 O 3 (Gd 2 O 3 ) interface also leads to higher DC transconductance, higher unity current gain cut-off frequency as well as higher unity power gain cut-off frequency as compared with GaAs MOSFET devices with a contaminated metal/oxide interface at the gate.

Our ability of controlling the growth and interfaces of thin dielectric films on III–V semiconductors by ultrahigh vacuum deposition has led to investigations of gate stacks containing rare earth oxides of Gd 2 O 3 and Y 2 O 3 as alternative high κ gate dielectrics for Si. The abrupt interfaces achieved in these gate stacks have enabled the electrical, chemical, and structural studies to elucidate the critical materials integration issues for CMOS scaling, including morphology dependence, interfacial structure and reaction, thermal stability and gate electrode compatibility.

GaAs-based metal-oxide-semiconductor field-effect transistors (MOSFETs) are promising devices for high-speed and high-power applications. One important factor influencing the performance of a GaAs MOSFET is the characteristics of ohmic contacts at the drain and source terminals. In this paper, AuGe-Ni-Au metal contacts fabricated on a thin (930 /spl Aring/) and lightly doped (4/spl times/10/sup 17/ cm/sup -3/) n-type GaAs MOSFET channel layer were studied. The effects of controllable processing factors such as the AuGe thickness, the Ni/AuGe thickness ratio, alloy temperature, and alloy time to the characteristics of the ohmic contacts were analyzed. Contact qualities including specific contact resistance, contact uniformity, and surface morphology were optimized by controlling these processing factors. Using the optimized process conditions, a specific contact resistance of 5.6/spl times/10/sup -6/ /spl Omega//spl middot/cm/sup 2/ was achieved. The deviation of contact resistance and surface roughness were improved to 1.5% and 84 /spl Aring/, respectively. Using the improved ohmic contacts, high-performance GaAs MOSFETs (2 /spl mu/m/spl times/100 /spl mu/m) with a large drain current density (350 mA/mm) and a high transconductance (90 mS/mm) were fabricated.

The epitaxial growth of Gd"2O"3 on GaAs (001) has given a low interfacial density of states, resulting in the demonstration of the first inversion-channel GaAs metal-oxide-semiconductor field-effect transistor. Motivated by the significance of this discovery, in this work, cross-sectional scanning tunneling microscopy is employed herein to obtain precise structural and electronic information on these epitaxial films and interfaces. At the interface, the interfacial stacking of Gd"2O"3 films is directly correlated with the stacking sequence of the substrate GaAs. Additionally, from the local electronic states across the gate oxides, the spatial extent of the GaAs wavefunctions into the oxide dielectric may suggest a minimum Gd"2O"3 thickness to be of bulk properties.

Recent development of high κ dielectric oxides on (In)GaAs is reviewed in the fields of electronic structure and electric performance; this includes studies of (In)GaAs surfaces with various surface reconstructions, different orientations, and Indium contents, and of high κ/(In)GaAs interfaces. The oxide deposition was carried out using atomic-layer deposition (ALD) and molecular beam epitaxy (MBE) via ex-situ or in-situ methods. For the former approach, the semiconductor surfaces prior to the oxide deposition were obtained via chemical, arsenic-cap or annealing treatments. For the latter, the high k's were deposited on pristine freshly MBE-grown (In)GaAs surfaces without any treatments. Surface being treated or not clearly determines the quality of the oxide interface which delivers different interfacial electronic structure and electric performance. Without exception, the ex-situ treated samples show remnant native oxides, which are never found in the in-situ samples. The electronic structure has been investigated using photoemission measurements, in which the photon energy was provided by X-ray and synchrotron radiation. The discussion on high κ/(In)GaAs interfaces has been further extended to the electrical characterization including extraction of interfacial trap densities ( D it's). Especially, the distinct electrical characteristics of the In0.2Ga0.8As metal-oxide-semiconductor capacitors (MOSCAPs) using MBE-Ga 2 O 3(Gd 2 O 3) and ALD-Al 2 O 3 as the gate are elucidated. Finally, a summary and bench-marking of the recent advances on enhancement mode III-V (In)GaAs MOSFETs is given, which reveals the great potential of inversion-channel (In)GaAs MOSFETs for ultimate complementary MOS (CMOS) applications. Keywords: high κ; III-V ; InGaAs ; photoemission spectroscopy (PES); metal-oxide-semiconductor (MOS); field-effect-transistors (FETs)

The valence-band offset (ΔEV ) has been determined to be ∼2.6 eV at the Ga2O3(Gd2O3)–GaAs interface, and ∼1.1 eV at the Ga2O3(Gd2O3)–GaN interface by high-resolution X-ray photoelectron spectroscopy with synchrotron radiation beam. The Pt–Ga2O3(Gd2O3)–GaAs MOS diode exhibits a current–voltage characteristics dominated by Fowler–Nordheim tunneling. From the current–voltage data at forward and reverse biases, we have extracted a conduction-band offset (ΔEC) of ∼1.4 eV at the Ga2O3(Gd2O3)–GaAs interface and an electron effective mass m*∼0.29me of the Ga2O3(Gd2O3) layer. Consequently, the energy-band gap of Ga2O3(Gd2O3) is ∼5.4 eV, while ΔEC for the Ga2O3(Gd2O3)–GaN interface is ∼0.9 eV.

We report an fcc structure for the epitaxial Gd2O3 films grown on GaAs~100!. This fluorite-derived structure appears to be stabilized by epitaxy with the substrate and has a great similarity to the GaAs structure. A model calculation supports this finding. Our secondary-electron imaging studies of these nanometer-thick films reveal that the films are cubic as deposited, and this structure can be derived from the stable a-phase of the Gd2O3 by a mild Ne-ion bombardment and a subsequent anneal. These epitaxial Gd2O3 films have great importance because of their excellent surface passivation properties.

Ta2O5 is a candidate for use in metal–oxide–metal (MOM) capacitors in several areas of silicon device technology. Understanding and controlling leakage current is critical for successful implementation of this material. We have studied thermal and photoconductive charge transport processes in Ta2O5 MOM capacitors fabricated by anodization, reactive sputtering, and chemical vapor deposition. We find that the results from each of these three methods are similar if one compares films that have the same thickness and electrodes. Two types of leakage current are identified: (a) a transient current that charges the bulk states of the films and (b) a steady state activated process involving electron transport via a defect band. The transient process involves either tunneling conductivity into states near the Fermi energy or ion motion. The steady state process, seen most commonly in films

Thermodynamically stable, low D/sub it/ amorphous Ga/sub 2/O/sub 3/-(100) GaAs interfaces have been fabricated by extending molecular beam epitaxy (MBE) related techniques. We have investigated both in situ and ex situ Ga/sub 2/O/sub 3/ deposition schemes utilizing molecular beams of gallium oxide. The in situ technique employs Ga/sub 2/O/sub 3/ deposition on freshly grown, atomically ordered (100) GaAs epitaxial films in ultrahigh vacuum (UHV); the ex situ approach is based on thermal desorption of native GaAs oxides in UHV prior to Ga/sub 2/O/sub 3/ deposition. Unique electronic interface properties have been demonstrated for in situ fabricated Ga/sub 2/O/sub 3/-GaAs interfaces including a midgap interface state density D/sub it/ in the low 10/sup 10/ cm/sup -2/ eV/sup -1/ range and an interface recombination velocity S of 4000 cm/s. The existence of strong inversion in both n- and p-type GaAs has been clearly established. We will also discuss the excellent thermodynamic and photochemical interface stability. Ex situ fabricated Ga/sub 2/O/sub 3/-GaAs interfaces are inferior but still of a high quality with S=9000 cm/s and a corresponding D/sub it/ in the upper 10/sup 10/ cm/sup -2/ eV/sup -1/ range. We also developed a new numerical heterostructure model for the evaluation of capacitance-voltage (C-V), conductance-voltage (G-V), and photoluminescence (PL) data. The model involves selfconsistent interface analysis of electrical and optoelectronic measurement data and is tailored to the specifics of GaAs such as band-to-band luminescence and long minority carrier response time /spl tau//sub R/. We will further discuss equivalent circuits in strong inversion considering minority carrier generation using low-intensity light illumination.

Recently, significant progress has been made on GaAs metal-oxide-semiconductor field-effect transistors (MOSFETs) using atomic-layer deposition (ALD)-grown Al2O3 as gate dielectric. We show here that further improvement can be achieved by inserting a thin In0.2Ga0.8As layer as part of the channel between Al2O3 and GaAs channel. A 1-μm-gate-length, depletion-mode, n-channel In0.2Ga0.8As/GaAs MOSFET with an Al2O3 gate oxide of 160 A shows a gate leakage current density less than 10−4 A/cm2, a maximum transconductance ∼105 mS/mm, and a strong accumulation current at Vgs>0 in addition to buried-channel conduction. Together with longer gate-length devices, we deduce electron accumulation surface mobility for In0.2Ga0.8As as high as 660 cm2/V s at Al2O3/In0.2Ga0.8As interface.

Polycrystalline and epitaxial Ba0.5Sr0.5TiO3 thin films were grown on Si by 90° off-axis sputtering for potential charge storage applications. Polycrystalline BST films deposited on Pt/Ta coated Si have demonstrated a dielectric constant as high as 600, and a loss tangent as low as 0.01 under optimized growth conditions. Epitaxial Ba0.5Sr0.5TiO3 (110) was achieved by depositions on metallic SrRuO3 (110) electrode, which was epitaxially grown on YSZ (100) buffered Si. The epitaxial heterostructure showed a high degree of crystallinity with little interdiffusion near the interfaces. The measured dielectric constant is about 360, and the leakage current density is lower than 4x10−7 A/cm2 at 1 V. A strong frequency dependence on dielectric constant and loss tangent is observed in 1–10 MHz frequency range for both types of film. This is attributed to the effect of a series resistance in the measurement loop. We show that roll-off frequency depends on both the magnitude of the capacitance and the resis...

A GaAs metal–oxide–semiconductor field-effect transistor (MOSFET) with thin Al2O3 gate dielectric in nanometer (nm) range grown by atomic layer deposition is demonstrated. The nm-thin oxide layer with significant gate leakage current suppression is one of the key factors in downsizing field-effect transistors. A 1 μm gate-length depletion-mode n-channel GaAs MOSFET with an Al2O3 gate oxide thickness of 8 nm, an equivalent SiO2 thickness of ∼3 nm, shows a broad maximum transconductance of 120 mS/mm and a drain current of more than 400 mA/mm. The device shows a good linearity, low gate leakage current, and negligible hysteresis in drain current in a wide range of bias voltage.

For the first time, a III-V compound semiconductor MOSFET with the gate dielectric grown by atomic layer deposition (ALD) is demonstrated. The novel application of the ALD process on III-V compound semiconductors affords tremendous functionality and opportunity by enabling the formation of high-quality gate oxides and passivation layers on III-V compound semiconductor devices. A 0.65-/spl mu/m gate-length depletion-mode n-channel GaAs MOSFET with an Al/sub 2/O/sub 3/ gate oxide thickness of 160 /spl Aring/ shows a gate leakage current density less than 10/sup -4/ A/cm/sup 2/ and a maximum transconductance of 130 mS/mm, with negligible drain current drift and hysteresis. A short-circuit current-gain cut-off frequency f/sub T/ of 14.0 GHz and a maximum oscillation frequency f/sub max/ of 25.2 GHz have been achieved from a 0.65-/spl mu/m gate-length device.

Ultra-high-vacuum (UHV) deposited Ga 2 O 3 (Gd 2 O 3 ) [GGO] has been employed for passivating InGaAs and Ge, without using any interfacial paissivation layers (IPLs). The GGO/InGaAs and /Ge metal-oxide-semiconductor capacitors (MOSCAPs) have exhibited low capacitance-equivalent-thickness (CET) of less than 1nm in GGO, low interfacial densities of states (D it 's) ∼ 1011eV−1cm−2, and thermal stability at high temperatures. The high-quality GGO and interfaces of GGO/InGaAs, and /Ge enable the fabrications of inversion-channel InGaAs and Ge MOS field-effect-transistors (MOSFETs) using a self-aligned process, leading to high drain currents, transconductances (G m ), and carrier mobilities.

To effectively passivate the technologically important GaAs (001) surfaces, in situ deposition of Al2O3 was carried out with molecular beam epitaxy. The impacts of initial GaAs surface reconstruction and post-deposition annealing have been systematically investigated. The corresponding interfacial state density (D-it) were derived by applying the conductance method at 25 and 150 degrees C on both p-type and n-type GaAs metal-oxide-semiconductor capacitors to establish the D-it spectra in proximity of the critical midgap region. We show that significant reduction of D-it near the midgap is achieved by applying an optimized thermal annealing on samples grown on a Ga-rich (4x6) reconstructed surface. (C) 2010 American Institute of Physics. [doi: 10.1063/1.3488813] ispartof: Applied physics letters vol:97 issue:11 status: published