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A synchronous silicon strip readout system capable of zero dead-time readout at average trigger rates in excess of 1 MHz is described. The system is implemented in Fastbus, uses pipelining techniques, and includes point-to-point fiberoptic data links to transmit detector digital data. Semicustom ASIC (application-specific integrated circuit) chips are used to amplify, discriminate, and logically combine track data before encoding. The overall system, each major Fastbus module, and the functional aspects of the ASIC chips are described. >

The FASTBUS Segment Interconnect (SI) provides a communication path between two otherwise independent, asynchronous bus segments. In particular, the Segment Interconnect links a backplane crate segment to a cable segment. All standard FASTBUS address and data transactions can be passed through the SI or any number of SIs and segments in a path. Thus systems of arbitrary connection complexity can be formed, allowing simultaneous independent processing, yet still permitting devices associated with one segment to be accessed from others. The model S1 Segment Interconnect and the Cable Segment Ancillary Logic covered in this report comply with all the mandatory features stated in the FASTBUS specification document DOE/ER-0189. A block diagram of the SI is shown.

Hadron rejection against electron signal of a combined system of electromagnetic and hadron calorimeter has been studied. Data was taken at M4 beam line of Fermilab at energies from 25 GeV to 150 GeV. Hadron rejection of electromagnetic calorimeter is greatly improved by the use of hadron calorimeter information. The details of the results are discussed.

The FASTBUS prototyping system provides a fast, simple, way to get started with FASTBUS and for the development of FASTBUS modules. The use of CAE (computer-aided engineering) tools, combined with standard parts and simulation capability, allows the designer to produce a working design quickly and reduce the hardware debugging time. By starting with a previously designed, general-purpose FASTBUS module, the designer can quickly apply the FASTBUS interface of a design and concentrate on his application. A simulation capability allows the beginning FASTBUS designer to become familiar with FASTBUS operations and timing rapidly. The CAD (computer-aided design) tools are then used to produce a PC (personal computer) board, the interface portion of which is already done and needs only the addition of the users application. The same test software produced in the simulation may be used to test the finished module. The author describes the system and reviews its current status. >