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A high-rate fastbus silicon strip readout system

Authors :
H. Gonzalez
R. DeMaat
D. C. Christian
M. Bowden
D. Walsh
C. Swoboda
E. Barsotti
J. Urish
R. Trendler
M. Haldeman
M. Fachin
Tom Zimmerman
R.J. Yarema
M. Larwill
R. Hance
K. Trepstow
C. Rotolo
J. Hoff
Source :
Repositório Institucional da UFRGS, Universidade Federal do Rio Grande do Sul (UFRGS), instacron:UFRGS
Publication Year :
1990

Abstract

A synchronous silicon strip readout system capable of zero dead-time readout at average trigger rates in excess of 1 MHz is described. The system is implemented in Fastbus, uses pipelining techniques, and includes point-to-point fiberoptic data links to transmit detector digital data. Semicustom ASIC (application-specific integrated circuit) chips are used to amplify, discriminate, and logically combine track data before encoding. The overall system, each major Fastbus module, and the functional aspects of the ASIC chips are described. >

Details

Language :
English
Database :
OpenAIRE
Journal :
Repositório Institucional da UFRGS, Universidade Federal do Rio Grande do Sul (UFRGS), instacron:UFRGS
Accession number :
edsair.doi.dedup.....c770484d9e1baac769603c3a494347d3