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Displays that use direct light emission from microscale inorganic light emitting diodes (ILEDs) have the potential to be very bright and also very power efficient. High-throughput assembly technologies that accurately and cost-effectively deposit large arrays of ILEDs onto display substrates with high yield are key enablers for ILED displays. Transfer-printing with elastomer stamps is a candidate assembly technology for making ILED displays. A variety of passive matrix ILED displays have been designed and fabricated using transfer-printed microscale ILEDs.

Transfer printing is a materials assembly technique that uses elastomeric stamps for heterogeneous integration of various classes of micro- and nanostructured materials into two- and three-dimensionally organized layouts on virtually any type of substrate. Work over the past decade demonstrates that the capabilities of this approach create opportunities for a wide range of device platforms, including component- and system-level embodiments in unusual optoelectronic technologies with characteristics that cannot be replicated easily using conventional manufacturing or growth techniques. This review presents recent progress in functional materials and advanced transfer printing methods, with a focus on active components that emit, absorb, and/or transport light, ranging from solar cells to light-emitting diodes, lasers, photodetectors, and integrated collections of these in functional systems, where the key ideas provide unique solutions that address limitations in performance and/or functionality associated with traditional technologies. High-concentration photovoltaic modules based on multijunction, micro- and millimeter-scale solar cells and high-resolution emissive displays based on microscale inorganic light-emitting diodes provide examples of some of the most sophisticated systems, geared toward commercialization.

Elastomer stamp micro-transfer-printing is a highly scalable method for the assembly of microscale components onto non-native substrates. One of the key value propositions of micro-transfer-printing is that the transfer stamp can be scaled to wafer-dimensions and can transfer tens to thousands of micro-devices in a single step, equating to multiple millions of units per hour. Here, we report on the results of systematically scaling the stamp from 12.8 mm × 12.8 mm to a full 150 mm stamp, capable of transferring all the required devices to a 150 mm receiving wafer in one operation. The 150 mm stamp is designed to transfer more than 80,000 chips in one print cycle. This study was carried out using silicon nitride test vehicles that were specially designed for this project. We will discuss how stamp scaling impacts transfer yield and the implications for ultra-high throughput assembly of micro-devices. In addition, we will explore the capability to transfer very small devices down to 3 µm × 3 µm.

High-throughput assembly of miniature wafer-fabricated packages onto panel substrates provides a manufacturing framework for high-performance multi-functional displays and other large-format systems. Control circuits, light emitters, sensors, and other micro-components formed in high-density arrays on wafers use a variety of processes and materials that do not easily translate to large-format panel processing. Systems assembled from some or all of those components can therefore exhibit combinations of properties and performance characteristics that are difficult to achieve by panel processes only. Here, we demonstrate hierarchical assembly strategies for fabricating high-performance systems using elastomer stamp micro-transfer-printing. In this work, red, green and blue microscale inorganic LEDs (µILEDs) are fabricated on their respective native wafer substrates and then assembled onto non-native intermediate silicon wafers. The intermediate silicon wafer, populated with heterogeneous µILEDs, then undergoes conventional wafer-level processes, such a dielectric depositions and thin-film metallization, to form miniature fan-out packages. Here, we will demonstrate three heterogeneous µILEDs integrated within a 75 µm × 35 µm fan-out package. We will present how this microscale package can be undercut and then micro-transfer-printed directly onto large-format application substrates. The print-compatible packages also include sharp pressure-concentrating conductor structures which allow the heterogeneous fan-out packages to be electrically interconnected to large-format substrates during the printing operation. We will present functional µILED displays that have been fabricated using these assembly techniques. We will report on the benefits of using intermediate packaging substrates for manufacturing of high-performance large-format systems, such as displays. We will also demonstrate strategies for repairing large multi-functional systems.

Elastomer stamp based micro assembly or micro-transfer printing is a practical method for heterogeneous integration of micro-scale devices onto non-native substrates. In this paper, we evaluate the effect of stamp lifetime on performance and assess the useful lifetime of a stamp, both key metrics for using this technology in a manufacturing environment. We also review the performance of micro transfer-printing in several applications where >99% print yields and precise placement has been demonstrated.

This article reviews the properties, fabrication and assembly of inorganic semiconductor materials that can be used as active building blocks to form high-performance transistors and circuits for flexible and bendable large-area electronics. Obtaining high performance on low temperature polymeric substrates represents a technical challenge for macroelectronics. Therefore, the fabrication of high quality inorganic materials in the form of wires, ribbons, membranes, sheets, and bars formed by bottom-up and top-down approaches, and the assembly strategies used to deposit these thin films onto plastic substrates will be emphasized. Substantial progress has been made in creating inorganic semiconducting materials that are stretchable and bendable, and the description of the mechanics of these form factors will be presented, including circuits in three-dimensional layouts. Finally, future directions and promising areas of research will be described.

Thin-film diamond has many potential applications in electronics and optoelectronics, microelectromechanical systems (MEMS), wear-resistant coatings, thermal management, and other areas owing to its exceptional electronic, optical, mechanical, chemical/tribological, and thermal properties, respectively. However, challenges in the integration of thin-film diamond with other materials continue to limit its widespread use. Thin-film diamond is most commonly implemented in these systems by directly growing the material on the surfaces of device substrates, where it is used as uniform or lithographically patterned films. This approach places restrictions on the range of applications because all known growth techniques involve relatively high temperatures (>400 8C), vacuum or low pressures, and often other demanding conditions. Integrating thin-film diamond on low-temperature plastics, for example, is not possible. Large-area substrates are also not well-matched to the capabilities of existing deposition techniques, being particularly cost-ineffective when the required diamond coverage is

This article demonstrates a method for fabricating high quality single-crystal silicon ribbons, platelets and bars with dimensions between ∼100 nm and ∼5 cm from bulk (111) wafers by using phase shift and amplitude photolithographic methods in conjunction with anisotropic chemical etching procedures. This “top-down” approach affords excellent control over the thicknesses, lengths, and widths of these structures and yields almost defect-free, monodisperse elements with well defined doping levels, surface morphologies and crystalline orientations. Dry transfer printing these elements from the source wafers to target substrates by use of soft, elastomeric stamps enables high yield integration onto wafers, glass plates, plastic sheets, rubber slabs or other surfaces. As one application example, bottom gate thin-film transistors that use aligned arrays of ribbons as the channel material exhibit good electrical properties, with mobilites as high as ∼200 cm 2 V –1 s –1 and on/off ratios >10 4 .

This work was supported by the DARPA-funded and AFRL-managed Macroelectronics Program, and in part by the National Science Foundation (DMI-0355532 and CHE-0402420) using the facilities at the Frederick Seitz Materials Research Laboratory, supported by the Department of Energy (DEFG02-96ER45439). M. A. M. thanks the Fannie and John Hertz Foundation for their support via a graduate fellowship.

We show that small diameter, single-walled carbon nanotubes can serve as templates for performing polymer imprint lithography with feature sizes as small as 2 nm − comparable to the size of an individual molecule. The angstrom level uniformity in the critical dimensions of the features provided by this unusual type of template provides a unique ability to investigate systematically the resolution of imprint lithography at this molecular scale. Collective results of experiments with several polymer formulations for the molds and the molded materials suggest that the density of cross-links is an important molecular parameter that influences the ultimate resolution in this process. Optimized materials enable reliable, repetitive patterning in this single nanometer range.

This paper demonstrates the use of arrays of networks of single wall carbon nanotubes (SWNTs) and electrical breakdown procedures for building thin film transistors (TFTs) that have good, reproducible performance and high current output. Channel length scaling analysis of these TFTs indicates that the resistance at the source/drain contacts is a small fraction of the device resistance, in the linear regime. When measured with the channel exposed to air or coated by poly(methyl methacrylate) (PMMA), these transistors operate in the unipolar p mode. By spin-coating the polymer polyethylenimine (PEI) on the channel region, these transistors can be switched to operate in the unipolar n mode. Patterning the exposure of a single channel to PMMA and PEI yields p -n diodes. These results indicate that SWNT-TFTs can provide the building blocks of complex complementary circuits for a range of applications in macroelectronics, sensors, and other systems.

This article briefly describes two recently developed soft-lithographic techniques that can be used to fabricate complex, well-defined three-dimensional (3D) nanustructures. The first relies one the single or multilayer transfer of thin solid 'ink' coatings from high-resolution rubber stamsp. The second uses these stamps as conformable phase masks for proximity field nanopatterning of thin layers of transparent photopolymers. Although both techniques use the same pattern-transfer elements, they rely on completely different physical principles and they provide complementary patterning capabilities. The operational simplicity of the techniques, their ability to pattern large areas quickly, and the flexibility in the geometry of structures that can be formed with them suggest general utility for 3D nanomanufacturing.

This paper presents methods for solution casting and transfer printing collections of individual single-walled carbon nanotubes (SWNTs) onto a wide range of substrates, including plastic sheets. The deposition involves introduction of a solvent that removes surfactant from a suspension of SWNTs as it is applied to a substrate. The subsequent controlled flocculation (cF) produces films of SWNTs with densities that can be varied between a few tubes per square micron to thick multilayers in a single deposition step and with orientation determined by the direction of solution flow. High-resolution rubber stamps inked in this manner can be used to print patterns of tubes with geometries defined by the relief structure on the surface of the stamp. Thin film transistors fabricated with these techniques demonstrate their potential use in flexible “macroelectronic” systems.

Electrically conducting nanocomposites of bismuth metal and insulating ceramic phases of SiO2 and MgO were generated via high-energy ball milling for 24 h using zirconia milling media. The resulting nanocomposites contain Bi nanoparticles with sizes down to 5 nm in diameter. The morphology is a strong function of the oxide phase: specifically, the Bi appears to wet MgO while it forms spherical nanoparticles on the SiO2. X-ray diffraction measurements indicate a nominal bismuth grain size of 50 nm, and peak fitting to a simple bidisperse model yields a mixture of approximately 57 % bulk bismuth and 43 % 27 nm diameter crystallites. Nanoparticles as small as 5 nm are observed in transmission electron microscopy (TEM), but may not constitute a significant volume fraction of the sample. Differential scanning calorimetry reveals dramatic broadening in the temperatures over which melting and freezing occur and a surprising persistence of nanostructure after thermal cycling above the melting point of the Bi phase.

This letter describes the use of nanotransfer printing (nTP) for forming three-dimensional (3D) structures with feature sizes between tens of nanometers and tens of microns over areas of several square millimeters. We demonstrate three different approaches-deep etching through printed hard masks, direct transfer of three-dimensional structures, and purely additive fabrication of multilayer stacks-for using nTP to fabricate a range of complex 3D nanostructures, including closed channels, suspended beams, and nanochannel stacks, that would be difficult or impossible to build with other methods.

Transfer-printing is an important, commercial technology for manufacturing state of the art CPV modules, and has emerged recently as a key enabling technology for the realization of ultra-high-efficiency, mechanically stacked III-V solar cells with low cost. This paper presents the latest results for microscale CPV cells grown on GaAs, InP and GaSb substrates for ultra-high-efficiency, four-terminal, mechanically stacked architectures. The latest findings from a combination of modeling, growth, processing and characterization of single and multijunction solar cells are described, and the roadmap to the long-term goal of using transfer-printing to produce the first solar cell with 50% conversion efficiency is outlined.

This article reviews the properties, fabrication and assembly of inorganic semiconductor materials that can be used as active building blocks to form high-performance transistors and circuits for flexible and bendable large-area electronics. Obtaining high performance on low temperature polymeric substrates represents a technical challenge for macroelectronics. Therefore, the fabrication of high quality inorganic materials in the form of wires, ribbons, membranes, sheets, and bars formed by bottom-up and top-down approaches, and the assembly strategies used to deposit these thin films onto plastic substrates will be emphasized. Substantial progress has been made in creating inorganic semiconducting materials that are stretchable and bendable, and the description of the mechanics of these form factors will be presented, including circuits in three-dimensional layouts. Finally, future directions and promising areas of research will be described.

We developed means to form multilayer superstructures of large collections of single-walled carbon nanotubes (SWNTs) configured in horizontally aligned arrays, random networks, and complex geometries of arrays and networks on a wide range of substrates. The approach involves guided growth of SWNTs on crystalline and amorphous substrates followed by sequential, multiple step transfer of the resulting collections of tubes to target substrates, such as high-k thin dielectrics on silicon wafers, transparent plates of glass, cylindrical tubes and other curved surfaces, and thin, flexible sheets of plastic. Electrical measurements on dense, bilayer superstructures, including crossbars, random networks, and aligned arrays on networks of SWNTs reveal some important characteristics of representative systems. These and other layouts of SWNTs might find applications not only in electronics but also in areas such as optoelectronics, sensors, nanomechanical systems, and microfluidics.

A convenient process for generating large-scale, horizontally aligned arrays of pristine, single-walled carbon nanotubes (SWNTs) is described. The approach uses guided growth, by chemical vapor deposition (CVD), of SWNTs on miscut single-crystal quartz substrates. Studies of the growth reveal important relationships between the density and alignment of the tubes, the CVD conditions, and the morphology of the quartz. Electrodes and dielectrics patterned on top of these arrays yield thin-film transistors that use the SWNTs as effective thin-film semiconductors. The ability to build high-performance devices of this type suggests significant promise for large-scale aligned arrays of SWNTs in electronics, sensors, and other applications.