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In this paper, the p-GaN gate AlGaN/GaN high electron mobility transistors (HEMTs) with varying combinations of gate metal work function and gate geometry are fabricated and investigate the influence of gate leakage current (IGS) on the threshold voltage (VTH) and subthreshold swing (SS). The unique dependence of VTH and SS on gate geometry for different metals is observed, which is different from traditional field-effect transistors. A novel hybrid physics model, consisting of the traditional capacitance divider model and hole injection model, is proposed to explain this phenomenon, and the results exhibit an excellent agreement with the experimental data. The holes traverse the gate/p-GaN Schottky barrier by thermal emission or tunneling and inject into the p-GaN layer, generating the IGS. Expanding upon the traditional capacitance divider model, a portion of the injected holes accumulate at the p-GaN/AlGaN interface and induce the corresponding electrons at the AlGaN/GaN heterojunction, which promotes channel conduction. Hence, the transfer curves display the correlation between IGS and VTH as well as SS. The results show that high IGS can alleviate the instability of VTH caused by the lithographic overlay error, and simultaneously optimize SS. This work offers a novel perspective for examining the turn-on mechanism of p-GaN HEMTs, thereby contributing to device design. [ABSTRACT FROM AUTHOR]

This document is a collection of research papers on wide- and ultrawide-bandgap electronic semiconductor devices. It focuses on the progress and challenges in developing devices made from wide-bandgap materials like GaN, AlGaN, AlN, Ga2O3, BN, and diamond for power, rf, and photonic applications. The papers cover topics such as improving GaN power devices, exploring new wide bandgap materials, and investigating gate insulator properties. Additionally, there are papers on defect detection, new concepts for wide bandgap devices, and the growth and properties of different materials. The research provides valuable insights for researchers interested in using these materials in electronic devices. [Extracted from the article]

Herein, a high‐quality In0.1Al0.5Ga0.4N/GaN three‐channel (TC) heterostructure and the high‐electron‐mobility transistor (HEMT) based on it are proposed and investigated. The quaternary nitrides offer additional flexibility in adjusting the lattice constant and bandgap, enabling the achievement of a nearly strain‐free high‐Al‐content barrier. By stacking three In0.1Al0.5Ga0.4N/GaN heterostructures, a high 2D electron gas density of 2.59 × 1013 cm−2 and a high electron mobility of 1707 cm2 V−1 s−1 are achieved. As compared with the AlGaN/GaN TC heterostructure, the In0.1Al0.5Ga0.4N/GaN TC heterostructure reduces the sheet resistance by 39%, resulting in a 40 % reduction in the on‐resistance of the TC HEMT. Additionally, the inverse piezoelectric effect of the In0.1Al0.5Ga0.4N/GaN TC‐HEMT is investigated by negative‐gate voltage bias step‐stress experiments. During the stress experiments, no irreversible degradation is observed in the In0.1Al0.5Ga0.4N/GaN TC‐HEMT, while the AlGaN/GaN TC‐HEMT exhibits a significant deterioration beyond the critical voltage. The reliability related to the inverse piezoelectric effect of the devices can be further improved due to the lower stress in the lattice‐matched quaternary barrier. [ABSTRACT FROM AUTHOR]

To improve the threshold voltage and gate reliability of conventional enhancement-mode p-GaN-gated AlGaN/GaN high electron mobility transistors while maintaining a low on-resistance, an improved design solution for p-GaN HEMTs with P-I-N junction gate (PIN-HEMTs) has been proposed. Simulation results show that energy band modulation is achieved by adjusting the doping concentration and thickness of each layer of the PIN junction, and high-performance p-GaN gate HEMTs with adjustable threshold voltages ranging from 0.56 V to 4.75 V and gate breakdown voltages ranging from 19.8 V to 30.3 V would be prepared. The PIN-HEMT has a quasi-self-alignment property, which means that good gate control is independent of gate metal alignment. This not only improves the production efficiency but also solves the problems of weak gate control and electric field aggregation at the gate edge caused by the gate misalignment in conventional p-GaN gate HEMTs, thus realizing lower on-resistance and higher gate breakdown voltage, which demonstrates this proposed structure has excellent potentials for realizing effective and reliable high-power transistors. [ABSTRACT FROM AUTHOR]

Herein, a metal/insulator/p‐GaN gate HEMT (MIP‐HEMT) with Si3N4 gate dielectric layer is fabricated. Compared to the conventional p‐GaN HEMT, the MIP‐HEMT has a higher threshold voltage (Vth) of 4.8 V and better gate leakage suppression. The mechanism of threshold voltage increase in MIP‐HEMT is elucidated through an analysis of the electric field distribution in the gate region and the proposed gate capacitance model. Furthermore, MIP‐HEMTs with gate dielectric layers of varying dielectric constants and thicknesses are designed and simulated. The obtained results lead to the derivation of an empirical formula for the threshold voltage of the MIP‐HEMT under ideal dielectric/p‐GaN interface conditions, in relation to the dielectric constant and thickness of the gate dielectric layer. Additionally, simulations are conducted on the MIP‐HEMT incorporating fixed charges at the dielectric/p‐GaN interface, and the impact of interface charges is investigated. This refinement enables a more accurate prediction of the MIP‐HEMT's threshold voltage. Conclusively, MIP‐HEMTs can effectively modulate the threshold voltage by manipulating the parameters of the gate dielectric layer, thereby extending the threshold voltage range of conventional enhancement‐mode devices. [ABSTRACT FROM AUTHOR]

III-nitride heterostructure-based metal–insulator–semiconductor high-electron-mobility transistors (MIS-HEMTs), compared with Schottky and p-GaN gate HEMTs, have demonstrated significant potential in the next-generation high-power electronic devices due to their exceptional gate reliability. This study presents a comprehensive investigation of threshold voltage (VTH) instability in III-nitride heterostructure-based MIS-HEMTs, with a specific emphasis on the interfaces of the multi-heterostructures. Two widely studied amorphous materials, namely, Al2O3 and SiNx, have been extensively examined as primary gate insulators in GaN-based MIS-HEMTs. To efficiently remove native oxides from the (Al)GaN surface, a novel in situ high-temperature remote plasma pretreatment (RPP) technique has been developed. This technique involves sequential application of NH3/N2 plasmas on the (Al)GaN surface before depositing the gate insulators using plasma-enhanced atomic layer deposition. The remarkable RPP process has proven to be a highly effective method for revealing atomic steps on the GaN surface, irrespective of whether the surface has undergone oxidation or etching processes. To further enhance the interface quality and potentially reduce bulk traps in the gate insulator, optimization of deposition temperature and post-deposition annealing conditions have been explored. Additionally, an electron-blocking layer, such as SiON, is incorporated into the MIS-HEMTs to prevent electron injection into bulk traps within the insulator. Novel characterization techniques including constant-capacitance and isothermal-mode deep-level transient spectroscopy have also been developed to explore the failure mechanisms in MIS-HEMTs. These techniques allow for the differentiation between bulk traps in the GaN epitaxy and those present within the gate insulators. This in-depth physical understanding provides valuable insights into the sources of failure in GaN-based MIS-HEMTs. [ABSTRACT FROM AUTHOR]

In this paper, the ohmic contact mechanism and gate electrostatic control of a deep-recessed ohmic contact structure for multi-channel Al0.3Ga0.7N/GaN high electron mobility transistors (HEMTs) is investigated. A transmission electron microscope and an energy dispersive spectrum are utilized to investigate the ohmic contact interface mechanism. Due to a reduction of source/drain parasitic resistances and simultaneous connection of five channels by using deep-recessed ohmic contact, a large maximum drain current density and a distinct five hump feature of ultra-wider trans-conductance are achieved. More importantly, it is revealed that the downward expansion of the gate potential for the deep-recessed ohmic contact structure is much deeper than that for conventional devices. This characteristic leads to a remarkable reduction in subthreshold swing (SS) and off-state leakage, indicating an ultra-wide and high trans-conductance profile. The fabricated devices show a lower off-state drain leakage, a lower SS, and a wider gate voltage swing (40 V). Due to an enhancement of gate electrostatic control, the current collapse and electrical reliability characteristics of multi-channel Al0.3Ga0.7N/GaN HEMTs with deep-recessed ohmic contact also improve. The results presented here indicate that the multi-channel device has great potential for high current and wide bandwidth applications. [ABSTRACT FROM AUTHOR]

β-(AlxGa1−x)2O3/Ga2O3 modulation-doped field-effect transistors (MODFETs) with a dual-metal gate (DMG) architecture are designed, and the electrical characteristics of the DMG device are investigated in comparison with the single-metal gate (SMG) device by the Technology Computer-Aided Design (TCAD) simulation. The results demonstrate that the DMG MODFETs possess a superior transconductance (gm), current gain cut-off frequency (fT), and power gain cut-off frequency (fMAX) than those of SMG transistors, which is attributed to the regulated channel electric field by a DMG structure. With a gate length of 0.1 μm, the peak values of fT/fMAX of the designed DMG MODFET are obtained as 48.6/50.6 GHz, respectively. Moreover, a comprehensive thermal analysis is conducted between the SMG and DMG devices under steady-state and transient conditions. The DMG MODFET exhibits a lower maximum temperature than the SMG counterpart due to the reduced channel electric field, each subjected to the same power dissipation. This finding underscores the potential of the β-(AlxGa1−x)2O3/Ga2O3 MODFET with the DMG architecture as a promising approach for high-power radio frequency operations. [ABSTRACT FROM AUTHOR]

The impact of embedded microfluidic cooling on the performance of Ku-band gallium nitride (GaN) microwave monolithic integrated circuit (MMIC) power amplifiers (PAs) has been studied in this work. The research demonstrates that embedded cooling can substantially lower junction temperatures, mitigate the self-heating effect, and thereby improve the electrical performance of GaN MMIC PAs. Using merely 10.4 mW of pumping power (Ppump), the technology reduces the maximum junction temperature (Tj,max) from 216.7 to 147.8 °C. Furthermore, the system enhances the saturation current by 13.8%, increases output power (Pout) and gain (Gain) by 1.8 dB, elevates the power added efficiency (PAE) by 5.9%, and improves the heat flux of last gate (Qgate) to 37.3 kW/mm2 and the heat flux of MMIC (QMMIC) over 2.6 W/mm2, while reducing the thermal resistance (Rj-c) from 2.13 to 1.26 °C/W. Additionally, there is a notable improvement of the small signal gain (S21) by 2.5 dB. Therefore, the achievements in this work indicate that embedded cooling offers a powerful technique to suppress the thermal effects on GaN MMIC PAs, consequently improving their electrical performance. [ABSTRACT FROM AUTHOR]

In this Letter, a single-event burnout (SEB) mechanism in gallium nitride (GaN) microwave monolithic integrated circuit power amplifiers with a high linear energy transfer of 78.1 MeV·cm2/mg has been investigated in detail. A typical SEB phenomenon was observed. With the aid of photon emission measurements and scanning electron microscopy, it is found that catastrophic burnout occurs in the power-stage GaN high electron mobility transistors (HEMTs) and the metal–insulator–metal (MIM) capacitors, respectively. For the GaN HEMT, the incident heavy ions will generate electron–hole pairs within it, which can gain enough energy with the transverse high electric field. The high-energy electrons will collide with the lattice near the drain electrode and induce significant electron trapping, which will result in a significant longitudinal local electric field. When a critical electric field is achieved, catastrophic burnout occurs. For the MIM capacitor, the burnout is attributed to the single-event dielectric rupture via severe impact ionization or latent tracks when heavy ions strike it. [ABSTRACT FROM AUTHOR]

This work presents highly responsive gate-controlled p-GaN/AlGaN/GaN ultraviolet photodetectors (UVPDs) on Si substrates with a high-transmittance ITO gate. The two-dimensional electron gas (2DEG) in the quantum well of the polarized AlGaN/GaN heterojunction was efficiently depleted by the p-GaN gate, leading to a high photo-to-dark current ratio (PDCR) of 3.2 × 105. The quantum wells of the p-GaN/AlGaN and AlGaN/GaN heterojunctions can trap the holes and electrons excited by the UV illumination, thus efficiently triggering a photovoltaic effect and photoconductive effect, separately. Furthermore, the prepared photodetectors allow flexible adjustment of the static bias point, making it adaptable to different environments. Compared to traditional thin-film semi-transparent Ni/Au gates, indium tin oxide (ITO) exhibits higher transmittance. Under 355 nm illumination, the photodetector exhibited a super-high responsivity exceeding 3.5 × 104 A/W, and it could even exceed 106 A/W under 300 nm illumination. The well-designed UVPD combines both the advantages of the high-transmittance ITO gate and the structure of the commercialized p-GaN/AlGaN/GaN high-electron-mobility transistors (HEMTs), which opens a new possibility of fabricating large-scale, low-cost, and high-performance UVPDs in the future. [ABSTRACT FROM AUTHOR]

The density of interface states is strongly related to the performance of AlGaN/GaN high-electron-mobility transistors (HEMTs) and is normally attributed to the degradation of the carrier mobility and gate leakage current. The density of interface states is optimized in conventional AlGaN/GaN HEMTs through the use of different passivation layers. However, different passivation layers may create more complex interface structures. In our previous work, ferroelectric polarization was used to regulate the carrier concentration in AlGaN/GaN HEMTs. Herein, we propose a ferroelectric passivation-layer-induced pure field effect modulation within the AlGaN/GaN heterojunction field-effect transistors. After positive poling, the interface trap density (D i t ) decreases by 71% and current collapse is reduced. The output current (I D S ) increases from 408 to 462 mA/mm and transconductance (g m) increases from 88 to 149 mS/mm. Simultaneously, the carrier mobility in the channel is also greatly improved after positive poling. When negative poling is applied, the gate leakage decreases and the breakdown voltage of the device increases by 55%. Our work provides a simple and effective way to study the density of interface states in GaN device design and optimization. [ABSTRACT FROM AUTHOR]

Passivation is commonly used to suppress current collapse in AlGaN/GaN HEMTs. However, the conventional PECV-fabricated SiNx passivation layer is incompatible with the latest process, like the "passivation-prior-to-ohmic" method. Research attention has therefore turned to high-temperature passivation schemes. In this paper, we systematically investigated the differences between the SiNx/GaN interface of two high-temperature passivation schemes, MOCVD-SiNx and LPCVD-SiNx, and investigated their effects on the ohmic contact mechanism. By characterizing the device interface using TEM, we reveal that during the process of MOCVD-SiNx, etching damage and Si diffuses into the semiconductor to form a leakage path and reduce the breakdown voltage of the AlGaN/GaN HEMTs. Moreover, N enrichment at the edge of the ohmic region of the LPCVD-SiNx device indicates that the device is more favorable for TiN formation, thus reducing the ohmic contact resistance, which is beneficial to improving the PAE of the device. Through the CW load-pull test with drain voltage VDS = 20V, LPCVD-SiNx devices obtain a high PAE of 66.35%, which is about 6% higher than MOCVD-SiNx devices. This excellent result indicates that the prospect of LPCVD-SiNx passivation devices used in 5G small terminals will be attractive. [ABSTRACT FROM AUTHOR]

A GaN high-electron-mobility transistor (HEMT) was simulated using the semiconductor simulation software Silvaco TCAD in this paper. By constructing a two-dimensional structure of GaN HEMT, combined with key models such as carrier mobility, the effects of a different state, different incidence position, different drain voltage, different LET values, and a different incidence angle on the single-event transient effect of GaN HEMT are simulated. LET stands for the linear energy transfer capacity of a particle, which refers to the amount of energy transferred by the particle to the irradiated substance on the unit path. The simulation results show that for GaN HEMTs, the single-event transient effect is more obvious when the device is in off-state than in on-state. The most sensitive location of GaN HEMTs to the single-event effect is in the region near the drain. The peak transient current increases with the increase in the drain bias and incident ion LET values. The drain charge collection time increases with the angle of incidence of heavy ion. [ABSTRACT FROM AUTHOR]

In this study, AlGaN/GaN nanochannel high-electron-mobility transistors (HEMTs) with tri-gate (TGN-devices) and dual-gate (DGN-devices) structures were fabricated and investigated. It was found that the peak value of the transconductance (Gm), current gain cut-off frequency (fT) and power gain cut-off frequency (fmax) of the TGN-devices were larger than that of the DGN-devices because of the enhanced gate control from the top gate. Although the TGN-devices and DGN-devices demonstrated flattened transconductance, fT and fmax profiles, the first and second transconductance derivatives of the DGN-devices were lower than those of the TGN-devices, implying an improvement in linearity. With the nanochannel width decreased, the peak value of the transconductance and the first and second transconductance derivatives increased, implying the predominant influence of sidewall gate capacitance on the transconductance and linearity. The comparison of gate capacitance for the TGN-devices and DGN-devices revealed that the gate capacitance of the tri-gate structure was not simply a linear superposition of the top planar gate capacitance and sidewall gate capacitance of the dual-gate structure, which could be attributed to the difference in the depletion region shape for tri-gate and dual-gate structures. [ABSTRACT FROM AUTHOR]

The bias temperature instability (BTI) effect of p-GaN gate high-electron-mobility transistors (HEMTs) is a serious problem for reliability. To uncover the essential cause of this effect, in this paper, we precisely monitored the shifting process of the threshold voltage (VTH) of HEMTs under BTI stress by fast sweeping characterizations. The HEMTs without time-dependent gate breakdown (TDGB) stress featured a high VTH shift of 0.62 V. In contrast, the HEMT that underwent 424 s of TDGB stress clearly saw a limited VTH shift of 0.16 V. The mechanism is that the TDGB stress can induce a Schottky barrier lowering effect on the metal/p-GaN junction, thus boosting the hole injection from the gate metal to the p-GaN layer. This hole injection eventually improves the VTH stability by replenishing the holes lost under BTI stress. It is the first time that we experimentally proved that the BTI effect of p-GaN gate HEMTs was directly dominated by the gate Schottky barrier that impeded the hole supply to the p-GaN layer. [ABSTRACT FROM AUTHOR]

The channel temperature distribution and breakdown points are difficult to monitor for the traditional p-GaN gate HEMTs under high power stress, because the metal gate blocks the light. To solve this problem, we processed p-GaN gate HEMTs with transparent indium tin oxide (ITO) as the gate terminal and successfully captured the information mentioned above, utilizing ultraviolet reflectivity thermal imaging equipment. The fabricated ITO-gated HEMTs exhibited a saturation drain current of 276 mA/mm and an on-resistance of 16.6 Ω·mm. During the test, the heat was found to concentrate in the vicinity of the gate field in the access area, under the stress of VGS = 6 V and VDS = 10/20/30 V. After 691 s high power stress, the device failed, and a hot spot appeared on the p-GaN. After failure, luminescence was observed on the sidewall of the p-GaN while positively biasing the gate, revealing the side wall is the weakest spot under high power stress. The findings of this study provide a powerful tool for reliability analysis and also point to a way for improving the reliability of the p-GaN gate HEMTs in the future. [ABSTRACT FROM AUTHOR]

To resolve the parasitic problems and to fully leverage the superiority of GaN‐based high electron mobility transistors, monolithic integration of different function blocks is a promising solution. The enhancement mode (E‐mode) GaN‐based p‐channel heterostructure field‐effect transistor (p‐HFET) is one of the key components. Herein, the threshold voltage (VTH) is modeled, and the influence of the Mg out‐diffusion effect on VTH is investigated. The impact of the diffusion coefficient of Mg, the Mg concentration in the p‐GaN layer, the thicknesses of the AlGaN layer (tb), p‐GaN channel layer (tch), and an oxide layer (tox) on VTH are all taken into consideration for systematic exploration. The analysis illustrates that lower Mg concentration, smaller diffusion coefficient, and thinner p‐GaN channel and AlGaN layers facilitate the realization of E‐mode p‐HFETs. Furthermore, it can be observed that lower Mg concentration in the p‐GaN layer diminishes the VTH sensitivity to the thickness of the p‐GaN channel layer. Hence, a heterostructure with two p‐GaN layers of different concentrations is suggested to reduce the complexity of the etching technique while improving the ohmic contacts. As a result, the model can effectively guide the design of GaN‐based E‐mode p‐HFETs. [ABSTRACT FROM AUTHOR]

In this Letter, we demonstrated deep sub-60 mV/dec subthreshold swings (SS) independent of gate bias sweep direction in GaN-based metal–insulator–semiconductor high electron mobility transistors (MISHEMTs) with an Al0.6Ga0.4N/GaN heterostructure and in situ SiN as gate dielectric and surface passivation. Average SS values of 22 and 29 mV/dec over 3–4 orders of drain current (ID) swing were measured during forward and reverse sweeps, respectively, in a 75-nm gate length (LG) device. Sub-60 mV/dec SS was also observed in the GaN MISHEMTs with longer LG up to 350 nm. The intrinsic physical mechanisms of deep sub-60 mV/dec SS were comprehensively studied. The observed negative differential resistance in the gate current, the kinks in the output ID-VD curve, and the capacitance spike in the depletion region of the C–V curves suggest that the capture and emission of electrons in the traps are the dominant physical mechanisms responsible for the small SS. [ABSTRACT FROM AUTHOR]

In this work, high-performance high-electron-mobility transistors (HEMTs) with a thin GaN channel and an AlN back barrier were fabricated and investigated in detail. The AlN back barrier HEMTs possess a higher current density and a better linearity than traditional devices. In addition, the off-state leakage current of the AlN back barrier HEMTs is more than one order of magnitude lower than that of traditional devices with a high-resistance Fe-doped GaN buffer, even though they do not involve any intentional doping technique. Additionally, the high-temperature performance of the AlN back barrier HEMTs is excellent, with less attenuation in the drain current density and less increase in the off-state leakage current. Moreover, the breakdown voltage of the AlN back barrier HEMTs is as high as 309 V with an LGD of 2.5 μm, resulting in a high Baliga figure of merit of 0.354 GW/cm2. The superior performance of the AlN back barrier devices is further demonstrated by the calculation and simulation results. The results in this work not only show the great potential of AlN back barrier HEMTs but also provide a useful direction for overcoming the limiting issues of nitride devices. [ABSTRACT FROM AUTHOR]

In this paper, Silvaco TCAD software is used to simulate the buffer traps in AlGaN/GaN high electron mobility transistors (HEMTs), and its effects on the breakdown performance and key parameters of the devices are investigated by changing the position and concentration of the acceptor traps in the buffer layer. The results show that with the increase of trap concentration, the traps capture electrons and reduce the off-state leakage current, which can improve breakdown voltage of the devices. At the same time, as the trap concentration increases, the ionized traps make a high additional electric field near the drain edge, leading to the decrease of breakdown voltage. With the combined two effects above, the breakdown voltage almost ultimately saturates. When the source-to-gate (Access-S) region in the GaN buffer layer is doped alone, the minimum and most linear leakage current for the same trap concentrations are obtained, and the additional electric field has a relatively small effect on the electric field peak near the drain as the ionized traps are furthest from drain. All these factors make the breakdown voltage increase more controllably with the Access-S region doping, and it is a more potential way to improve the breakdown performance. [ABSTRACT FROM AUTHOR]

In this letter, a linearity enhancement AlGaN/ GaN high electron mobility transistor (HEMT) with high power density and high efficiency has been achieved by selective-area charge implantation (SCI) for X-band application. Device-level transconductance compensation is realized by an under-gate SCI technique, which greatly improves the linearity of the device. The device presents a maximum drain current of 1390 mA/mm and a peak transconductance of 230 mS/mm. The gate voltage swing is up to 5.2 V, which is double of the conventional devices. At 12 GHz with a drain voltage of 25 V, the SCI device exhibits a peak power added efficiency of 47 % and a saturated output power density of 6.7 W/mm. In addition, the two-tone measurement results at 12 GHz show that the SCI device manifest an excellent linearity figure of merit OIP3/ $\text{P}_{\text {DC}}$ of 11.2 dB, whereas that of the conventional HEMTs is only 5.5 dB. These results suggest SCI HEMTs have immense potential for microwave power amplifiers requiring high linearity. [ABSTRACT FROM AUTHOR]

In this paper, AlN films grown by magnetron sputtering method have been proposed as the gate insulator layer of AlGaN/GaN high electron mobility transistors (HEMTs) to decrease gate leakage current and suppress the interface trap. The effect of the temperature of substrate on the quality of AlN films have been investigated. By inserting the thin AlN film (35 nm) as a gate insulator layer, the on-state resistance of AlGaN/GaN HEMTs decrease from 11.1 Ω mm to 10.3 Ω mm @ V g = 0 V, the current collapse decreases from 16.6% to 3.2%, the gate leakage can be reduced from 1.2 Ă— 10âˆ'1A mmâˆ'1 to 4.4 Ă— 10âˆ'6A mmâˆ'1 @ V g = 2 V by five orders of magnitude, and the fast interface states disappear and the normal trap density decreases from 0.96â€"1.3 Ă— 1013 cmâˆ'2eVâˆ'1 to 1.3â€"3.4 Ă— 1012 cmâˆ'2 eVâˆ'1, proving that magnetron-sputtered AlN is an effective way to improve the performance of GaN HEMTs. [ABSTRACT FROM AUTHOR]

Low-damage plasma oxidation treatment for AlN/GaN high-electron-mobility transistors (HEMTs) was developed in this letter, with which high-performance enhancement-mode (E-mode) AlON/AlN/GaN HEMTs were demonstrated. After removal of in situ SiN cap layer within gate area, remote plasma oxidation (RPO) treatment of 4.9nm AlN barrier layer at 300 °C leads to formation of AlON insulator layer and effective depletion of 2-D electron gas channel, without etch-induced damage or serious interfacial issues compared with the commonly used gate- recess metal-insulator-semiconductor HEMTs. Thanks to the low-damage RPO treatment, the achieved E-mode HEMTs with threshold voltage of 0.4 V exhibit quite a small loss of output current (7.8%) compared with the depletion-mode devices. In addition, the AlON gate insulator layer results in a remarkable increase in breakdown voltage of devices from 20 V to 74 V, which benefits the high-voltage operation of AlN/GaN technology. Further investigation shows that the oxidation process of AlN barrier tends to be saturated with treatment time increasing, providing a promising solution to the high-performance E-mode operation of scaled GaN-based HEMTs in RF applications. [ABSTRACT FROM AUTHOR]

A hybrid Schottky–ohmic drain technology for millimeter-wave (mmW) AlGaN/GaN high-electron-mobility transistors (HEMTs) is proposed. The Schottky metal extension in the ohmic region of drain reduces the actual source–drain spacing, resulting in a smaller ON-resistance and a higher maximum current. Extended Schottky metal in the drain region modulates the electric-field distribution, thereby leading to an improved breakdown voltage, suppressed current collapse, and high reliability. Compared with the ohmic drain, the current gain cutoff frequency (${f}_{T}$) was improved from 64 to 76 GHz, and the maximum oscillation frequency (${f}_{\text {max}}$) was improved from 125 to 157 GHz, resulting from the decreased parasitic drain resistance (${R}_{d}$). Moreover, large-signal measurements in continuous wave (CW) at 30 GHz demonstrated a peak power-added efficiency (PAE) of 45.5% and a saturated output power density (${P}_{\text {sat}}$) of 8.5 W/mm at ${V}_{\text {ds}}= {30}$ V. In addition, the direct current (DC) and radio frequency (RF) characteristics showed a negligible degradation after large-signal measurements at 30 GHz. [ABSTRACT FROM AUTHOR]

In this article, the impact of the graded AlGaN back barrier and Fe\C co-doping buffer structure on the AlGaN $/$ GaN high electron mobility transistors (HEMTs) is proposed and systematically investigated. Due to effective suppression of Fe tail in unintentionally doped GaN (uid-GaN) layer by the insertion of the thick graded AlGaN back barrier layer, a large maximum drain current density and a transconductance peak are achieved. Meanwhile, the breakdown voltage is significantly improved by the use of Fe\C co-doping GaN buffer design. More importantly, it is revealed that the graded-AlGaN design can reduce the range and intensity of the electrical potential distribution in uid-GaN layer and then effectively suppress the acceptor-induced trapping\detrapping effect under high drain voltage. The RF small-signal performance of Fe-doped GaN (GaN:Fe)\C co-doping buffer HEMT exhibits significant improvement. In addition, load-pull measurement at 8 GHz revealed that a saturation power increases from 38.04 to 41.07 dB, a power gain increases from 9.06 to 10.58 dB, and an associate power-added-efficiency (PAE) increased from 40.27% to 50.18%. Our proposed GaN-based epitaxial structure can not only suppress the gate lag by reduce AlGaN surface electric field, but it can also suppress the drain lag by reduce the amplitude and range of potential distribution. It indicates that our proposed device has great potential for future high-voltage RF power amplifier application. [ABSTRACT FROM AUTHOR]

Efficiency and privacy-preserving are two key requirements in developing computing systems for processing of privacy-related information. Here, we experimentally demonstrate one AlGaN/GaN high-electron-mobility transistor (HEMT) one Au/NbOx/HfO2/Pt memristor (1HT1R) structure, which features sub-8ns latency, < 96 fJ programming energy, 104s retention at 85 °C and endurance of >106 cycles. We further build a hardware encryptor by combining HEMT-implemented XOR gate and a true random number generator (TRNG) based on variation in Pt/SiOx:Ag/Pt memristor. The proposed TRNG is able to generate 0.48Mb random bitstreams with ultralow energy consumption of 50fJ/bit. A memristors-based homomorphic encryption system is thus constructed based on the 1HT1R and hardware encryptor, capable of performing image segmentation with ultrafast speed, low energy consumption, and privacy-preserving capability. [ABSTRACT FROM AUTHOR]

In this Letter, the effects of trap states in AlN/GaN superlattice channel HEMTs (high electron mobility transistors) under total ionizing dose with γ-irradiation have been systematically investigated. After 1 Mrad γ-irradiation with a dose rate of 50 rad/s, negative drifts in threshold voltage and C–V characteristics are observed. Simultaneously, the two-dimensional electron gas sheet density of the upper channel increases from 5.09 × 1012 to 5.47 × 1012 cm−2, while that of the lower channel decreases from 4.41 × 1012 to 3.86 × 1012 cm−2, respectively. Furthermore, frequency-dependent capacitance and conductance measurements are adopted to investigate the evolution of trap states in an electron channel. The trap state density (DT = 0.21–0.88 × 1013 cm−2 eV−1) is over the ET range from 0.314 to 0.329 eV after irradiation for the upper channel, while the trap state in the lower channel decreases from 4.54 × 1011 cm−2 eV−1 at ET = 0.230 eV to 2.38 × 1011 cm−2 eV−1 at ET = 0.278 eV. The density (1.39–1.54 × 1011 cm−2 eV−1) of trap states with faster τT (0.033–0.037 μs) generated in a lower channel is located at shallower ET between 0.227 and 0.230 eV. The results reveal the mechanism of trap states in the channel, affecting the performance of HEMTs, which can provide a valuable understanding for hardening in space radiation. [ABSTRACT FROM AUTHOR]

This work reports an AlN/GaN/InGaN high electron mobility transistor (HEMT) with a steep subthreshold swing (SS) of sub-60 mV/dec utilizing a coupling-channel architecture. The fabricated transistors show a negligible hysteresis, a SS of 39 mV/dec, a large gate voltage swing of >4.2 V, and achieving an excellent quality factor Q = gm/SS of 6.3 μS-dec/μm-mV. The negative differential resistance effect was found in the subthreshold region in the gate current–voltage (Ig–VGS) curve. The hot carrier transfer mechanism that occurred in the turn-on/pinch-off progress of the CC-HEMT under the dual-directional sweep, proved by the VDS- and Lg-dependent bi-directional transfer I–V characteristics, can be responsible for these excellent device performances. This work is believed to encourage further study of the AlN/GaN platform to power the future group III-nitrides CMOS technology. [ABSTRACT FROM AUTHOR]

In this work, ultrathin barrier (∼6 nm) AlGaN/GaN high-electron-mobility transistors (HEMTs) with in situ SiN gate dielectric and slant-field plate (SFP) T-gates were fabricated and analyzed. Since the proposed scheme of gate dielectric and SFP effectively suppresses the gate leakage and alleviates the peak electric field (E-field) around gate region, the maximum breakdown voltage (VBK) was improved to 92 V, which is 54 V higher than that of the conventional device. The fabricated ultrathin AlGaN/GaN HEMT with 60-nm SFP-T-gate exhibited the peak fT of 177 GHz and peak fmax of 393 GHz, yielding high figure-of-merits of fT · VBK = 16 THz V and fmax·VBK = 36 THz V. Moreover, load-pull measurements at 30 GHz reveal that these devices deliver output power density (Pout) of 4.6 W/mm at Vds = 20 V and high power-added efficiency up to 52.5% at Vds = 10 V. Essentially, the experimental results indicate that the employment of SFP and in situ SiN gate dielectric is an attractive approach to balance the breakdown and speed for millimeter wave devices. [ABSTRACT FROM AUTHOR]

DC performances of a depletion-mode 100-nm In0.53Ga0.47As/InP composite channel InP-based high-electron-mobility transistor (HEMT) is investigated by using numerical simulation. The transfer, output, and breakdown characteristics of different doped InP subchannel thickness In0.53Ga0.47As/InP composite channel HEMT are compared. Decreasing the thickness of the doped InP subchannel from 10 to 5 nm results in a decline of the output current. However, the threshold voltage is increased from −0.77 to −0.6 V and the breakdown voltage is improved from 1.99 to 5.69 V at bias of ${V}_{{\mathrm {gs}}}-{V}_{{\mathrm {t}}} = -0.5$ V. To enhance the breakdown characteristic of In0.53Ga0.47As/InP composite channel HEMT, we minimize the thickness of the doped InP layer and replace the doped InP layer with the delta-doped layer. The structure is compared with the conventional double delta-doped structure in the performance of transfer, output, and breakdown characteristics. At ON-state, the electrons of two kinds of structure concentrate in the InGaAs channel. The output current and the threshold voltage of the composite channel structure are at the same level compared with the conventional double delta-doped structure. However, at OFF-state, because of the transfer of electrons into the InP subchannel, part of electric potential will not be concentrated at the drain side of the gate region but distributed in other area of the channel. A higher drain voltage is required to achieve electric field strength enough to breakdown and the breakdown voltage is improved obviously. [ABSTRACT FROM AUTHOR]

In this article, the single event burnout (SEB) performances for 2DEG Alx $\text{Ga}_{{1}-{x}}\text{N}$ channel p-GaN gate high electron mobility transistors (HEMTs) have been investigated comprehensively to reveal the failure mechanisms and broaden applications in harsh environments. As Al composition ${x}$ increases from 0.0 to 0.4, ${V}_{\text {BR}}$ increases from 500 to 730 V, and the corresponding SEB voltage ${V}_{\text {SEB}}$ at linear energy transfer (LET) = 10 pC/ $\mu \text{m}$ increases from 300 to 450 V. Possible mechanisms of Alx $\text{Ga}_{{1}-{x}}\text{N}$ channel HEMTs from the perspective of electric field (${E}$ -field) are proposed. ${E}$ -field near source and drain side after radiation would have a high peak ${E}$ -field and that of p-GaN layer exceeds 3.3 MV/cm of critical ${E}$ -field for GaN material, causing SEB to occur (LET = 10 pC/ $\mu \text{m}$). When SEB occurs in HEMTs, ${E}$ -field would increase rapidly and cannot be recovered. A new phenomenon has been first discovered when SEB occurs in Alx $\text{Ga}_{{1}-{x}}\text{N}$ channel HEMTs with p-GaN gate (${x} = {0.0}$ –0.4, step = 0.1). In addition to the back-channel effect, an excess of holes would be left in the buffer layer after electrons flow toward the drain. It allows the injection of an excess of holes in the buffer layer into the gate with low potential, resulting in a sharp increase in ${I}_{\text {G}}$. Simulation results indicate that AlGaN channel HEMTs have great advantages in SEB performances compared with the traditional GaN channel HEMTs. [ABSTRACT FROM AUTHOR]

In this article, we report on demonstrating high-performance AlGaN/GaN high-electron-mobility-transistor (HEMT) on free-standing GaN (FS-GaN) substrate with low contact resistance (${R}_{C}$) and high breakdown voltage (BV). Non-regrowth ${R}_{C}$ as low as $0.23 \Omega \cdot $ mm was achieved by using the self-aligned Ohmic etching process and nonfield plated BV as high as 193 V was also acquired due to the low dislocation density of the epi-layer on FS-GaN substrate. It is found that the reduction of the ${R}_{C}$ is induced by the smaller electron tunneling width across the AlGaN barrier layer, rather than the formation of dislocation related metal spikes. The fabricated GaN HEMT was a peak extrinsic transconductance (${g}_{m}$) of 203 mS/mm and a drain current (${I}_{D}$) ON/OFF ratio of 106–107. Benefited from the low ${R}_{C}$ , a cut-off frequency/maximum oscillation frequency (${f}_{T}/{f}_{max}$) of 26/73 GHz was extracted at a gate length (${L}_{g}$) of 600 nm, yielding a ${f}_{T}\cdot {L}_{g}$ value of 15.6 GHz $\cdot \mu \text{m}$ and a Johnson’s figure-of-merit (J-FOM) of 5.0 THz $\cdot \text{V}$ , which are the highest values among all AlGaN/GaN HEMTs on FS-GaN substrate. This work implies that GaN HEMTs on FS-GaN substrate with low ${R}_{C}$ turn out to be a promising candidate for high-performance radio frequency (RF) power device applications. [ABSTRACT FROM AUTHOR]

AlGaN/GaN high-electron-mobility transistors (HEMTs) with Si-rich SiN/Si3N4 bilayer passivation were studied in this article. The use of a Si-rich SiN interlayer leads to improved channel transport property, current collapse, power performance, and temperature-dependent stability. Devices without Si-rich SiN interlayer passivation exhibit an increase in the gate leakage current by over three orders of magnitudes with temperature increasing from 300 to 420 K, leading to an increase in a current collapse from 9.7% to 24.7%, while the devices with Si-rich SiN passivation exhibit a weak temperature dependence of leakage current and a constant current collapse about 5%. Small signal characterization shows that Si-rich SiN passivation results in a remarkable decrease in the effective gate length by ~15% with temperature up to 420 K. At 17 GHz, devices with Si-rich SiN interlayer passivation exhibit an output power density of 7 W/mm and a peak power-added efficiency (PAE) of 56%. The improved power performance of devices using Si-rich SiN interlayer passivation is attributed to the suppressed current collapse and superior device stability under high channel temperature. [ABSTRACT FROM AUTHOR]

This work presents the threshold voltage modulation of the thin‐barrier Al0.45Ga0.55N/GaN Fin‐metal oxide semiconductor‐high electron mobility transistors (MOS‐HEMTs) with two types of p‐type metal oxide (CuO and NiO) and one type of HfO2 gate dielectrics. Different p‐type oxides and different fin structures can modulate the threshold voltage of the devices. The CuO and NiO Fin‐MOS‐HEMT with 60 nm fin width (Wfin) achieves the Vth value of 0.3 and 0.6 V, respectively. Compared with the conventional HEMT, the Vth of NiO Fin‐MOS‐HEMT can be positively shifted by 2.5 V, validating the stronger 2D electron gas (2DEG) depletion by the p‐type oxide and the Vth will shift forward with the decrease of Wfin. Furthermore, the theoretical calculation model of Fin‐MOS‐HEMT threshold voltage is proposed, which is in good agreement with the experimental results. The proposed model can provide important guidelines for the AlGaN/GaN Fin‐MOS‐HEMTs development. [ABSTRACT FROM AUTHOR]

This work reports recent progress in the sub-6 GHz power performance of GaN-based HEMTs grown on high resistivity silicon substrates with passivation implanted termination (PIT) process. Thanks to the mitigated electric field crowding at the gate edge and the suppressed negative fixed charge-induced carrier depletion, the fabricated HEMTs demonstrate a low leakage current, a high ON/OFF current ratio of 108, and improved breakdown voltage associated with a current collapse at 40 V drain quiescent condition of as low as 5.6%. S-band continuous-wave large signal measurements yield a high power-added efficiency (PAE) of 69%, a drain efficiency (DE) of 72%, and an output power density (${P}_{\text{out}}$) of 7.2 W/mm at ${V}_{\text{DS}}=30$ V. Moreover, the transistor delivers a maximum ${P}_{\text{out}}$ up to 10.2 W/mm with a peak PAE of 63.8% at ${V}_{\text{DS}}=40$ V. The PAE and ${P}_{\text{out}}$ as a function of drain bias indicate that the transistors remain constant high PAE and linearly increased ${P}_{\text{out}}$ over a wide range of drain voltage variation. These excellent results have demonstrated the PIT process could be an attractive technique to facilitate the application of high-performance and cost-competitive GaN-on-Si HEMTs for 5G wireless base stations. [ABSTRACT FROM AUTHOR]

In this work, high-performance millimeter-wave AlGaN/GaN structures for high-electron-mobility transistors (HEMTs) are presented using a Si-rich SiN passivation layer. The analysis of transient and x-ray photoelectron spectroscopy measurements revealed that the presence of the Si-rich SiN layer leads to a decrease in the deep-level surface traps by mitigating the formation of Ga–O bonds. This results in a suppressed current collapse from 11% to 5% as well as a decreased knee voltage (Vknee). The current gain cutoff frequency and the maximum oscillation frequency of the devices with the Si-rich SiN layer exhibit the values of 74 and 140 GHz, respectively. Moreover, load-pull measurements at 30 GHz show that the devices containing the Si-rich SiN deliver excellent output power density of 8.7 W/mm at Vds = 28 V and high power-added efficiency up to 48% at Vds = 10 V. The enhanced power performance of HEMTs using Si-rich SiN interlayer passivation is attributed to the reduced Vknee, the suppressed current collapse, and the improved drain current. [ABSTRACT FROM AUTHOR]

A two-dimensional electron gas (2DEG) in (Al, Ga) N/GaN heterojunction (AlGaN/GaN) is a key factor that affects the performance of GaN-based high electron mobility transistor (HEMT) devices. Previous studies have shown that the ferroelectric polarization can effectively control the density of the 2DEG at the AlGaN/GaN interface; however, the correlation between two-dimensional distribution of ferroelectric polarization (i.e., ferroelectric domains) and its ability to confine the 2DEG is yet to be investigated. In this work, ferroelectric domain-induced modulation of the 2DEG in the AlGaN/GaN heterostructure was characterized using microscopic as well as local transport measurement techniques. The results suggest direct evidence for effective ferroelectric domain engineering in GaN HEMTs, as predicted by theoretical calculations. Additionally, a prototype device was fabricated, where gating was realized by utilizing the polarization of the ferroelectric domain. Considering the nonvolatile and reconfigurable advantages of a ferroelectric domain, the E-mode, D-mode, and even multi-channel output characteristics were realized in the same device by artificially engineered ferroelectric domain structures. These results offer a promising solution for the contradiction between the 2DEG density and gate controllability in GaN HEMTs, thereby showing a great potential of GaN radio frequency devices with further scaled gate lengths down to a few nanometers in the future. [ABSTRACT FROM AUTHOR]

A GaN complementary field-effect transistor (FET) inverter monolithically integrated with power gate-injection high-electron-mobility transistors (HEMTs) was realized on a Si substrate. The GaN p-channel and n-channel logic devices and power devices were fabricated based on a p-GaN/AlGaN/GaN epi-structure. Through optimization of epi-layer thickness and doping, excellent low-level noise margin (NML) of 1.47 V and high-level noise margin (NMH) of 0.98 V were achieved at a supply voltage ${V}_{\text {DD}}$ of 3 V at room temperature. A maximum current density (${I}_{\text {D,max}}$) of 0.36 mA/mm/220 mA/mm at ${V}_{\text {DS}}$ of −3 V/3 V and a threshold voltage ${V}_{\text {TH}}$ of −2.0 V/+2.3 V were achieved in the p-channel and n-channel FETs, respectively. A propagation delay of an inverter stage $\tau _{\text {pd}}$ in a ring oscillator was measured to be $1.67~\mu \text{s}$. The power gate-injection HEMT has an ON-resistance ${R}_{ \mathrm{\scriptscriptstyle ON}}$ of $18.7~\Omega \cdot $ mm and a breakdown voltage (BV) of 900 V. These results show the great potential of the developed GaN complementary FET technology in the applications of GaN power modules. [ABSTRACT FROM AUTHOR]

In this work, the performance of AlGaN/ gallium nitride (GaN) high-electron mobility transistors (HEMTs) with different Fe doping tails was systematically investigated and compared. It is illustrated that the combination of the unintentionally doped (UID) GaN layer and a thinner Fe doping buffer layer would result in a faster slope rate of Fe concentration in the UID GaN layer. The devices with the fastest slope rate of Fe concentration in the UID GaN layer exhibited excellent large signal performance, including the saturated power density (${P}_{sat}$) of 9 W/mm and the power-added efficiency (PAE) of 65.6%. In addition, the ${P}_{sat}$ and the PAE of the device with the fastest slope rate of Fe concentration in UID GaN layer are 27.7% and 14.7%, which are higher than that of the device with the slowest slope rate of Fe concentration under the class AB operation conditions. Pulse ${I}$ ,– ${V}$ measurement results demonstrated that the buffer-related current collapse was more effectively suppressed in the 0.5- $\mu \text{m}$ Fe doping buffer layer because of faster slope rate of Fe concentration in UID GaN layer. Moreover, the frequency-dependent capacitance and conductance measurement results indicated that the current collapse was relevant to deep traps in the UID GaN layer introduced by Fe doping. By reducing the concentration of the deep traps caused by Fe doping, the device showed excellent characteristics of dc and RF. Furthermore, controlling the Fe doping tail was important for designing the GaN-based power amplifier with high ${P}_{sat}$ and PAE. [ABSTRACT FROM AUTHOR]

In this paper, a high-performance multi-channel heterostructure based on lattice-matched AlInN/GaN has been reported. The stacking of five heterostructures yields a high two-dimensional electron gas density of 3.67 × 1013 cm−2 and a small sheet resistance (RSH) of 74.5 Ω/sq. Compared with the AlGaN/GaN sample with the same number of heterojunctions, the AlInN/GaN sample reduces the RSH by 51.2%. Since the AlInN barrier and GaN channel are lattice-matched, the strain defects caused by piezoelectric strain can be alleviated. The high-resolution x-ray diffraction results show that the total dislocation density in AlInN/GaN multi-channels is reduced by 18.9%. The calculation models of multiple-channel heterostructures are obtained to investigate the electron population and energy band diagram, and the calculated results are roughly consistent with the experimental results. With a gate–drain spacing of 11.5 μm, the on-resistance (RON) of the AlInN/GaN multi-channel HEMT was only 2.26 Ω mm, indicating that the lattice-matched multi-channel AlInN/GaN heterostructure can substantially enhance the current drive efficiency and improve the output performance of the devices. [ABSTRACT FROM AUTHOR]

In this article, we report on the high dc and RF performance of AlGaN/GaN high electron mobility transistors that employ Ti/Au/Al/Ni/Au metallization stack with shallow trench etching ohmic contact (STEOC). An excellent ohmic contact performance including low contact resistance (${R}_{C}$) of $0.28~\Omega \cdot $ mm and smooth surface morphology have been achieved simultaneously. Atomic force microscope (AFM) reveals a highly smooth surface morphology with a root mean square (rms) roughness of 6.3 nm even after 810 °C high-temperature annealing (HTA), achieving an improvement of 79% as compared to the conventional Ti/Al/Ni/Au ohmic contact (COC). A high-resolution transmission electron microscope (HRTEM) showed a glossy morphology with a continuous and uniform TiN layer formed in the interface for the STEOC sample, while a bumpy morphology caused from the Ni-Al complexes balling up and TiN island penetrating into the AlGaN/GaN heterostructure were observed for the conventional sample. Consequently, the fabricated transistors with the STEOC process show a high output current of 1.52 A/mm and low ON-resistance (${R}_{ \mathrm{ ON}}$) of $2.09~\Omega $ mm. In addition, a high current cutoff frequency (${f}_{T}$) of 60 GHz and maximum oscillation frequency (${f}_{\text {max}}$) of 150 GHz were obtained for the STEOC HEMT with a gate length (${L}_{\text {g}}$) of 150 nm. Sub-6 GHz continuous-wave mode power sweep measurements deliver a high power-added-efficiency (PAE) of 67%. These results show the significant potential of the STEOC process to facilitate the development of GaN-based power amplifier (PA) applied for 5G. [ABSTRACT FROM AUTHOR]

This work presents the temperature-dependent characteristics of the thin-barrier Al0.45Ga0.55N/GaN high electron mobility transistor (HEMT), p-type CuO gate HEMT, and high-k HfO2 metal–insulator–semiconductor HEMT (MIS-HEMT). As the temperature rises from 20 to 300 °C, the maximum trans-conductance of the HfO2 MIS-HEMT and CuO gate HEMT reduces by 56.9% and 43.2%, respectively. The sub-threshold swing of the CuO gate HEMT is smaller than that of the HfO2 device when the temperature reaches 300 °C. According to the C–V test results from 20 to 300 °C, the relative dielectric constant of CuO increases from 18.1 to 47.4, whereas HfO2 has a relatively stable dielectric constant. The calculation models are presented to investigate the effect of the dielectric constant on the drain current and the trans-conductance. The calculated results show that the maximum transconductance of the HfO2 MIS-HEMT and CuO gate HEMT decreases by 52.3% and 38.9%, respectively, which is in good agreement with the experimental results. [ABSTRACT FROM AUTHOR]

The gate and drain bias dependence of hot electron-induced degradation in GaN-based metal–insulator–semiconductor high electron mobility transistors (MIS-HEMTs) was investigated in this work. Devices exhibit an abnormal increase in peak transconductance (${G}_{m}$ ,max) during hot carrier stress (HCS) and a partially quick recovery of that after removing the electrical stress. A physical model is proposed to explain the abnormal electrical characteristics caused by HCS. By using density functional theory (DFT), we calculated the energy for electrons to dehydrogenate preexisting [NGaH3]−1 complexes in GaN layer during stress. The dehydrogenation of defects affects the Gm,max of devices. Meanwhile, the neutralization of donor traps in AlGaN barrier layer also plays a significant role in the increase of Gm,max and the detrapping effect of electrons from these traps after removing the electrical stress accounts for the partially quick recovery of ${G}_{m, \text{max}}$. [ABSTRACT FROM AUTHOR]

In this article, the Au-free complementary metal oxide semiconductor (CMOS) transistor compatible AlGaN-channel high-electron-mobility transistors (HEMTs) on silicon substrate with 2-kV forward and reverse blocking voltages have been reported. Due to the designed AlGaN epitaxial layers, breakdown voltages (BVs) of the conventional AlGaN-channel HEMTs with $L_{GD} =5$ /10/15/ 20/ $25~\mu \text{m}$ are 420/1070/1590/1920/2000 V respectively, and the values are increased to 760/1420/1980/1990/2000 V by using Schottky-drain technique. The reverse-blocking HEMTs demonstrate reverse blocking voltages of −790/−1300/−1810/−2000 V for ${L}_{GD}=5$ /10/15/ $20~\mu \text{m}$. Meanwhile, the conventional HEMT power figure-of-merit (FOM) of 397 MW/cm2 is the highest FOM for AlGaN-channel HEMTs on silicon, and the Schottky-drain HEMT forward FOM of 384 MW/cm2 and reverse FOM of 321 MW/cm2 are the highest FOM values for all GaN-based reverse-blocking HEMTs on silicon. [ABSTRACT FROM AUTHOR]

A monolithic bidirectional switch based on anti-paralleled two reverse blocking p-GaN HEMTs has been proposed and demonstrated in this work. The recessed Schottky drain technique is utilized to effectively reduce the on-state voltage and thus lowering the power loss of bidirectional switches. A significant reduction in parasitic elements and switch area is obtained by monolithic integration. The fabricated bidirectional switch exhibits a threshold voltage of ~1.85 V, on-state voltage of ~0.63 V, and the forward and reverse off-state breakdown voltages of ~650 V at IS1−S2 = 1 μA/mm. In addition, the function of proposed bidirectional switch as an AC power chopper has been successfully verified. [ABSTRACT FROM AUTHOR]

High-mobility Ge nMOSFETs with ZrO2 gate dielectric are demonstrated and compared against transistors with different interfacial properties of ozone (O3) treatment, O3 post-treatment and without O3 treatment. It is found that with O3 treatment, the Ge nMOSFETs with ZrO2 dielectric having a EOT of 0.83 nm obtain a peak effective electron mobility (μeff) of 682 cm2/Vs, which is higher than that of the Si universal mobility at the medium inversion charge density (Qinv). On the other hand, the O3 post-treatment with Al2O3 interfacial layer can provide dramatically enhanced-μeff, achieving about 50% μeff improvement as compared to the Si universal mobility at medium Qinv of 5 × 1012 cm−2. These results indicate the potential utilization of ZrO2 dielectric in high-performance Ge nMOSFETs. [ABSTRACT FROM AUTHOR]

Ultra-thin barrier (UTB) 4-nm-AlGaN/GaN normally-off high electron mobility transistors (HEMTs) having a high current gain cut-off frequency (fT) are demonstrated by the stress-engineered compressive SiN trench technology. The compressive in-situ SiN guarantees the UTB-AlGaN/GaN heterostructure can operate a high electron density of 1.27 × 1013 cm−2, a high uniform sheet resistance of 312.8 Ω/□, but a negative threshold for the short-gate devices fabricated on it. With the lateral stress-engineering by full removing in-situ SiN in the 600-nm SiN trench, the short-gated (70 nm) devices obtain a threshold of 0.2 V, achieving the devices operating at enhancement-mode (E-mode). Meanwhile, the novel device also can operate a large current of 610 mA/mm and a high transconductance of 394 mS/mm for the E-mode devices. Most of all, a high fT/fmax of 128 GHz/255 GHz is obtained, which is the highest value among the reported E-mode AlGaN/GaN HEMTs. Besides, being together with the 211 GHz/346 GHz of fT/fmax for the D-mode HEMTs fabricated on the same materials, this design of E/D-mode with the realization of fmax over 200 GHz in this work is the first one that can be used in Q-band mixed-signal application with further optimization. And the minimized processing difference between the E- and D-mode designs the addition of the SiN trench, will promise an enormous competitive advantage in the fabricating costs. [ABSTRACT FROM AUTHOR]

In this Letter, the p-GaN high electron mobility transistor (HEMT) with hybrid drain of recessed Schottky (RS) and p-GaN isolation blocks' drain (HSP drain) is proposed and fabricated for good reverse blocking capability. The related operation mechanism has been investigated and revealed. The proposed device features a drain terminal consisting of the array-distributed recessed Schottky and p-GaN isolation blocks. Based on the features, the reverse leakage current (5 × 10−9 A/mm at VDS = −100 V) is obviously reduced by two orders of magnitude compared with that (5 × 10−7 A/mm) of p-GaN HEMTs only with recessed Schottky (RS) drain, which is the lowest leakage current among the reported GaN-on-Si reverse blocking transistors. The introduction of these p-GaN isolation blocks has a negligible impact on Von (Von = 0.63 V). Therefore, a good improvement in the trade-off between the reverse leakage current and Von could be achieved because of the significant reduction in the reverse leakage current without sacrificing Von. In addition, the reverse breakdown voltage of −800 V at 1 μA/mm with a substrate grounded in the proposed device is evidently improved compared with the counterpart (−680 V), which is attributed to effective alleviation of the high electric field near the HSP drain. These results demonstrate the significance and potential of p-GaN HEMTs with HSP drain in reverse blocking applications. [ABSTRACT FROM AUTHOR]

In this article, we report on the effective transconductance (gm) and gain linearity improvement of submicrometer gate AlN-barrier-based transistors using GaN/InGaN coupling-channel structures. The fabricated AlN/GaN/InGaN coupling-channel high electron mobility transistor (CC-HEMT) showed flat gm profile, greatly reduced gm derivatives, and constant dynamic source resistance compared with an AlN/GaN HEMT using the same fabrication process. The highest extrinsic current gain cutoff frequency (ƒT) of 55 GHz and the maximum oscillation frequency (ƒmax) of 80 GHz were obtained for 0.15- μm gate-length transistors, both of which remain constant values across wide input voltage (VGS) of 4 V. Moreover, a significant theoretical OIP3 value boost by 7.1 dB has been observed using the CC-HEMT as compared to the AlN/GaN HEMT. The superior linearity performance of the CC-HEMT can be attributed to the strong channel-to-channel coupling effect. The drain bias-dependence of gm, ƒT, and ƒmax versus VGS profiles illustrate that the linearity characteristics of the CC-HEMT greatly improve with an increase in VDS. These results demonstrate the AlN/GaN/InGaN material system as a viable platform for high frequency requiring high-linearity applications. [ABSTRACT FROM AUTHOR]